From e173f78e31a063647984da53e1f7573083b94062 Mon Sep 17 00:00:00 2001 From: pcirillo Date: Mon, 28 Oct 2013 11:39:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6387 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c | 236 ++++++++++++++------------ os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.h | 110 ++++++------ os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c | 212 ++++++++++++----------- os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.h | 75 ++++---- 4 files changed, 342 insertions(+), 291 deletions(-) diff --git a/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c b/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c index 69964884e..9e2811bc2 100644 --- a/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c +++ b/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c @@ -39,77 +39,78 @@ /** * @brief ICUD1 driver identifier. - * @note The driver ICUD1 allocates the unified channel eMIOS_CH0 + * @note The driver ICUD1 allocates the unified channel eMIOS_CH1 * when enabled. */ -#if SPC5_ICU_USE_EMIOS_CH0 || defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH1 || defined(__DOXYGEN__) ICUDriver ICUD1; #endif /** * @brief ICUD2 driver identifier. - * @note The driver ICUD2 allocates the unified channel eMIOS_CH1 + * @note The driver ICUD2 allocates the unified channel eMIOS_CH2 * when enabled. */ -#if SPC5_ICU_USE_EMIOS_CH1 || defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH2 || defined(__DOXYGEN__) ICUDriver ICUD2; #endif /** * @brief ICUD3 driver identifier. - * @note The driver ICUD3 allocates the unified channel eMIOS_CH2 + * @note The driver ICUD3 allocates the unified channel eMIOS_CH3 * when enabled. */ -#if SPC5_ICU_USE_EMIOS_CH2 || defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH3 || defined(__DOXYGEN__) ICUDriver ICUD3; #endif /** * @brief ICUD4 driver identifier. - * @note The driver ICUD4 allocates the unified channel eMIOS_CH3 + * @note The driver ICUD4 allocates the unified channel eMIOS_CH4 * when enabled. */ -#if SPC5_ICU_USE_EMIOS_CH3 || defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH4 || defined(__DOXYGEN__) ICUDriver ICUD4; #endif /** * @brief ICUD5 driver identifier. - * @note The driver ICUD5 allocates the unified channel eMIOS_CH4 + * @note The driver ICUD5 allocates the unified channel eMIOS_CH5 * when enabled. */ -#if SPC5_ICU_USE_EMIOS_CH4 || defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH5 || defined(__DOXYGEN__) ICUDriver ICUD5; #endif /** * @brief ICUD6 driver identifier. - * @note The driver ICUD6 allocates the unified channel eMIOS_CH5 + * @note The driver ICUD6 allocates the unified channel eMIOS_CH6 * when enabled. */ -#if SPC5_ICU_USE_EMIOS_CH5 || defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH6 || defined(__DOXYGEN__) ICUDriver ICUD6; #endif /** * @brief ICUD7 driver identifier. - * @note The driver ICUD7 allocates the unified channel eMIOS_CH6 + * @note The driver ICUD7 allocates the unified channel eMIOS_CH11 * when enabled. */ -#if SPC5_ICU_USE_EMIOS_CH6 || defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH11 || defined(__DOXYGEN__) ICUDriver ICUD7; #endif /** * @brief ICUD8 driver identifier. - * @note The driver ICUD8 allocates the unified channel eMIOS_CH8 + * @note The driver ICUD8 allocates the unified channel eMIOS_CH13 * when enabled. */ -#if SPC5_ICU_USE_EMIOS_CH8 || defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH13 || defined(__DOXYGEN__) ICUDriver ICUD8; #endif +#if SPC5_EMIOS_NUM_CHANNELS == 24 /** * @brief ICUD9 driver identifier. * @note The driver ICUD9 allocates the unified channel eMIOS_CH7 @@ -145,6 +146,7 @@ ICUDriver ICUD11; #if SPC5_ICU_USE_EMIOS_CH18 || defined(__DOXYGEN__) ICUDriver ICUD12; #endif +#endif /*===========================================================================*/ /* Driver local variables and types. */ @@ -218,28 +220,6 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) { /* Driver interrupt handlers. */ /*===========================================================================*/ -#if SPC5_ICU_USE_EMIOS_CH0 -#if !defined(SPC5_EMIOS_FLAG_F0_HANDLER) -#error "SPC5_EMIOS_FLAG_F0_HANDLER not defined" -#endif -/** - * @brief eMIOS Channel 0 interrupt handler. - * @note It is assumed that the various sources are only activated if the - * associated callback pointer is not equal to @p NULL in order to not - * perform an extra check in a potentially critical interrupt handler. - * - * @isr - */ -CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F0_HANDLER) { - - CH_IRQ_PROLOGUE(); - - icu_lld_serve_interrupt(&ICUD1); - - CH_IRQ_EPILOGUE(); -} -#endif /* SPC5_ICU_USE_EMIOS_CH0 */ - #if SPC5_ICU_USE_EMIOS_CH1 #if !defined(SPC5_EMIOS_FLAG_F1_HANDLER) #error "SPC5_EMIOS_FLAG_F1_HANDLER not defined" @@ -256,7 +236,7 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F1_HANDLER) { CH_IRQ_PROLOGUE(); - icu_lld_serve_interrupt(&ICUD2); + icu_lld_serve_interrupt(&ICUD1); CH_IRQ_EPILOGUE(); } @@ -278,7 +258,7 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F2_HANDLER) { CH_IRQ_PROLOGUE(); - icu_lld_serve_interrupt(&ICUD3); + icu_lld_serve_interrupt(&ICUD2); CH_IRQ_EPILOGUE(); } @@ -300,7 +280,7 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F3_HANDLER) { CH_IRQ_PROLOGUE(); - icu_lld_serve_interrupt(&ICUD4); + icu_lld_serve_interrupt(&ICUD3); CH_IRQ_EPILOGUE(); } @@ -322,7 +302,7 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F4_HANDLER) { CH_IRQ_PROLOGUE(); - icu_lld_serve_interrupt(&ICUD5); + icu_lld_serve_interrupt(&ICUD4); CH_IRQ_EPILOGUE(); } @@ -344,7 +324,7 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F5_HANDLER) { CH_IRQ_PROLOGUE(); - icu_lld_serve_interrupt(&ICUD6); + icu_lld_serve_interrupt(&ICUD5); CH_IRQ_EPILOGUE(); } @@ -366,55 +346,78 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F6_HANDLER) { CH_IRQ_PROLOGUE(); - icu_lld_serve_interrupt(&ICUD7); + icu_lld_serve_interrupt(&ICUD6); CH_IRQ_EPILOGUE(); } #endif /* SPC5_ICU_USE_EMIOS_CH6 */ -#if SPC5_ICU_USE_EMIOS_CH7 -#if !defined(SPC5_EMIOS_FLAG_F7_HANDLER) -#error "SPC5_EMIOS_FLAG_F7_HANDLER not defined" +#if SPC5_ICU_USE_EMIOS_CH11 +#if !defined(SPC5_EMIOS_FLAG_F11_HANDLER) +#error "SPC5_EMIOS_FLAG_F11_HANDLER not defined" #endif /** - * @brief eMIOS Channel 7 interrupt handler. + * @brief eMIOS Channel 11 interrupt handler. * @note It is assumed that the various sources are only activated if the * associated callback pointer is not equal to @p NULL in order to not * perform an extra check in a potentially critical interrupt handler. * * @isr */ -CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F7_HANDLER) { +CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F11_HANDLER) { CH_IRQ_PROLOGUE(); - icu_lld_serve_interrupt(&ICUD9); + icu_lld_serve_interrupt(&ICUD7); CH_IRQ_EPILOGUE(); } -#endif /* SPC5_ICU_USE_EMIOS_CH7 */ +#endif /* SPC5_ICU_USE_EMIOS_CH11 */ + +#if SPC5_ICU_USE_EMIOS_CH13 +#if !defined(SPC5_EMIOS_FLAG_F13_HANDLER) +#error "SPC5_EMIOS_FLAG_F13_HANDLER not defined" +#endif +/** + * @brief eMIOS Channel 13 interrupt handler. + * @note It is assumed that the various sources are only activated if the + * associated callback pointer is not equal to @p NULL in order to not + * perform an extra check in a potentially critical interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F13_HANDLER) { + + CH_IRQ_PROLOGUE(); + + icu_lld_serve_interrupt(&ICUD8); + + CH_IRQ_EPILOGUE(); +} +#endif /* SPC5_ICU_USE_EMIOS_CH13 */ +#if SPC5_EMIOS_NUM_CHANNELS == 24 #if SPC5_ICU_USE_EMIOS_CH7 #if !defined(SPC5_EMIOS_FLAG_F7_HANDLER) #error "SPC5_EMIOS_FLAG_F7_HANDLER not defined" #endif /** - * @brief eMIOS Channel 8 interrupt handler. + * @brief eMIOS Channel 7 interrupt handler. * @note It is assumed that the various sources are only activated if the * associated callback pointer is not equal to @p NULL in order to not * perform an extra check in a potentially critical interrupt handler. * * @isr */ -CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F8_HANDLER) { +CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F7_HANDLER) { CH_IRQ_PROLOGUE(); - icu_lld_serve_interrupt(&ICUD8); + icu_lld_serve_interrupt(&ICUD9); CH_IRQ_EPILOGUE(); } -#endif /* SPC5_ICU_USE_EMIOS_CH8 */ +#endif /* SPC5_ICU_USE_EMIOS_CH7 */ #if SPC5_ICU_USE_EMIOS_CH16 #if !defined(SPC5_EMIOS_FLAG_F16_HANDLER) @@ -481,6 +484,7 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F18_HANDLER) { CH_IRQ_EPILOGUE(); } #endif /* SPC5_ICU_USE_EMIOS_CH18 */ +#endif /*===========================================================================*/ /* Driver exported functions. */ @@ -501,70 +505,71 @@ void icu_lld_init(void) { /* eMIOSx channels initially all not in use.*/ reset_emios_active_channels(); -#if SPC5_ICU_USE_EMIOS_CH0 +#if SPC5_ICU_USE_EMIOS_CH1 /* Driver initialization.*/ icuObjectInit(&ICUD1); ICUD1.emiosp = &EMIOS; - ICUD1.ch_number = 0U; + ICUD1.ch_number = 1U; ICUD1.clock = SPC5_EMIOS_CLK; -#endif /* SPC5_ICU_USE_EMIOS_CH0 */ +#endif /* SPC5_ICU_USE_EMIOS_CH1 */ -#if SPC5_ICU_USE_EMIOS_CH1 +#if SPC5_ICU_USE_EMIOS_CH2 /* Driver initialization.*/ icuObjectInit(&ICUD2); ICUD2.emiosp = &EMIOS; - ICUD2.ch_number = 1U; + ICUD2.ch_number = 2U; ICUD2.clock = SPC5_EMIOS_CLK; -#endif /* SPC5_ICU_USE_EMIOS_CH1 */ +#endif /* SPC5_ICU_USE_EMIOS_CH2 */ -#if SPC5_ICU_USE_EMIOS_CH2 +#if SPC5_ICU_USE_EMIOS_CH3 /* Driver initialization.*/ icuObjectInit(&ICUD3); ICUD3.emiosp = &EMIOS; - ICUD3.ch_number = 2U; + ICUD3.ch_number = 3U; ICUD3.clock = SPC5_EMIOS_CLK; -#endif /* SPC5_ICU_USE_EMIOS_CH2 */ +#endif /* SPC5_ICU_USE_EMIOS_CH3 */ -#if SPC5_ICU_USE_EMIOS_CH3 +#if SPC5_ICU_USE_EMIOS_CH4 /* Driver initialization.*/ icuObjectInit(&ICUD4); ICUD4.emiosp = &EMIOS; - ICUD4.ch_number = 3U; + ICUD4.ch_number = 4U; ICUD4.clock = SPC5_EMIOS_CLK; -#endif /* SPC5_ICU_USE_EMIOS_CH3 */ +#endif /* SPC5_ICU_USE_EMIOS_CH4 */ -#if SPC5_ICU_USE_EMIOS_CH4 +#if SPC5_ICU_USE_EMIOS_CH5 /* Driver initialization.*/ icuObjectInit(&ICUD5); ICUD5.emiosp = &EMIOS; - ICUD5.ch_number = 4U; + ICUD5.ch_number = 5U; ICUD5.clock = SPC5_EMIOS_CLK; -#endif /* SPC5_ICU_USE_EMIOS_CH4 */ +#endif /* SPC5_ICU_USE_EMIOS_CH5 */ -#if SPC5_ICU_USE_EMIOS_CH5 +#if SPC5_ICU_USE_EMIOS_CH6 /* Driver initialization.*/ icuObjectInit(&ICUD6); ICUD6.emiosp = &EMIOS; - ICUD6.ch_number = 5U; + ICUD6.ch_number = 6U; ICUD6.clock = SPC5_EMIOS_CLK; -#endif /* SPC5_ICU_USE_EMIOS_CH5 */ +#endif /* SPC5_ICU_USE_EMIOS_CH6 */ -#if SPC5_ICU_USE_EMIOS_CH6 +#if SPC5_ICU_USE_EMIOS_CH11 /* Driver initialization.*/ icuObjectInit(&ICUD7); ICUD7.emiosp = &EMIOS; - ICUD7.ch_number = 6U; + ICUD7.ch_number = 11U; ICUD7.clock = SPC5_EMIOS_CLK; -#endif /* SPC5_ICU_USE_EMIOS_CH6 */ +#endif /* SPC5_ICU_USE_EMIOS_CH11 */ -#if SPC5_ICU_USE_EMIOS_CH8 +#if SPC5_ICU_USE_EMIOS_CH13 /* Driver initialization.*/ icuObjectInit(&ICUD8); ICUD8.emiosp = &EMIOS; - ICUD8.ch_number = 8U; + ICUD8.ch_number = 13U; ICUD8.clock = SPC5_EMIOS_CLK; -#endif /* SPC5_ICU_USE_EMIOS_CH8 */ +#endif /* SPC5_ICU_USE_EMIOS_CH13 */ +#if SPC5_EMIOS_NUM_CHANNELS == 24 #if SPC5_ICU_USE_EMIOS_CH7 /* Driver initialization.*/ icuObjectInit(&ICUD9); @@ -596,22 +601,22 @@ void icu_lld_init(void) { ICUD12.ch_number = 18U; ICUD12.clock = SPC5_EMIOS_CLK; #endif /* SPC5_ICU_USE_EMIOS_CH18 */ +#endif #if SPC5_ICU_USE_EMIOS #if SPC5_EMIOS_NUM_CHANNELS == 16 - INTC.PSR[SPC5_EMIOS_FLAG_F0_NUMBER].R = SPC5_EMIOS_FLAG_F0_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F1_NUMBER].R = SPC5_EMIOS_FLAG_F1_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F2_NUMBER].R = SPC5_EMIOS_FLAG_F2_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F3_NUMBER].R = SPC5_EMIOS_FLAG_F3_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F4_NUMBER].R = SPC5_EMIOS_FLAG_F4_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F5_NUMBER].R = SPC5_EMIOS_FLAG_F5_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F6_NUMBER].R = SPC5_EMIOS_FLAG_F6_PRIORITY; - INTC.PSR[SPC5_EMIOS_FLAG_F8_NUMBER].R = SPC5_EMIOS_FLAG_F8_PRIORITY; + INTC.PSR[SPC5_EMIOS_FLAG_F11_NUMBER].R = SPC5_EMIOS_FLAG_F11_PRIORITY; + INTC.PSR[SPC5_EMIOS_FLAG_F13_NUMBER].R = SPC5_EMIOS_FLAG_F13_PRIORITY; #endif #if SPC5_EMIOS_NUM_CHANNELS == 24 - INTC.PSR[SPC5_EMIOS_FLAG_F0_NUMBER].R = SPC5_EMIOS_FLAG_F0_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F1_NUMBER].R = SPC5_EMIOS_FLAG_F1_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F2_NUMBER].R = SPC5_EMIOS_FLAG_F2_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F3_NUMBER].R = SPC5_EMIOS_FLAG_F3_PRIORITY; @@ -619,7 +624,8 @@ void icu_lld_init(void) { INTC.PSR[SPC5_EMIOS_FLAG_F5_NUMBER].R = SPC5_EMIOS_FLAG_F5_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F6_NUMBER].R = SPC5_EMIOS_FLAG_F6_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F7_NUMBER].R = SPC5_EMIOS_FLAG_F7_PRIORITY; - INTC.PSR[SPC5_EMIOS_FLAG_F8_NUMBER].R = SPC5_EMIOS_FLAG_F8_PRIORITY; + INTC.PSR[SPC5_EMIOS_FLAG_F11_NUMBER].R = SPC5_EMIOS_FLAG_F11_PRIORITY; + INTC.PSR[SPC5_EMIOS_FLAG_F13_NUMBER].R = SPC5_EMIOS_FLAG_F13_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F16_NUMBER].R = SPC5_EMIOS_FLAG_F16_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F17_NUMBER].R = SPC5_EMIOS_FLAG_F17_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F18_NUMBER].R = SPC5_EMIOS_FLAG_F18_PRIORITY; @@ -642,38 +648,40 @@ void icu_lld_start(ICUDriver *icup) { if (icup->state == ICU_STOP) { /* Enables the peripheral.*/ -#if SPC5_ICU_USE_EMIOS_CH0 - if (&ICUD1 == icup) - increase_emios_active_channels(); -#endif /* SPC5_ICU_USE_EMIOS_CH0 */ #if SPC5_ICU_USE_EMIOS_CH1 - if (&ICUD2 == icup) + if (&ICUD1 == icup) increase_emios_active_channels(); #endif /* SPC5_ICU_USE_EMIOS_CH1 */ #if SPC5_ICU_USE_EMIOS_CH2 - if (&ICUD3 == icup) + if (&ICUD2 == icup) increase_emios_active_channels(); #endif /* SPC5_ICU_USE_EMIOS_CH2 */ #if SPC5_ICU_USE_EMIOS_CH3 - if (&ICUD4 == icup) + if (&ICUD3 == icup) increase_emios_active_channels(); #endif /* SPC5_ICU_USE_EMIOS_CH3 */ #if SPC5_ICU_USE_EMIOS_CH4 - if (&ICUD5 == icup) + if (&ICUD4 == icup) increase_emios_active_channels(); #endif /* SPC5_ICU_USE_EMIOS_CH4 */ #if SPC5_ICU_USE_EMIOS_CH5 - if (&ICUD6 == icup) + if (&ICUD5 == icup) increase_emios_active_channels(); #endif /* SPC5_ICU_USE_EMIOS_CH5 */ #if SPC5_ICU_USE_EMIOS_CH6 - if (&ICUD7 == icup) + if (&ICUD6 == icup) increase_emios_active_channels(); #endif /* SPC5_ICU_USE_EMIOS_CH6 */ -#if SPC5_ICU_USE_EMIOS_CH8 +#if SPC5_ICU_USE_EMIOS_CH11 + if (&ICUD7 == icup) + increase_emios_active_channels(); +#endif /* SPC5_ICU_USE_EMIOS_CH11 */ +#if SPC5_ICU_USE_EMIOS_CH13 if (&ICUD8 == icup) increase_emios_active_channels(); -#endif /* SPC5_ICU_USE_EMIOS_CH8 */ +#endif /* SPC5_ICU_USE_EMIOS_CH13 */ + +#if SPC5_EMIOS_NUM_CHANNELS == 24 #if SPC5_ICU_USE_EMIOS_CH7 if (&ICUD9 == icup) increase_emios_active_channels(); @@ -690,6 +698,7 @@ void icu_lld_start(ICUDriver *icup) { if (&ICUD12 == icup) increase_emios_active_channels(); #endif /* SPC5_ICU_USE_EMIOS_CH18 */ +#endif /* Set eMIOS Clock.*/ #if SPC5_ICU_USE_EMIOS @@ -711,7 +720,7 @@ void icu_lld_start(ICUDriver *icup) { chDbgAssert((psc <= 4) && ((psc * icup->config->frequency) == icup->clock) && ((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)), - "icu_lld_start(), #2", "invalid frequency"); + "icu_lld_start(), #1", "invalid frequency"); icup->emiosp->CH[icup->ch_number].CCR.B.UCPREN = 0; icup->emiosp->CH[icup->ch_number].CCR.R |= @@ -752,16 +761,8 @@ void icu_lld_stop(ICUDriver *icup) { if (icup->state == ICU_READY) { /* Disables the peripheral.*/ -#if SPC5_ICU_USE_EMIOS_CH0 - if (&ICUD1 == icup) { - /* Reset UC Control Register.*/ - icup->emiosp->CH[icup->ch_number].CCR.R = 0; - - decrease_emios_active_channels(); - } -#endif /* SPC5_ICU_USE_EMIOS_CH0 */ #if SPC5_ICU_USE_EMIOS_CH1 - if (&ICUD2 == icup) { + if (&ICUD1 == icup) { /* Reset UC Control Register.*/ icup->emiosp->CH[icup->ch_number].CCR.R = 0; @@ -769,7 +770,7 @@ void icu_lld_stop(ICUDriver *icup) { } #endif /* SPC5_ICU_USE_EMIOS_CH1 */ #if SPC5_ICU_USE_EMIOS_CH2 - if (&ICUD3 == icup) { + if (&ICUD2 == icup) { /* Reset UC Control Register.*/ icup->emiosp->CH[icup->ch_number].CCR.R = 0; @@ -777,7 +778,7 @@ void icu_lld_stop(ICUDriver *icup) { } #endif /* SPC5_ICU_USE_EMIOS_CH2 */ #if SPC5_ICU_USE_EMIOS_CH3 - if (&ICUD4 == icup) { + if (&ICUD3 == icup) { /* Reset UC Control Register.*/ icup->emiosp->CH[icup->ch_number].CCR.R = 0; @@ -785,7 +786,7 @@ void icu_lld_stop(ICUDriver *icup) { } #endif /* SPC5_ICU_USE_EMIOS_CH3 */ #if SPC5_ICU_USE_EMIOS_CH4 - if (&ICUD5 == icup) { + if (&ICUD4 == icup) { /* Reset UC Control Register.*/ icup->emiosp->CH[icup->ch_number].CCR.R = 0; @@ -793,7 +794,7 @@ void icu_lld_stop(ICUDriver *icup) { } #endif /* SPC5_ICU_USE_EMIOS_CH4 */ #if SPC5_ICU_USE_EMIOS_CH5 - if (&ICUD6 == icup) { + if (&ICUD5 == icup) { /* Reset UC Control Register.*/ icup->emiosp->CH[icup->ch_number].CCR.R = 0; @@ -801,21 +802,31 @@ void icu_lld_stop(ICUDriver *icup) { } #endif /* SPC5_ICU_USE_EMIOS_CH5 */ #if SPC5_ICU_USE_EMIOS_CH6 - if (&ICUD7 == icup) { + if (&ICUD6 == icup) { /* Reset UC Control Register.*/ icup->emiosp->CH[icup->ch_number].CCR.R = 0; decrease_emios_active_channels(); } #endif /* SPC5_ICU_USE_EMIOS_CH6 */ -#if SPC5_ICU_USE_EMIOS_CH8 +#if SPC5_ICU_USE_EMIOS_CH11 + if (&ICUD7 == icup) { + /* Reset UC Control Register.*/ + icup->emiosp->CH[icup->ch_number].CCR.R = 0; + + decrease_emios_active_channels(); + } +#endif /* SPC5_ICU_USE_EMIOS_CH11 */ +#if SPC5_ICU_USE_EMIOS_CH13 if (&ICUD8 == icup) { /* Reset UC Control Register.*/ icup->emiosp->CH[icup->ch_number].CCR.R = 0; decrease_emios_active_channels(); } -#endif /* SPC5_ICU_USE_EMIOS_CH8 */ +#endif /* SPC5_ICU_USE_EMIOS_CH13 */ + +#if SPC5_EMIOS_NUM_CHANNELS == 24 #if SPC5_ICU_USE_EMIOS_CH7 if (&ICUD9 == icup) { /* Reset UC Control Register.*/ @@ -848,6 +859,7 @@ void icu_lld_stop(ICUDriver *icup) { decrease_emios_active_channels(); } #endif /* SPC5_ICU_USE_EMIOS_CH18 */ +#endif /* eMIOS clock deactivation.*/ #if SPC5_ICU_USE_EMIOS diff --git a/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.h b/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.h index 1a1d24c3f..656476a98 100644 --- a/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.h +++ b/os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.h @@ -44,8 +44,8 @@ * @details If set to @p TRUE the support for ICUD1 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_ICU_USE_EMIOS_CH0) || defined(__DOXYGEN__) -#define SPC5_ICU_USE_EMIOS_CH0 FALSE +#if !defined(SPC5_ICU_USE_EMIOS_CH1) || defined(__DOXYGEN__) +#define SPC5_ICU_USE_EMIOS_CH1 FALSE #endif /** @@ -53,8 +53,8 @@ * @details If set to @p TRUE the support for ICUD2 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_ICU_USE_EMIOS_CH1) || defined(__DOXYGEN__) -#define SPC5_ICU_USE_EMIOS_CH1 FALSE +#if !defined(SPC5_ICU_USE_EMIOS_CH2) || defined(__DOXYGEN__) +#define SPC5_ICU_USE_EMIOS_CH2 FALSE #endif /** @@ -62,8 +62,8 @@ * @details If set to @p TRUE the support for ICUD3 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_ICU_USE_EMIOS_CH2) || defined(__DOXYGEN__) -#define SPC5_ICU_USE_EMIOS_CH2 FALSE +#if !defined(SPC5_ICU_USE_EMIOS_CH3) || defined(__DOXYGEN__) +#define SPC5_ICU_USE_EMIOS_CH3 FALSE #endif /** @@ -71,8 +71,8 @@ * @details If set to @p TRUE the support for ICUD4 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_ICU_USE_EMIOS_CH3) || defined(__DOXYGEN__) -#define SPC5_ICU_USE_EMIOS_CH3 FALSE +#if !defined(SPC5_ICU_USE_EMIOS_CH4) || defined(__DOXYGEN__) +#define SPC5_ICU_USE_EMIOS_CH4 FALSE #endif /** @@ -80,8 +80,8 @@ * @details If set to @p TRUE the support for ICUD5 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_ICU_USE_EMIOS_CH4) || defined(__DOXYGEN__) -#define SPC5_ICU_USE_EMIOS_CH4 FALSE +#if !defined(SPC5_ICU_USE_EMIOS_CH5) || defined(__DOXYGEN__) +#define SPC5_ICU_USE_EMIOS_CH5 FALSE #endif /** @@ -89,8 +89,8 @@ * @details If set to @p TRUE the support for ICUD6 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_ICU_USE_EMIOS_CH5) || defined(__DOXYGEN__) -#define SPC5_ICU_USE_EMIOS_CH5 FALSE +#if !defined(SPC5_ICU_USE_EMIOS_CH6) || defined(__DOXYGEN__) +#define SPC5_ICU_USE_EMIOS_CH6 FALSE #endif /** @@ -98,8 +98,8 @@ * @details If set to @p TRUE the support for ICUD7 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_ICU_USE_EMIOS_CH6) || defined(__DOXYGEN__) -#define SPC5_ICU_USE_EMIOS_CH6 FALSE +#if !defined(SPC5_ICU_USE_EMIOS_CH11) || defined(__DOXYGEN__) +#define SPC5_ICU_USE_EMIOS_CH11 FALSE #endif /** @@ -107,10 +107,11 @@ * @details If set to @p TRUE the support for ICUD8 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_ICU_USE_EMIOS_CH8) || defined(__DOXYGEN__) -#define SPC5_ICU_USE_EMIOS_CH8 FALSE +#if !defined(SPC5_ICU_USE_EMIOS_CH13) || defined(__DOXYGEN__) +#define SPC5_ICU_USE_EMIOS_CH13 FALSE #endif +#if SPC5_EMIOS_NUM_CHANNELS == 24 /** * @brief ICUD9 driver enable switch. * @details If set to @p TRUE the support for ICUD9 is included. @@ -146,63 +147,65 @@ #if !defined(SPC5_ICU_USE_EMIOS_CH18) || defined(__DOXYGEN__) #define SPC5_ICU_USE_EMIOS_CH18 FALSE #endif - -/** - * @brief ICUD1 interrupt priority level setting. - */ -#if !defined(SPC5_EMIOS_FLAG_F0_PRIORITY) || defined(__DOXYGEN__) -#define SPC5_EMIOS_FLAG_F0_PRIORITY 7 #endif /** - * @brief ICUD2 interrupt priority level setting. + * @brief ICUD1 interrupt priority level setting. */ #if !defined(SPC5_EMIOS_FLAG_F1_PRIORITY) || defined(__DOXYGEN__) #define SPC5_EMIOS_FLAG_F1_PRIORITY 7 #endif /** - * @brief ICUD3 interrupt priority level setting. + * @brief ICUD2 interrupt priority level setting. */ #if !defined(SPC5_EMIOS_FLAG_F2_PRIORITY) || defined(__DOXYGEN__) #define SPC5_EMIOS_FLAG_F2_PRIORITY 7 #endif /** - * @brief ICUD4 interrupt priority level setting. + * @brief ICUD3 interrupt priority level setting. */ #if !defined(SPC5_EMIOS_FLAG_F3_PRIORITY) || defined(__DOXYGEN__) #define SPC5_EMIOS_FLAG_F3_PRIORITY 7 #endif /** - * @brief ICUD5 interrupt priority level setting. + * @brief ICUD4 interrupt priority level setting. */ #if !defined(SPC5_EMIOS_FLAG_F4_PRIORITY) || defined(__DOXYGEN__) #define SPC5_EMIOS_FLAG_F4_PRIORITY 7 #endif /** - * @brief ICUD6 interrupt priority level setting. + * @brief ICUD5 interrupt priority level setting. */ #if !defined(SPC5_EMIOS_FLAG_F5_PRIORITY) || defined(__DOXYGEN__) #define SPC5_EMIOS_FLAG_F5_PRIORITY 7 #endif /** - * @brief ICUD7 interrupt priority level setting. + * @brief ICUD6 interrupt priority level setting. */ #if !defined(SPC5_EMIOS_FLAG_F6_PRIORITY) || defined(__DOXYGEN__) #define SPC5_EMIOS_FLAG_F6_PRIORITY 7 #endif +/** + * @brief ICUD7 interrupt priority level setting. + */ +#if !defined(SPC5_EMIOS_FLAG_F11_PRIORITY) || defined(__DOXYGEN__) +#define SPC5_EMIOS_FLAG_F11_PRIORITY 7 +#endif + /** * @brief ICUD8 interrupt priority level setting. */ -#if !defined(SPC5_EMIOS_FLAG_F8_PRIORITY) || defined(__DOXYGEN__) -#define SPC5_EMIOS_FLAG_F8_PRIORITY 7 +#if !defined(SPC5_EMIOS_FLAG_F13_PRIORITY) || defined(__DOXYGEN__) +#define SPC5_EMIOS_FLAG_F13_PRIORITY 7 #endif +#if SPC5_EMIOS_NUM_CHANNELS == 24 /** * @brief ICUD9 interrupt priority level setting. */ @@ -230,6 +233,7 @@ #if !defined(SPC5_EMIOS_FLAG_F18_PRIORITY) || defined(__DOXYGEN__) #define SPC5_EMIOS_FLAG_F18_PRIORITY 7 #endif +#endif /** @} */ /*===========================================================================*/ @@ -239,19 +243,29 @@ #if !SPC5_HAS_EMIOS #error "EMIOS not present in the selected device" #endif - -#define SPC5_ICU_USE_EMIOS (SPC5_ICU_USE_EMIOS_CH0 || \ - SPC5_ICU_USE_EMIOS_CH1 || \ - SPC5_ICU_USE_EMIOS_CH2 || \ - SPC5_ICU_USE_EMIOS_CH3 || \ - SPC5_ICU_USE_EMIOS_CH4 || \ - SPC5_ICU_USE_EMIOS_CH5 || \ - SPC5_ICU_USE_EMIOS_CH6 || \ - SPC5_ICU_USE_EMIOS_CH7 || \ - SPC5_ICU_USE_EMIOS_CH8 || \ +#if SPC5_EMIOS_NUM_CHANNELS == 16 +#define SPC5_ICU_USE_EMIOS (SPC5_ICU_USE_EMIOS_CH1 || \ + SPC5_ICU_USE_EMIOS_CH2 || \ + SPC5_ICU_USE_EMIOS_CH3 || \ + SPC5_ICU_USE_EMIOS_CH4 || \ + SPC5_ICU_USE_EMIOS_CH5 || \ + SPC5_ICU_USE_EMIOS_CH6 || \ + SPC5_ICU_USE_EMIOS_CH11 || \ + SPC5_ICU_USE_EMIOS_CH13) +#elif SPC5_EMIOS_NUM_CHANNELS == 24 +#define SPC5_ICU_USE_EMIOS (SPC5_ICU_USE_EMIOS_CH1 || \ + SPC5_ICU_USE_EMIOS_CH2 || \ + SPC5_ICU_USE_EMIOS_CH3 || \ + SPC5_ICU_USE_EMIOS_CH4 || \ + SPC5_ICU_USE_EMIOS_CH5 || \ + SPC5_ICU_USE_EMIOS_CH6 || \ + SPC5_ICU_USE_EMIOS_CH11 || \ + SPC5_ICU_USE_EMIOS_CH13 || \ + SPC5_ICU_USE_EMIOS_CH7 || \ SPC5_ICU_USE_EMIOS_CH16 || \ SPC5_ICU_USE_EMIOS_CH17 || \ SPC5_ICU_USE_EMIOS_CH18) +#endif #if !SPC5_ICU_USE_EMIOS #error "ICU driver activated but no Channels assigned" @@ -376,35 +390,35 @@ struct ICUDriver { /* External declarations. */ /*===========================================================================*/ -#if SPC5_ICU_USE_EMIOS_CH0 && !defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH1 && !defined(__DOXYGEN__) extern ICUDriver ICUD1; #endif -#if SPC5_ICU_USE_EMIOS_CH1 && !defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH2 && !defined(__DOXYGEN__) extern ICUDriver ICUD2; #endif -#if SPC5_ICU_USE_EMIOS_CH2 && !defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH3 && !defined(__DOXYGEN__) extern ICUDriver ICUD3; #endif -#if SPC5_ICU_USE_EMIOS_CH3 && !defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH4 && !defined(__DOXYGEN__) extern ICUDriver ICUD4; #endif -#if SPC5_ICU_USE_EMIOS_CH4 && !defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH5 && !defined(__DOXYGEN__) extern ICUDriver ICUD5; #endif -#if SPC5_ICU_USE_EMIOS_CH5 && !defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH6 && !defined(__DOXYGEN__) extern ICUDriver ICUD6; #endif -#if SPC5_ICU_USE_EMIOS_CH6 && !defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH11 && !defined(__DOXYGEN__) extern ICUDriver ICUD7; #endif -#if SPC5_ICU_USE_EMIOS_CH8 && !defined(__DOXYGEN__) +#if SPC5_ICU_USE_EMIOS_CH13 && !defined(__DOXYGEN__) extern ICUDriver ICUD8; #endif diff --git a/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c b/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c index 066eaa35a..5be0e81de 100644 --- a/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c +++ b/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c @@ -39,46 +39,46 @@ /** * @brief PWMD1 driver identifier. - * @note The driver PWMD1 allocates the unified channel EMIOS_CH9 + * @note The driver PWMD1 allocates the unified channel EMIOS_CH0 * when enabled. */ -#if SPC5_PWM_USE_EMIOS_CH9 || defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH0 || defined(__DOXYGEN__) PWMDriver PWMD1; #endif /** * @brief PWMD2 driver identifier. - * @note The driver PWMD2 allocates the unified channel EMIOS_CH10 + * @note The driver PWMD2 allocates the unified channel EMIOS_CH8 * when enabled. */ -#if SPC5_PWM_USE_EMIOS_CH10 || defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH8 || defined(__DOXYGEN__) PWMDriver PWMD2; #endif /** * @brief PWMD3 driver identifier. - * @note The driver PWMD3 allocates the unified channel EMIOS_CH11 + * @note The driver PWMD3 allocates the unified channel EMIOS_CH9 * when enabled. */ -#if SPC5_PWM_USE_EMIOS_CH11 || defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH9 || defined(__DOXYGEN__) PWMDriver PWMD3; #endif /** * @brief PWMD4 driver identifier. - * @note The driver PWMD4 allocates the unified channel EMIOS_CH12 + * @note The driver PWMD4 allocates the unified channel EMIOS_CH10 * when enabled. */ -#if SPC5_PWM_USE_EMIOS_CH12 || defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH10 || defined(__DOXYGEN__) PWMDriver PWMD4; #endif /** * @brief PWMD5 driver identifier. - * @note The driver PWMD5 allocates the unified channel EMIOS_CH13 + * @note The driver PWMD5 allocates the unified channel EMIOS_CH12 * when enabled. */ -#if SPC5_PWM_USE_EMIOS_CH13 || defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH12 || defined(__DOXYGEN__) PWMDriver PWMD5; #endif @@ -109,6 +109,7 @@ PWMDriver PWMD7; PWMDriver PWMD8; #endif +#if SPC5_EMIOS_NUM_CHANNELS == 24 /** * @brief PWMD9 driver identifier. * @note The driver PWMD9 allocates the unified channel EMIOS_CH19 @@ -144,6 +145,7 @@ PWMDriver PWMD11; #if SPC5_PWM_USE_EMIOS_CH22 || defined(__DOXYGEN__) PWMDriver PWMD12; #endif +#endif /*===========================================================================*/ /* Driver local variables and types. */ @@ -196,19 +198,19 @@ static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { /* Driver interrupt handlers. */ /*===========================================================================*/ -#if SPC5_PWM_USE_EMIOS_CH9 -#if !defined(SPC5_EMIOS_FLAG_F9_HANDLER) -#error "SPC5_EMIOS_FLAG_F9_HANDLER not defined" +#if SPC5_PWM_USE_EMIOS_CH0 +#if !defined(SPC5_EMIOS_FLAG_F0_HANDLER) +#error "SPC5_EMIOS_FLAG_F0_HANDLER not defined" #endif /** - * @brief EMIOS Channel 9 interrupt handler. + * @brief EMIOS Channel 0 interrupt handler. * @note It is assumed that the various sources are only activated if the * associated callback pointer is not equal to @p NULL in order to not * perform an extra check in a potentially critical interrupt handler. * * @isr */ -CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F9_HANDLER) { +CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F0_HANDLER) { CH_IRQ_PROLOGUE(); @@ -216,21 +218,21 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F9_HANDLER) { CH_IRQ_EPILOGUE(); } -#endif /* SPC5_PWM_USE_EMIOS_CH9 */ +#endif /* SPC5_PWM_USE_EMIOS_CH0 */ -#if SPC5_PWM_USE_EMIOS_CH10 -#if !defined(SPC5_EMIOS_FLAG_F10_HANDLER) -#error "SPC5_EMIOS_FLAG_F10_HANDLER not defined" +#if SPC5_PWM_USE_EMIOS_CH8 +#if !defined(SPC5_EMIOS_FLAG_F8_HANDLER) +#error "SPC5_EMIOS_FLAG_F8_HANDLER not defined" #endif /** - * @brief EMIOS Channel 10 interrupt handler. + * @brief EMIOS Channel 8 interrupt handler. * @note It is assumed that the various sources are only activated if the * associated callback pointer is not equal to @p NULL in order to not * perform an extra check in a potentially critical interrupt handler. * * @isr */ -CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F10_HANDLER) { +CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F8_HANDLER) { CH_IRQ_PROLOGUE(); @@ -238,21 +240,21 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F10_HANDLER) { CH_IRQ_EPILOGUE(); } -#endif /* SPC5_PWM_USE_EMIOS_CH10 */ +#endif /* SPC5_PWM_USE_EMIOS_CH8 */ -#if SPC5_PWM_USE_EMIOS_CH11 -#if !defined(SPC5_EMIOS_FLAG_F11_HANDLER) -#error "SPC5_EMIOS_FLAG_F11_HANDLER not defined" +#if SPC5_PWM_USE_EMIOS_CH9 +#if !defined(SPC5_EMIOS_FLAG_F9_HANDLER) +#error "SPC5_EMIOS_FLAG_F9_HANDLER not defined" #endif /** - * @brief EMIOS Channel 11 interrupt handler. + * @brief EMIOS Channel 9 interrupt handler. * @note It is assumed that the various sources are only activated if the * associated callback pointer is not equal to @p NULL in order to not * perform an extra check in a potentially critical interrupt handler. * * @isr */ -CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F11_HANDLER) { +CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F9_HANDLER) { CH_IRQ_PROLOGUE(); @@ -260,21 +262,21 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F11_HANDLER) { CH_IRQ_EPILOGUE(); } -#endif /* SPC5_PWM_USE_EMIOS_CH11 */ +#endif /* SPC5_PWM_USE_EMIOS_CH9 */ -#if SPC5_PWM_USE_EMIOS_CH12 -#if !defined(SPC5_EMIOS_FLAG_F12_HANDLER) -#error "SPC5_EMIOS_FLAG_F12_HANDLER not defined" +#if SPC5_PWM_USE_EMIOS_CH10 +#if !defined(SPC5_EMIOS_FLAG_F10_HANDLER) +#error "SPC5_EMIOS_FLAG_F10_HANDLER not defined" #endif /** - * @brief EMIOS Channel 12 interrupt handler. + * @brief EMIOS Channel 10 interrupt handler. * @note It is assumed that the various sources are only activated if the * associated callback pointer is not equal to @p NULL in order to not * perform an extra check in a potentially critical interrupt handler. * * @isr */ -CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F12_HANDLER) { +CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F10_HANDLER) { CH_IRQ_PROLOGUE(); @@ -282,21 +284,21 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F12_HANDLER) { CH_IRQ_EPILOGUE(); } -#endif /* SPC5_PWM_USE_EMIOS_CH12 */ +#endif /* SPC5_PWM_USE_EMIOS_CH10 */ -#if SPC5_PWM_USE_EMIOS_CH13 -#if !defined(SPC5_EMIOS_FLAG_F13_HANDLER) -#error "SPC5_EMIOS_FLAG_F13_HANDLER not defined" +#if SPC5_PWM_USE_EMIOS_CH12 +#if !defined(SPC5_EMIOS_FLAG_F12_HANDLER) +#error "SPC5_EMIOS_FLAG_F12_HANDLER not defined" #endif /** - * @brief EMIOS Channel 13 interrupt handler. + * @brief EMIOS Channel 12 interrupt handler. * @note It is assumed that the various sources are only activated if the * associated callback pointer is not equal to @p NULL in order to not * perform an extra check in a potentially critical interrupt handler. * * @isr */ -CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F13_HANDLER) { +CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F12_HANDLER) { CH_IRQ_PROLOGUE(); @@ -304,7 +306,7 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F13_HANDLER) { CH_IRQ_EPILOGUE(); } -#endif /* SPC5_PWM_USE_EMIOS_CH13 */ +#endif /* SPC5_PWM_USE_EMIOS_CH12 */ #if SPC5_PWM_USE_EMIOS_CH14 #if !defined(SPC5_EMIOS_FLAG_F14_HANDLER) @@ -350,6 +352,29 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F15_HANDLER) { } #endif /* SPC5_PWM_USE_EMIOS_CH15 */ +#if SPC5_PWM_USE_EMIOS_CH23 +#if !defined(SPC5_EMIOS_FLAG_F23_HANDLER) +#error "SPC5_EMIOS_FLAG_F23_HANDLER not defined" +#endif +/** + * @brief EMIOS Channel 23 interrupt handler. + * @note It is assumed that the various sources are only activated if the + * associated callback pointer is not equal to @p NULL in order to not + * perform an extra check in a potentially critical interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F23_HANDLER) { + + CH_IRQ_PROLOGUE(); + + pwm_lld_serve_interrupt(&PWMD8); + + CH_IRQ_EPILOGUE(); +} +#endif /* SPC5_PWM_USE_EMIOS_CH23 */ + +#if SPC5_EMIOS_NUM_CHANNELS == 24 #if SPC5_PWM_USE_EMIOS_CH19 #if !defined(SPC5_EMIOS_FLAG_F19_HANDLER) #error "SPC5_EMIOS_FLAG_F19_HANDLER not defined" @@ -437,28 +462,7 @@ CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F22_HANDLER) { CH_IRQ_EPILOGUE(); } #endif /* SPC5_PWM_USE_EMIOS_CH22 */ - -#if SPC5_PWM_USE_EMIOS_CH23 -#if !defined(SPC5_EMIOS_FLAG_F23_HANDLER) -#error "SPC5_EMIOS_FLAG_F23_HANDLER not defined" #endif -/** - * @brief EMIOS Channel 23 interrupt handler. - * @note It is assumed that the various sources are only activated if the - * associated callback pointer is not equal to @p NULL in order to not - * perform an extra check in a potentially critical interrupt handler. - * - * @isr - */ -CH_IRQ_HANDLER(SPC5_EMIOS_FLAG_F23_HANDLER) { - - CH_IRQ_PROLOGUE(); - - pwm_lld_serve_interrupt(&PWMD8); - - CH_IRQ_EPILOGUE(); -} -#endif /* SPC5_PWM_USE_EMIOS_CH23 */ /*===========================================================================*/ /* Driver exported functions. */ @@ -473,40 +477,40 @@ void pwm_lld_init(void) { /* eMIOSx channels initially all not in use.*/ reset_emios_active_channels(); -#if SPC5_PWM_USE_EMIOS_CH9 +#if SPC5_PWM_USE_EMIOS_CH0 /* Driver initialization.*/ pwmObjectInit(&PWMD1); PWMD1.emiosp = &EMIOS; - PWMD1.ch_number = 9U; -#endif /* SPC5_PWM_USE_EMIOS_CH9 */ + PWMD1.ch_number = 0U; +#endif /* SPC5_PWM_USE_EMIOS_CH0 */ -#if SPC5_PWM_USE_EMIOS_CH10 +#if SPC5_PWM_USE_EMIOS_CH8 /* Driver initialization.*/ pwmObjectInit(&PWMD2); PWMD2.emiosp = &EMIOS; - PWMD2.ch_number = 10U; -#endif /* SPC5_PWM_USE_EMIOS_CH10 */ + PWMD2.ch_number = 8U; +#endif /* SPC5_PWM_USE_EMIOS_CH8 */ -#if SPC5_PWM_USE_EMIOS_CH11 +#if SPC5_PWM_USE_EMIOS_CH9 /* Driver initialization.*/ pwmObjectInit(&PWMD3); PWMD3.emiosp = &EMIOS; - PWMD3.ch_number = 11U; -#endif /* SPC5_PWM_USE_EMIOS_CH11 */ + PWMD3.ch_number = 9U; +#endif /* SPC5_PWM_USE_EMIOS_CH9 */ -#if SPC5_PWM_USE_EMIOS_CH12 +#if SPC5_PWM_USE_EMIOS_CH10 /* Driver initialization.*/ pwmObjectInit(&PWMD4); PWMD4.emiosp = &EMIOS; - PWMD4.ch_number = 12U; -#endif /* SPC5_PWM_USE_EMIOS_CH12 */ + PWMD4.ch_number = 10U; +#endif /* SPC5_PWM_USE_EMIOS_CH10 */ -#if SPC5_PWM_USE_EMIOS_CH13 +#if SPC5_PWM_USE_EMIOS_CH12 /* Driver initialization.*/ pwmObjectInit(&PWMD5); PWMD5.emiosp = &EMIOS; - PWMD5.ch_number = 13U; -#endif /* SPC5_PWM_USE_EMIOS_CH13 */ + PWMD5.ch_number = 12U; +#endif /* SPC5_PWM_USE_EMIOS_CH12 */ #if SPC5_PWM_USE_EMIOS_CH14 /* Driver initialization.*/ @@ -529,6 +533,7 @@ void pwm_lld_init(void) { PWMD8.ch_number = 23U; #endif /* SPC5_PWM_USE_EMIOS_CH23 */ +#if SPC5_EMIOS_NUM_CHANNELS == 24 #if SPC5_PWM_USE_EMIOS_CH19 /* Driver initialization.*/ pwmObjectInit(&PWMD9); @@ -556,26 +561,27 @@ void pwm_lld_init(void) { PWMD12.emiosp = &EMIOS; PWMD12.ch_number = 22U; #endif /* SPC5_PWM_USE_EMIOS_CH22 */ +#endif #if SPC5_PWM_USE_EMIOS #if SPC5_EMIOS_NUM_CHANNELS == 16 + INTC.PSR[SPC5_EMIOS_FLAG_F0_NUMBER].R = SPC5_EMIOS_FLAG_F0_PRIORITY; + INTC.PSR[SPC5_EMIOS_FLAG_F8_NUMBER].R = SPC5_EMIOS_FLAG_F8_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F9_NUMBER].R = SPC5_EMIOS_FLAG_F9_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F10_NUMBER].R = SPC5_EMIOS_FLAG_F10_PRIORITY; - INTC.PSR[SPC5_EMIOS_FLAG_F11_NUMBER].R = SPC5_EMIOS_FLAG_F11_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F12_NUMBER].R = SPC5_EMIOS_FLAG_F12_PRIORITY; - INTC.PSR[SPC5_EMIOS_FLAG_F13_NUMBER].R = SPC5_EMIOS_FLAG_F13_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F14_NUMBER].R = SPC5_EMIOS_FLAG_F14_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F15_NUMBER].R = SPC5_EMIOS_FLAG_F15_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F23_NUMBER].R = SPC5_EMIOS_FLAG_F23_PRIORITY; #endif #if SPC5_EMIOS_NUM_CHANNELS == 24 + INTC.PSR[SPC5_EMIOS_FLAG_F0_NUMBER].R = SPC5_EMIOS_FLAG_F0_PRIORITY; + INTC.PSR[SPC5_EMIOS_FLAG_F8_NUMBER].R = SPC5_EMIOS_FLAG_F8_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F9_NUMBER].R = SPC5_EMIOS_FLAG_F9_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F10_NUMBER].R = SPC5_EMIOS_FLAG_F10_PRIORITY; - INTC.PSR[SPC5_EMIOS_FLAG_F11_NUMBER].R = SPC5_EMIOS_FLAG_F11_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F12_NUMBER].R = SPC5_EMIOS_FLAG_F12_PRIORITY; - INTC.PSR[SPC5_EMIOS_FLAG_F13_NUMBER].R = SPC5_EMIOS_FLAG_F13_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F14_NUMBER].R = SPC5_EMIOS_FLAG_F14_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F15_NUMBER].R = SPC5_EMIOS_FLAG_F15_PRIORITY; INTC.PSR[SPC5_EMIOS_FLAG_F19_NUMBER].R = SPC5_EMIOS_FLAG_F19_PRIORITY; @@ -604,35 +610,35 @@ void pwm_lld_start(PWMDriver *pwmp) { "pwm_lld_start(), #1", "too many channels"); if (pwmp->state == PWM_STOP) { -#if SPC5_PWM_USE_EMIOS_CH9 +#if SPC5_PWM_USE_EMIOS_CH0 if (&PWMD1 == pwmp) { increase_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH9 */ +#endif /* SPC5_PWM_USE_EMIOS_CH0 */ -#if SPC5_PWM_USE_EMIOS_CH10 +#if SPC5_PWM_USE_EMIOS_CH8 if (&PWMD2 == pwmp) { increase_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH10 */ +#endif /* SPC5_PWM_USE_EMIOS_CH8 */ -#if SPC5_PWM_USE_EMIOS_CH11 +#if SPC5_PWM_USE_EMIOS_CH9 if (&PWMD3 == pwmp) { increase_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH11 */ +#endif /* SPC5_PWM_USE_EMIOS_CH9 */ -#if SPC5_PWM_USE_EMIOS_CH12 +#if SPC5_PWM_USE_EMIOS_CH10 if (&PWMD4 == pwmp) { increase_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH12 */ +#endif /* SPC5_PWM_USE_EMIOS_CH10 */ -#if SPC5_PWM_USE_EMIOS_CH13 +#if SPC5_PWM_USE_EMIOS_CH12 if (&PWMD5 == pwmp) { increase_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH13 */ +#endif /* SPC5_PWM_USE_EMIOS_CH12 */ #if SPC5_PWM_USE_EMIOS_CH14 if (&PWMD6 == pwmp) { @@ -652,6 +658,7 @@ void pwm_lld_start(PWMDriver *pwmp) { } #endif /* SPC5_PWM_USE_EMIOS_CH23 */ +#if SPC5_EMIOS_NUM_CHANNELS == 24 #if SPC5_PWM_USE_EMIOS_CH19 if (&PWMD9 == pwmp) { increase_emios_active_channels(); @@ -675,6 +682,7 @@ void pwm_lld_start(PWMDriver *pwmp) { increase_emios_active_channels(); } #endif /* SPC5_PWM_USE_EMIOS_CH22 */ +#endif /* Set eMIOS Clock.*/ #if SPC5_PWM_USE_EMIOS @@ -696,7 +704,7 @@ void pwm_lld_start(PWMDriver *pwmp) { chDbgAssert((psc <= 0xFFFF) && (((psc) * pwmp->config->frequency) == SPC5_EMIOS_CLK) && ((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)), - "pwm_lld_start(), #2", "invalid frequency"); + "pwm_lld_start(), #1", "invalid frequency"); if (pwmp->config->mode == PWM_ALIGN_EDGE) { pwmp->emiosp->CH[pwmp->ch_number].CCR.B.UCPREN = 0; @@ -740,50 +748,50 @@ void pwm_lld_stop(PWMDriver *pwmp) { if (pwmp->state == PWM_READY) { /* Disables the peripheral.*/ -#if SPC5_PWM_USE_EMIOS_CH9 +#if SPC5_PWM_USE_EMIOS_CH0 if (&PWMD1 == pwmp) { /* Reset UC Control Register.*/ pwmp->emiosp->CH[pwmp->ch_number].CCR.R = 0; decrease_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH9 */ +#endif /* SPC5_PWM_USE_EMIOS_CH0 */ -#if SPC5_PWM_USE_EMIOS_CH10 +#if SPC5_PWM_USE_EMIOS_CH8 if (&PWMD2 == pwmp) { /* Reset UC Control Register.*/ pwmp->emiosp->CH[pwmp->ch_number].CCR.R = 0; decrease_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH10 */ +#endif /* SPC5_PWM_USE_EMIOS_CH8 */ -#if SPC5_PWM_USE_EMIOS_CH11 +#if SPC5_PWM_USE_EMIOS_CH9 if (&PWMD3 == pwmp) { /* Reset UC Control Register.*/ pwmp->emiosp->CH[pwmp->ch_number].CCR.R = 0; decrease_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH11 */ +#endif /* SPC5_PWM_USE_EMIOS_CH9 */ -#if SPC5_PWM_USE_EMIOS_CH12 +#if SPC5_PWM_USE_EMIOS_CH10 if (&PWMD4 == pwmp) { /* Reset UC Control Register.*/ pwmp->emiosp->CH[pwmp->ch_number].CCR.R = 0; decrease_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH12 */ +#endif /* SPC5_PWM_USE_EMIOS_CH10 */ -#if SPC5_PWM_USE_EMIOS_CH13 +#if SPC5_PWM_USE_EMIOS_CH12 if (&PWMD5 == pwmp) { /* Reset UC Control Register.*/ pwmp->emiosp->CH[pwmp->ch_number].CCR.R = 0; decrease_emios_active_channels(); } -#endif /* SPC5_PWM_USE_EMIOS_CH13 */ +#endif /* SPC5_PWM_USE_EMIOS_CH12 */ #if SPC5_PWM_USE_EMIOS_CH14 if (&PWMD6 == pwmp) { @@ -812,6 +820,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { } #endif /* SPC5_PWM_USE_EMIOS_CH23 */ +#if SPC5_EMIOS_NUM_CHANNELS == 24 #if SPC5_PWM_USE_EMIOS_CH19 if (&PWMD9 == pwmp) { /* Reset UC Control Register.*/ @@ -847,6 +856,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { decrease_emios_active_channels(); } #endif /* SPC5_PWM_USE_EMIOS_CH22 */ +#endif /* eMIOS clock deactivation.*/ #if SPC5_PWM_USE_EMIOS diff --git a/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.h b/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.h index fa7417844..d859ac30c 100644 --- a/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.h +++ b/os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.h @@ -61,8 +61,8 @@ * @details If set to @p TRUE the support for PWMD1 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_PWM_USE_EMIOS_CH9) || defined(__DOXYGEN__) -#define SPC5_PWM_USE_EMIOS_CH9 FALSE +#if !defined(SPC5_PWM_USE_EMIOS_CH0) || defined(__DOXYGEN__) +#define SPC5_PWM_USE_EMIOS_CH0 FALSE #endif /** @@ -70,8 +70,8 @@ * @details If set to @p TRUE the support for PWMD2 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_PWM_USE_EMIOS_CH10) || defined(__DOXYGEN__) -#define SPC5_PWM_USE_EMIOS_CH10 FALSE +#if !defined(SPC5_PWM_USE_EMIOS_CH8) || defined(__DOXYGEN__) +#define SPC5_PWM_USE_EMIOS_CH8 FALSE #endif /** @@ -79,8 +79,8 @@ * @details If set to @p TRUE the support for PWMD3 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_PWM_USE_EMIOS_CH11) || defined(__DOXYGEN__) -#define SPC5_PWM_USE_EMIOS_CH11 FALSE +#if !defined(SPC5_PWM_USE_EMIOS_CH9) || defined(__DOXYGEN__) +#define SPC5_PWM_USE_EMIOS_CH9 FALSE #endif /** @@ -88,8 +88,8 @@ * @details If set to @p TRUE the support for PWMD4 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_PWM_USE_EMIOS_CH12) || defined(__DOXYGEN__) -#define SPC5_PWM_USE_EMIOS_CH12 FALSE +#if !defined(SPC5_PWM_USE_EMIOS_CH10) || defined(__DOXYGEN__) +#define SPC5_PWM_USE_EMIOS_CH10 FALSE #endif /** @@ -97,8 +97,8 @@ * @details If set to @p TRUE the support for PWMD5 is included. * @note The default is @p FALSE. */ -#if !defined(SPC5_PWM_USE_EMIOS_CH13) || defined(__DOXYGEN__) -#define SPC5_PWM_USE_EMIOS_CH13 FALSE +#if !defined(SPC5_PWM_USE_EMIOS_CH12) || defined(__DOXYGEN__) +#define SPC5_PWM_USE_EMIOS_CH12 FALSE #endif /** @@ -128,6 +128,7 @@ #define SPC5_PWM_USE_EMIOS_CH23 FALSE #endif +#if SPC5_EMIOS_NUM_CHANNELS == 24 /** * @brief PWMD9 driver enable switch. * @details If set to @p TRUE the support for PWMD9 is included. @@ -163,40 +164,41 @@ #if !defined(SPC5_PWM_USE_EMIOS_CH22) || defined(__DOXYGEN__) #define SPC5_PWM_USE_EMIOS_CH22 FALSE #endif +#endif /** * @brief PWMD1 interrupt priority level setting. */ -#if !defined(SPC5_EMIOS_FLAG_F9_PRIORITY) || defined(__DOXYGEN__) -#define SPC5_EMIOS_FLAG_F9_PRIORITY 7 +#if !defined(SPC5_EMIOS_FLAG_F0_PRIORITY) || defined(__DOXYGEN__) +#define SPC5_EMIOS_FLAG_F0_PRIORITY 7 #endif /** * @brief PWMD2 interrupt priority level setting. */ -#if !defined(SPC5_EMIOS_FLAG_F10_PRIORITY) || defined(__DOXYGEN__) -#define SPC5_EMIOS_FLAG_F10_PRIORITY 7 +#if !defined(SPC5_EMIOS_FLAG_F8_PRIORITY) || defined(__DOXYGEN__) +#define SPC5_EMIOS_FLAG_F8_PRIORITY 7 #endif /** * @brief PWMD3 interrupt priority level setting. */ -#if !defined(SPC5_EMIOS_FLAG_F11_PRIORITY) || defined(__DOXYGEN__) -#define SPC5_EMIOS_FLAG_F11_PRIORITY 7 +#if !defined(SPC5_EMIOS_FLAG_F9_PRIORITY) || defined(__DOXYGEN__) +#define SPC5_EMIOS_FLAG_F9_PRIORITY 7 #endif /** * @brief PWMD4 interrupt priority level setting. */ -#if !defined(SPC5_EMIOS_FLAG_F12_PRIORITY) || defined(__DOXYGEN__) -#define SPC5_EMIOS_FLAG_F12_PRIORITY 7 +#if !defined(SPC5_EMIOS_FLAG_F10_PRIORITY) || defined(__DOXYGEN__) +#define SPC5_EMIOS_FLAG_F10_PRIORITY 7 #endif /** * @brief PWMD5 interrupt priority level setting. */ -#if !defined(SPC5_EMIOS_FLAG_F13_PRIORITY) || defined(__DOXYGEN__) -#define SPC5_EMIOS_FLAG_F13_PRIORITY 7 +#if !defined(SPC5_EMIOS_FLAG_F12_PRIORITY) || defined(__DOXYGEN__) +#define SPC5_EMIOS_FLAG_F12_PRIORITY 7 #endif /** @@ -220,6 +222,7 @@ #define SPC5_EMIOS_FLAG_F23_PRIORITY 7 #endif +#if SPC5_EMIOS_NUM_CHANNELS == 24 /** * @brief PWMD9 interrupt priority level setting. */ @@ -247,6 +250,7 @@ #if !defined(SPC5_EMIOS_FLAG_F22_PRIORITY) || defined(__DOXYGEN__) #define SPC5_EMIOS_FLAG_F22_PRIORITY 7 #endif +#endif /** @} */ /*===========================================================================*/ @@ -257,18 +261,29 @@ #error "EMIOS not present in the selected device" #endif -#define SPC5_PWM_USE_EMIOS (SPC5_PWM_USE_EMIOS_CH9 || \ +#if SPC5_EMIOS_NUM_CHANNELS == 16 +#define SPC5_PWM_USE_EMIOS (SPC5_PWM_USE_EMIOS_CH0 || \ + SPC5_PWM_USE_EMIOS_CH8 || \ + SPC5_PWM_USE_EMIOS_CH9 || \ SPC5_PWM_USE_EMIOS_CH10 || \ - SPC5_PWM_USE_EMIOS_CH11 || \ SPC5_PWM_USE_EMIOS_CH12 || \ - SPC5_PWM_USE_EMIOS_CH13 || \ SPC5_PWM_USE_EMIOS_CH14 || \ SPC5_PWM_USE_EMIOS_CH15 || \ + SPC5_PWM_USE_EMIOS_CH23) +#elif SPC5_EMIOS_NUM_CHANNELS == 24 +#define SPC5_PWM_USE_EMIOS (SPC5_PWM_USE_EMIOS_CH0 || \ + SPC5_PWM_USE_EMIOS_CH8 || \ + SPC5_PWM_USE_EMIOS_CH9 || \ + SPC5_PWM_USE_EMIOS_CH10 || \ + SPC5_PWM_USE_EMIOS_CH12 || \ + SPC5_PWM_USE_EMIOS_CH14 || \ + SPC5_PWM_USE_EMIOS_CH15 || \ + SPC5_PWM_USE_EMIOS_CH23 || \ SPC5_PWM_USE_EMIOS_CH19 || \ SPC5_PWM_USE_EMIOS_CH20 || \ SPC5_PWM_USE_EMIOS_CH21 || \ - SPC5_PWM_USE_EMIOS_CH22 || \ - SPC5_PWM_USE_EMIOS_CH23) + SPC5_PWM_USE_EMIOS_CH22) +#endif #if !SPC5_PWM_USE_EMIOS #error "PWM driver activated but no Channels assigned" @@ -387,23 +402,23 @@ struct PWMDriver { /* External declarations. */ /*===========================================================================*/ -#if SPC5_PWM_USE_EMIOS_CH9 && !defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH0 && !defined(__DOXYGEN__) extern PWMDriver PWMD1; #endif -#if SPC5_PWM_USE_EMIOS_CH10 && !defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH8 && !defined(__DOXYGEN__) extern PWMDriver PWMD2; #endif -#if SPC5_PWM_USE_EMIOS_CH11 && !defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH9 && !defined(__DOXYGEN__) extern PWMDriver PWMD3; #endif -#if SPC5_PWM_USE_EMIOS_CH12 && !defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH10 && !defined(__DOXYGEN__) extern PWMDriver PWMD4; #endif -#if SPC5_PWM_USE_EMIOS_CH13 && !defined(__DOXYGEN__) +#if SPC5_PWM_USE_EMIOS_CH12 && !defined(__DOXYGEN__) extern PWMDriver PWMD5; #endif -- cgit v1.2.3