From d9071d4f1a59f8e42ce72c1044e08221a089e185 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 6 Jan 2018 16:39:35 +0000 Subject: Improved scatter file for STM32H743. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11229 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- .../startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld | 33 ++++++++++++---------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld index a7de36fd0..07db18ce0 100755 --- a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld @@ -17,11 +17,13 @@ /* * ST32F746xG generic setup. * - * RAM0 - Data, Heap. - * RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH. - * - * Notes: - * BSS is placed in DTCM RAM in order to simplify DMA buffers management. + * AXI SRAM - BSS, Data, Heap. + * SRAM1+SRAM2 - None. + * SRAM3 - NOCACHE, ETH. + * SRAM4 - None. + * DTCM-RAM - Main Stack, Process Stack. + * ITCM-RAM - None. + * BCKP SRAM - None. */ MEMORY { @@ -34,13 +36,13 @@ MEMORY flash6 : org = 0x00000000, len = 0 flash7 : org = 0x00000000, len = 0 ram0 : org = 0x24000000, len = 512k /* AXI SRAM */ - ram1 : org = 0x30000000, len = 288k /* AHB SRAM1+SRAM2+SRAM3 */ - ram2 : org = 0x38000000, len = 64k /* AHB SRAM4 */ - ram3 : org = 0x20000000, len = 128k /* DTCM-RAM */ - ram4 : org = 0x00000000, len = 64k /* ITCM-RAM */ - ram5 : org = 0x38800000, len = 4k /* BCKP SRAM */ - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 + ram1 : org = 0x30000000, len = 256k /* AHB SRAM1+SRAM2 */ + ram2 : org = 0x30000000, len = 288k /* AHB SRAM1+SRAM2+SRAM3 */ + ram3 : org = 0x30040000, len = 32k /* AHB SRAM3 */ + ram4 : org = 0x38000000, len = 64k /* AHB SRAM4 */ + ram5 : org = 0x20000000, len = 128k /* DTCM-RAM */ + ram6 : org = 0x00000000, len = 64k /* ITCM-RAM */ + ram7 : org = 0x38800000, len = 4k /* BCKP SRAM */ } /* For each data/text section two region are defined, a virtual region @@ -71,11 +73,11 @@ REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); /* RAM region to be used for Main stack. This stack accommodates the processing of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram3); +REGION_ALIAS("MAIN_STACK_RAM", ram5); /* RAM region to be used for the process stack. This is the stack used by the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram3); +REGION_ALIAS("PROCESS_STACK_RAM", ram5); /* RAM region to be used for data segment.*/ REGION_ALIAS("DATA_RAM", ram0); @@ -91,7 +93,8 @@ REGION_ALIAS("HEAP_RAM", ram0); INCLUDE rules_stacks.ld /*===========================================================================*/ -/* Custom sections for STM32F7xx. */ +/* Custom sections for STM32H7xx. */ +/* SRAM3 is assumed to be marked non-cacheable using MPU. */ /*===========================================================================*/ /* RAM region to be used for nocache segment.*/ -- cgit v1.2.3