From ce0b1af78d0c382696fdf00bf32bb2cecbfd7f50 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 29 Nov 2008 12:15:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@523 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/ARMCM3-STM32F103-GCC/main.c | 2 +- ports/ARM7/chcore.h | 48 ++++++++++---------- ports/ARMCM3/chcore.c | 8 ++-- ports/ARMCM3/chcore.h | 96 +++++++++++++++++++++++++-------------- readme.txt | 2 + src/lib/ch.hpp | 2 +- 6 files changed, 92 insertions(+), 66 deletions(-) diff --git a/demos/ARMCM3-STM32F103-GCC/main.c b/demos/ARMCM3-STM32F103-GCC/main.c index 055fa3a45..ec59c4ffd 100644 --- a/demos/ARMCM3-STM32F103-GCC/main.c +++ b/demos/ARMCM3-STM32F103-GCC/main.c @@ -26,7 +26,7 @@ /* * Red LEDs blinker thread, times are in milliseconds. */ -static WorkingArea(waThread1, 128); +static WORKING_AREA(waThread1, 128); static msg_t Thread1(void *arg) { while (TRUE) { diff --git a/ports/ARM7/chcore.h b/ports/ARM7/chcore.h index 86f138669..74d3d4890 100644 --- a/ports/ARM7/chcore.h +++ b/ports/ARM7/chcore.h @@ -30,37 +30,40 @@ */ typedef uint32_t stkalign_t; -typedef void *regarm; +/* + * Generic ARM register. + */ +typedef void *regarm_t; /* * Interrupt saved context. */ struct extctx { - regarm spsr_irq; - regarm lr_irq; - regarm r0; - regarm r1; - regarm r2; - regarm r3; - regarm r12; - regarm lr_usr; + regarm_t spsr_irq; + regarm_t lr_irq; + regarm_t r0; + regarm_t r1; + regarm_t r2; + regarm_t r3; + regarm_t r12; + regarm_t lr_usr; }; /* * System saved context. */ struct intctx { - regarm r4; - regarm r5; - regarm r6; + regarm_t r4; + regarm_t r5; + regarm_t r6; #ifndef CH_CURRP_REGISTER_CACHE - regarm r7; + regarm_t r7; #endif - regarm r8; - regarm r9; - regarm r10; - regarm r11; - regarm lr; + regarm_t r8; + regarm_t r9; + regarm_t r10; + regarm_t r11; + regarm_t lr; }; /* @@ -122,21 +125,18 @@ extern "C" { #define INT_REQUIRED_STACK 0 #endif /* !THUMB */ -/* - * Enforces a 32 bit alignment for a stack area size value. - */ #define STACK_ALIGN(n) ((((n) - 1) | sizeof(stkalign_t)) + 1) +#define StackAlign(n) STACK_ALIGN(n) #define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \ sizeof(struct intctx) + \ sizeof(struct extctx) + \ (n) + \ INT_REQUIRED_STACK) +#define UserStackSize(n) THD_WA_SIZE(n) -/* - * Declares a 32bit aligned thread working area. - */ #define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n)]; +#define WorkingArea(s, n) WORKING_AREA(s, n) #ifdef THUMB #define chSysSwitchI chSysSwitchI_thumb diff --git a/ports/ARMCM3/chcore.c b/ports/ARMCM3/chcore.c index 2944c5ae2..386a7dff9 100644 --- a/ports/ARMCM3/chcore.c +++ b/ports/ARMCM3/chcore.c @@ -24,7 +24,7 @@ * System idle thread loop. */ __attribute__((weak)) -void _IdleThread(void *p) { +void _idle(void *p) { while (TRUE) { #if ENABLE_WFI_IDLE != 0 @@ -60,11 +60,9 @@ void chSysHalt(void) { __attribute__((naked, weak)) void threadstart(void) { - asm volatile ( \ - "blx r1 \n\t" \ + asm volatile ("blx r1 \n\t" \ "bl chThdExit \n\t" \ - "bl chSysHalt \n\t" \ - ); + "bl chSysHalt "); } /* diff --git a/ports/ARMCM3/chcore.h b/ports/ARMCM3/chcore.h index 0f07ba369..d4b3dd3bc 100644 --- a/ports/ARMCM3/chcore.h +++ b/ports/ARMCM3/chcore.h @@ -20,10 +20,6 @@ #ifndef _CHCORE_H_ #define _CHCORE_H_ -#define CH_ARCHITECTURE_ARMCM3 - -typedef void *regarm; - /* * Port-related configuration parameters. */ @@ -31,6 +27,21 @@ typedef void *regarm; #define BASEPRI_KERNEL 0x10 /* BASEPRI level within kernel lock. */ #define ENABLE_WFI_IDLE 0 /* Enables the use of the WFI ins. */ +/** + * Macro defining the ARM Cortex-M3 architecture. + */ +#define CH_ARCHITECTURE_ARMCM3 + +/* + * 32 bit stack alignment. + */ +typedef uint32_t stkalign_t; + +/* + * Generic ARM register. + */ +typedef void *regarm_t; + /* * Interrupt saved context, empty in this architecture. */ @@ -41,26 +52,26 @@ struct extctx { * System saved context. */ struct intctx { - regarm basepri; - regarm r4; - regarm r5; - regarm r6; + regarm_t basepri; + regarm_t r4; + regarm_t r5; + regarm_t r6; #ifndef CH_CURRP_REGISTER_CACHE - regarm r7; + regarm_t r7; #endif - regarm r8; - regarm r9; - regarm r10; - regarm r11; - regarm lr_exc; - regarm r0; - regarm r1; - regarm r2; - regarm r3; - regarm r12; - regarm lr_thd; - regarm pc; - regarm xpsr; + regarm_t r8; + regarm_t r9; + regarm_t r10; + regarm_t r11; + regarm_t lr_exc; + regarm_t r0; + regarm_t r1; + regarm_t r2; + regarm_t r3; + regarm_t r12; + regarm_t lr_thd; + regarm_t pc; + regarm_t xpsr; }; /* @@ -82,11 +93,11 @@ typedef struct { wsize - \ sizeof(struct intctx)); \ tp->p_ctx.r13->basepri = BASEPRI_USER; \ - tp->p_ctx.r13->lr_exc = (regarm)0xFFFFFFFD; \ + tp->p_ctx.r13->lr_exc = (regarm_t)0xFFFFFFFD; \ tp->p_ctx.r13->r0 = arg; \ tp->p_ctx.r13->r1 = pf; \ tp->p_ctx.r13->pc = threadstart; \ - tp->p_ctx.r13->xpsr = (regarm)0x01000000; \ + tp->p_ctx.r13->xpsr = (regarm_t)0x01000000; \ } #define chSysLock() { \ @@ -108,13 +119,22 @@ typedef struct { } #define INT_REQUIRED_STACK 0 -#define StackAlign(n) ((((n) - 1) | 3) + 1) -#define UserStackSize(n) StackAlign(sizeof(Thread) + \ - sizeof(struct intctx) + \ - sizeof(struct extctx) + \ - (n) + \ - INT_REQUIRED_STACK) -#define WorkingArea(s, n) uint32_t s[UserStackSize(n) >> 2]; + +/* + * Enforces a 32 bit alignment for a stack area size value. + */ +#define STACK_ALIGN(n) ((((n) - 1) | sizeof(stkalign_t)) + 1) +#define StackAlign(n) STACK_ALIGN(n) + +#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \ + sizeof(struct intctx) + \ + sizeof(struct extctx) + \ + (n) + \ + INT_REQUIRED_STACK) +#define UserStackSize(n) THD_WA_SIZE(n) + +#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n)]; +#define WorkingArea(s, n) WORKING_AREA(s, n) /* called on each interrupt entry, currently nothing is done */ #define chSysIRQEnterI() @@ -125,10 +145,16 @@ typedef struct { } #define IDLE_THREAD_STACK_SIZE 0 -void _IdleThread(void *p) __attribute__((noreturn)); -void chSysHalt(void); -void chSysPuts(char *msg); -void threadstart(void); +#ifdef __cplusplus +extern "C" { +#endif + void _idle(void *p) __attribute__((weak, noreturn)); + void chSysHalt(void); + void chSysPuts(char *msg); + void threadstart(void); +#ifdef __cplusplus +} +#endif #endif /* _CHCORE_H_ */ diff --git a/readme.txt b/readme.txt index ab7b6b182..d1452860f 100644 --- a/readme.txt +++ b/readme.txt @@ -75,6 +75,8 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process, *** 0.8.2 *** - FIX: Duplicated sections in the documentation removed. +- FIX: Minor problem in Cortex-M3 port affecting chSysHalt() and chSysPuts() + functions when the kernel is compiled with G++. - NEW: Added chPoolAllocI() and chPoolFreeI() APIs in order to allow the use of memory pools from interrupt handlers and timer callbacks. - CHANGE: The macros WorkingArea(), UserStackSize() and StackAlign() are now diff --git a/src/lib/ch.hpp b/src/lib/ch.hpp index 79e40e32b..e65e4fdbd 100644 --- a/src/lib/ch.hpp +++ b/src/lib/ch.hpp @@ -187,7 +187,7 @@ namespace chibios_rt { template class EnhancedThread : public BaseThread { protected: - WorkingArea(wa, N); // Thread working area. + WORKING_AREA(wa, N); // Thread working area. public: const char *name; -- cgit v1.2.3