From c44880635c6c6f8b7b026c79ae5ec1e49e38541c Mon Sep 17 00:00:00 2001 From: areviu Date: Sun, 25 Mar 2018 09:16:57 +0000 Subject: added gcm for sama crypto git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11851 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/hal/ports/SAMA/LLD/CRYPTOv1/driver.mk | 3 +- os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.h | 1 + os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.c | 215 ++++++++++++++ os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.h | 25 ++ os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.c | 91 ++++-- os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.h | 17 +- test/crypto/configuration.xml | 357 ++++++++++++++++++++++- test/crypto/crypto_test.mk | 4 +- test/crypto/source/test/cry_test_root.c | 3 + test/crypto/source/test/cry_test_root.h | 11 + test/crypto/source/test/cry_test_sequence_008.c | 357 +++++++++++++++++++++++ test/crypto/source/test/cry_test_sequence_008.h | 27 ++ test/crypto/source/testref/ref_gcm.c | 77 +++++ test/crypto/source/testref/ref_gcm.h | 82 ++++++ 14 files changed, 1239 insertions(+), 31 deletions(-) create mode 100644 os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.c create mode 100644 os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.h create mode 100644 test/crypto/source/test/cry_test_sequence_008.c create mode 100644 test/crypto/source/test/cry_test_sequence_008.h create mode 100644 test/crypto/source/testref/ref_gcm.c create mode 100644 test/crypto/source/testref/ref_gcm.h diff --git a/os/hal/ports/SAMA/LLD/CRYPTOv1/driver.mk b/os/hal/ports/SAMA/LLD/CRYPTOv1/driver.mk index 9673bb649..24fcc73b3 100644 --- a/os/hal/ports/SAMA/LLD/CRYPTOv1/driver.mk +++ b/os/hal/ports/SAMA/LLD/CRYPTOv1/driver.mk @@ -1,7 +1,8 @@ PLATFORMSRC +=$(CHIBIOS)/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.c \ $(CHIBIOS)/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_aes_lld.c \ $(CHIBIOS)/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_tdes_lld.c \ - $(CHIBIOS)/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.c + $(CHIBIOS)/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.c \ + $(CHIBIOS)/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.c diff --git a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.h b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.h index 029a209ac..b90535392 100644 --- a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.h +++ b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.h @@ -62,6 +62,7 @@ extern void samaCryptoDriverDisable(CRYDriver *cryp); #include "sama_aes_lld.h" #include "sama_tdes_lld.h" #include "sama_sha_lld.h" +#include "sama_gcm_lld.h" #endif /* HAL_USE_CRY */ diff --git a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.c b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.c new file mode 100644 index 000000000..2496c03d3 --- /dev/null +++ b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.c @@ -0,0 +1,215 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. + */ +#include "hal.h" +#include +#if (HAL_USE_CRY == TRUE) || defined(__DOXYGEN__) + +#include "sama_crypto_lld.h" + +static void incr32(uint8_t* j0) +{ + + uint32_t counter = j0[15] | j0[14] << 0x8 | j0[13] << 0x10 | j0[12] << 0x18; + + counter++; + + j0[12] = (counter>>24) & 0xFF; + j0[13] = (counter>>16) & 0xFF; + j0[14] = (counter>>8) & 0xFF; + j0[15] = counter & 0xFF; +} + +static cryerror_t sama_gcm_lld_process_dma(CRYDriver *cryp,cgmcontext * cxt) +{ +#if defined(SAMA_DMA_REQUIRED) + + osalDbgAssert(cryp->thread == NULL, "already waiting"); + + + //set chunk size + cryp->dmachunksize = DMA_CHUNK_SIZE_4; + + if ((cryp->config->cfbs != AES_CFBS_128)) + cryp->dmachunksize = DMA_CHUNK_SIZE_1; + + //set dma width + cryp->dmawith = DMA_DATA_WIDTH_WORD; + + if (cryp->config->cfbs == AES_CFBS_16) + cryp->dmawith = DMA_DATA_WIDTH_HALF_WORD; + if (cryp->config->cfbs == AES_CFBS_8) + cryp->dmawith = DMA_DATA_WIDTH_BYTE; + + cryp->rxdmamode = XDMAC_CC_TYPE_PER_TRAN | + XDMAC_CC_PROT_SEC | + XDMAC_CC_MBSIZE_SINGLE | + XDMAC_CC_DSYNC_PER2MEM | XDMAC_CC_CSIZE(cryp->dmachunksize) | + XDMAC_CC_DWIDTH(cryp->dmawith) | + XDMAC_CC_SIF_AHB_IF1 | + XDMAC_CC_DIF_AHB_IF0 | + XDMAC_CC_SAM_FIXED_AM | + XDMAC_CC_DAM_INCREMENTED_AM | + XDMAC_CC_PERID(PERID_AES_RX); + + cryp->txdmamode = XDMAC_CC_TYPE_PER_TRAN | + XDMAC_CC_PROT_SEC | + XDMAC_CC_MBSIZE_SINGLE | + XDMAC_CC_DSYNC_MEM2PER | XDMAC_CC_CSIZE(cryp->dmachunksize) | + XDMAC_CC_DWIDTH(cryp->dmawith) | + XDMAC_CC_SIF_AHB_IF0 | + XDMAC_CC_DIF_AHB_IF1 | + XDMAC_CC_SAM_INCREMENTED_AM | + XDMAC_CC_DAM_FIXED_AM | + XDMAC_CC_PERID(PERID_AES_TX); + + dmaChannelSetMode(cryp->dmarx, cryp->rxdmamode); + dmaChannelSetMode(cryp->dmatx, cryp->txdmamode); + + // Writing channel + dmaChannelSetSource(cryp->dmatx, cxt->in); + dmaChannelSetDestination(cryp->dmatx, AES->AES_IDATAR); + dmaChannelSetTransactionSize(cryp->dmatx, ( cxt->c_size / DMA_DATA_WIDTH_TO_BYTE(cryp->dmawith))); + + + // Reading channel + dmaChannelSetSource(cryp->dmarx, AES->AES_ODATAR); + dmaChannelSetDestination(cryp->dmarx, cxt->out); + dmaChannelSetTransactionSize(cryp->dmarx, ( cxt->c_size / DMA_DATA_WIDTH_TO_BYTE(cryp->dmawith))); + + AES->AES_MR |= (((AES_MR_SMOD_Msk & (AES_MR_SMOD_IDATAR0_START))) + | AES_MR_CKEY_PASSWD); + + //Enable aes interrupt + AES->AES_IER = AES_IER_DATRDY; + + osalSysLock(); + + dmaChannelEnable(cryp->dmarx); + dmaChannelEnable(cryp->dmatx); + + osalThreadSuspendS(&cryp->thread); + + osalSysUnlock(); + + +#endif //#if defined(SAMA_DMA_REQUIRED) + return CRY_NOERROR; + +} + +cryerror_t sama_gcm_lld_process(CRYDriver *cryp,cgmcontext * cxt) +{ + cryerror_t ret; + uint32_t *ref32; + uint8_t i; + uint8_t J0[16] = { 0x00 }; + + + osalMutexLock(&cryp->mutex); + + + //AES soft reset + AES->AES_CR = AES_CR_SWRST; + + //AES set op mode + AES->AES_MR =((AES_MR_OPMOD_Msk & (AES_MR_OPMOD_GCM)) | AES_MR_GTAGEN | AES_MR_CKEY_PASSWD); + + + //AES set key size + ret = sama_aes_lld_set_key_size(cryp->key0_size); + + + if (ret == CRY_NOERROR) { + + AES->AES_MR |= ( ((AES_MR_SMOD_Msk & (AES_MR_SMOD_MANUAL_START))) | AES_MR_CKEY_PASSWD); + + sama_aes_lld_write_key(cryp->key0_buffer,NULL, cryp->key0_size); + + AES->AES_CR = AES_CR_START; + + while ((AES->AES_ISR & AES_ISR_DATRDY) != AES_ISR_DATRDY); + + //J0 + + memcpy(J0, cxt->params.iv, 16); // copy the IV to the first 12 bytes of J0 + + incr32(J0); + + // Write incr32(J0) into IV. + + ref32 = (uint32_t*)J0; + AES->AES_IVR[0] = ref32[0]; + AES->AES_IVR[1] = ref32[1]; + AES->AES_IVR[2] = ref32[2]; + AES->AES_IVR[3] = ref32[3]; + + + AES->AES_AADLENR = cxt->aadsize; + AES->AES_CLENR = cxt->c_size; + + if (cxt->params.encrypt) + AES->AES_MR |= AES_MR_CIPHER; + else + AES->AES_MR &= ~AES_MR_CIPHER; + + AES->AES_MR |= AES_MR_GTAGEN| AES_MR_CKEY_PASSWD; + + + for (i = 0; i < cxt->aadsize; i += cxt->params.block_size) { + + sama_aes_lld_set_input((uint32_t *) ((cxt->aad) + i)); + + AES->AES_CR = AES_CR_START; + + while ((AES->AES_ISR & AES_ISR_DATRDY) != AES_ISR_DATRDY); + + } + + if (cryp->config->transfer_mode == TRANSFER_POLLING) { + for (i = 0; i < cxt->c_size; i += cxt->params.block_size) { + + sama_aes_lld_set_input((uint32_t *) ((cxt->in) + i)); + + AES->AES_CR = AES_CR_START; + + while ((AES->AES_ISR & AES_ISR_DATRDY) != AES_ISR_DATRDY); + + sama_aes_lld_get_output((uint32_t *) ((cxt->out) + i)); + } + } + else + { + sama_gcm_lld_process_dma(cryp,cxt); + } + + while ((AES->AES_ISR & AES_ISR_TAGRDY) != AES_ISR_TAGRDY); + + ref32 = (uint32_t*)cxt->authtag; + + for (i = 0; i < 4; i++) { + ref32[i] =AES->AES_TAGR[i]; + } + + + } + osalMutexUnlock(&cryp->mutex); + + return ret; + +} + + +#endif diff --git a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.h b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.h new file mode 100644 index 000000000..1ce7c3c19 --- /dev/null +++ b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_gcm_lld.h @@ -0,0 +1,25 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ +#ifndef CRYPTOLIB_LLD_SAMA_GCM_H_ +#define CRYPTOLIB_LLD_SAMA_GCM_H_ + + + +cryerror_t sama_gcm_lld_process(CRYDriver *cryp,cgmcontext * cxt); + + + +#endif /* CRYPTOLIB_LLD_SAMA_GCM_H_ */ diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.c b/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.c index 5f1c62339..01209bc6e 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.c +++ b/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.c @@ -677,13 +677,13 @@ cryerror_t cry_lld_encrypt_AES_CTR(CRYDriver *cryp, cryerror_t ret = CRY_NOERROR; aesparams params; + if(key_id != 0 ) return CRY_ERR_INV_KEY_ID; if (!(cryp->enabledPer & AES_PER)) { cryp->enabledPer |= AES_PER; - pmcEnableAES() - ; + pmcEnableAES(); } params.encrypt = 1; @@ -740,8 +740,7 @@ cryerror_t cry_lld_decrypt_AES_CTR(CRYDriver *cryp, if (!(cryp->enabledPer & AES_PER)) { cryp->enabledPer |= AES_PER; - pmcEnableAES() - ; + pmcEnableAES(); } params.encrypt = 0; @@ -787,6 +786,9 @@ cryerror_t cry_lld_decrypt_AES_CTR(CRYDriver *cryp, * * @notapi */ + +uint8_t gcmbuff[32*2]; + cryerror_t cry_lld_encrypt_AES_GCM(CRYDriver *cryp, crykey_t key_id, size_t size, @@ -797,17 +799,36 @@ cryerror_t cry_lld_encrypt_AES_GCM(CRYDriver *cryp, const uint8_t *aad, uint8_t *authtag) { - (void)cryp; - (void)key_id; - (void)size; - (void)in; - (void)out; - (void)iv; - (void)aadsize; - (void)aad; - (void)authtag; - - return CRY_ERR_INV_ALGO; + cryerror_t ret = CRY_NOERROR; + cgmcontext ctx; + + if (key_id != 0) + return CRY_ERR_INV_KEY_ID; + + if (!(cryp->enabledPer & AES_PER)) { + cryp->enabledPer |= AES_PER; + pmcEnableAES(); + } + + ctx.params.encrypt = 1; + ctx.params.block_size = 16; + ctx.params.mode = AES_MR_OPMOD_GCM; + ctx.params.iv = iv; + + ctx.in = (uint8_t *)in; + ctx.out = out; + ctx.c_size = size; + ctx.aadsize = aadsize; + ctx.aad = (uint8_t *)aad; + ctx.authtag = authtag; + + + + ret = sama_gcm_lld_process(cryp, &ctx); + + + return ret; + } /** @@ -851,17 +872,35 @@ cryerror_t cry_lld_decrypt_AES_GCM(CRYDriver *cryp, const uint8_t *aad, uint8_t *authtag) { - (void)cryp; - (void)key_id; - (void)size; - (void)in; - (void)out; - (void)iv; - (void)aadsize; - (void)aad; - (void)authtag; - - return CRY_ERR_INV_ALGO; + cryerror_t ret = CRY_NOERROR; + cgmcontext ctx; + + if (key_id != 0) + return CRY_ERR_INV_KEY_ID; + + if (!(cryp->enabledPer & AES_PER)) { + cryp->enabledPer |= AES_PER; + pmcEnableAES(); + } + + ctx.params.encrypt = 0; + ctx.params.block_size = 16; + ctx.params.mode = AES_MR_OPMOD_GCM; + ctx.params.iv = iv; + + ctx.in =(uint8_t *) in; + ctx.out = out; + ctx.c_size = size; + ctx.aadsize = aadsize; + ctx.aad = (uint8_t *)aad; + ctx.authtag = authtag; + + + + ret = sama_gcm_lld_process(cryp, &ctx); + + return ret; + } diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.h b/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.h index 7087e1ead..e6c08ca68 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.h +++ b/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.h @@ -40,7 +40,7 @@ #define CRY_LLD_SUPPORTS_AES_CBC TRUE #define CRY_LLD_SUPPORTS_AES_CFB TRUE #define CRY_LLD_SUPPORTS_AES_CTR TRUE -#define CRY_LLD_SUPPORTS_AES_GCM FALSE +#define CRY_LLD_SUPPORTS_AES_GCM TRUE #define CRY_LLD_SUPPORTS_DES TRUE #define CRY_LLD_SUPPORTS_DES_ECB TRUE #define CRY_LLD_SUPPORTS_DES_CBC TRUE @@ -84,6 +84,21 @@ typedef struct const uint8_t *iv; }aesparams; +typedef struct +{ + aesparams params; + + + size_t aadsize; + size_t c_size; + uint8_t *in; + uint8_t *out; + + uint8_t * aad; + uint8_t *authtag; + +}cgmcontext; + typedef enum { TRANSFER_DMA = 0, TRANSFER_POLLING, diff --git a/test/crypto/configuration.xml b/test/crypto/configuration.xml index dc894e692..846702494 100644 --- a/test/crypto/configuration.xml +++ b/test/crypto/configuration.xml @@ -63,6 +63,13 @@ extern void cryptoTest_printArray32(bool isLE,const uint32_t *a,size_t len); #define SHA_LEN_2 64 #define SHA_LEN_3 128 +#define TEST_GCM_KEY1_LEN 32 +#define TEST_P_LEN 60 +#define TEST_A_LEN 20 +#define TEST_IV1_LEN 12 +#define TEST_CL_LEN 60 +#define TEST_TL_LEN 16 + extern const char test_plain_data[TEST_DATA_BYTE_LEN]; extern uint32_t msg_clear[TEST_MSG_DATA_WORD_LEN]; extern uint32_t msg_encrypted[TEST_MSG_DATA_WORD_LEN]; @@ -73,6 +80,9 @@ extern const uint8_t sha_msg0[SHA_LEN_0]; extern const uint8_t sha_msg1[SHA_LEN_1]; extern const uint8_t sha_msg2[SHA_LEN_2]; extern const uint8_t sha_msg3[SHA_LEN_3]; + + + ]]> @@ -128,6 +138,7 @@ const uint8_t sha_msg2[SHA_LEN_2] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa const uint8_t sha_msg3[SHA_LEN_3] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"; + ALIGNED_VAR(4) uint32_t msg_clear[TEST_MSG_DATA_WORD_LEN]; ALIGNED_VAR(4) uint32_t msg_encrypted[TEST_MSG_DATA_WORD_LEN]; ALIGNED_VAR(4) uint32_t msg_decrypted[TEST_MSG_DATA_WORD_LEN]; @@ -2292,6 +2303,9 @@ for (int i = 0; i < TEST_DATA_WORD_LEN; i++) { + + + Internal Tests @@ -3286,9 +3300,348 @@ for (int i = 0; i < 16; i++) { - + - + + + + Internal Tests + + + GCM + + + GCM testing + + + + + + +#include "ref_gcm.h" +#define plaintext msg_clear +#define cypher msg_encrypted +#define authtag msg_decrypted + +static const CRYConfig config_Polling= +{ + TRANSFER_POLLING, + 0 +}; + +static const CRYConfig config_DMA= +{ + TRANSFER_DMA, + 0 +}; + +struct test_el_t +{ + uint32_t size; + const uint8_t * data; + +}; +struct test_gcm_t +{ + struct test_el_t key; + struct test_el_t p; + struct test_el_t iv; + struct test_el_t aad; + struct test_el_t c; + struct test_el_t t; + +}; +#define TEST_GCM_LEN 3 + +const struct test_gcm_t test_gcm_k[TEST_GCM_LEN]={ + + { {K3_LEN,K3},{P3_LEN,P3},{IV3_LEN,IV3},{AAD3_LEN,A3},{C3_LEN,C3},{T3_LEN,T3} }, + { {K4_LEN,K4},{P4_LEN,P4},{IV4_LEN,IV4},{AAD4_LEN,A4},{C4_LEN,C4},{T4_LEN,T4} }, + { {K5_LEN,K5},{P5_LEN,P5},{IV5_LEN,IV5},{AAD5_LEN,A5},{C5_LEN,C5},{T5_LEN,T5} } +}; + + + + ]]> + + + + + GCM Polling + + + testing GCM in polled mode + + + + + + + + + + + + + + + + + + + loading the key, encrypt and decrypt + + + + + + + + + + + + + + + + + + + + + + GCM DMA + + + testing GCM in DMA mode + + + + + + + + + + + + + + + + + + + loading the key, encrypt and decrypt + + + + + + + + + + + + + + + + + + + + + + + diff --git a/test/crypto/crypto_test.mk b/test/crypto/crypto_test.mk index 0d7310271..1e53235f3 100644 --- a/test/crypto/crypto_test.mk +++ b/test/crypto/crypto_test.mk @@ -3,13 +3,15 @@ TESTSRC += ${CHIBIOS}/test/crypto/source/test/cry_test_root.c \ ${CHIBIOS}/test/crypto/source/testref/ref_aes.c \ ${CHIBIOS}/test/crypto/source/testref/ref_des.c \ ${CHIBIOS}/test/crypto/source/testref/ref_sha.c \ + ${CHIBIOS}/test/crypto/source/testref/ref_gcm.c \ ${CHIBIOS}/test/crypto/source/test/cry_test_sequence_001.c \ ${CHIBIOS}/test/crypto/source/test/cry_test_sequence_002.c \ ${CHIBIOS}/test/crypto/source/test/cry_test_sequence_003.c \ ${CHIBIOS}/test/crypto/source/test/cry_test_sequence_004.c \ ${CHIBIOS}/test/crypto/source/test/cry_test_sequence_005.c \ ${CHIBIOS}/test/crypto/source/test/cry_test_sequence_006.c \ - ${CHIBIOS}/test/crypto/source/test/cry_test_sequence_007.c + ${CHIBIOS}/test/crypto/source/test/cry_test_sequence_007.c \ + ${CHIBIOS}/test/crypto/source/test/cry_test_sequence_008.c # Required include directories TESTINC += ${CHIBIOS}/test/crypto/source/testref \ ${CHIBIOS}/test/crypto/source/test diff --git a/test/crypto/source/test/cry_test_root.c b/test/crypto/source/test/cry_test_root.c index 519e1fa73..9c8feb713 100644 --- a/test/crypto/source/test/cry_test_root.c +++ b/test/crypto/source/test/cry_test_root.c @@ -28,6 +28,7 @@ * - @subpage cry_test_sequence_005 * - @subpage cry_test_sequence_006 * - @subpage cry_test_sequence_007 + * - @subpage cry_test_sequence_008 * . */ @@ -56,6 +57,7 @@ const testsequence_t * const cry_test_suite_array[] = { &cry_test_sequence_005, &cry_test_sequence_006, &cry_test_sequence_007, + &cry_test_sequence_008, NULL }; @@ -122,6 +124,7 @@ const uint8_t sha_msg2[SHA_LEN_2] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa const uint8_t sha_msg3[SHA_LEN_3] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"; + ALIGNED_VAR(4) uint32_t msg_clear[TEST_MSG_DATA_WORD_LEN]; ALIGNED_VAR(4) uint32_t msg_encrypted[TEST_MSG_DATA_WORD_LEN]; ALIGNED_VAR(4) uint32_t msg_decrypted[TEST_MSG_DATA_WORD_LEN]; diff --git a/test/crypto/source/test/cry_test_root.h b/test/crypto/source/test/cry_test_root.h index f33cb5c1a..110dd851f 100644 --- a/test/crypto/source/test/cry_test_root.h +++ b/test/crypto/source/test/cry_test_root.h @@ -31,6 +31,7 @@ #include "cry_test_sequence_005.h" #include "cry_test_sequence_006.h" #include "cry_test_sequence_007.h" +#include "cry_test_sequence_008.h" #if !defined(__DOXYGEN__) @@ -75,6 +76,13 @@ extern void cryptoTest_printArray32(bool isLE,const uint32_t *a,size_t len); #define SHA_LEN_2 64 #define SHA_LEN_3 128 +#define TEST_GCM_KEY1_LEN 32 +#define TEST_P_LEN 60 +#define TEST_A_LEN 20 +#define TEST_IV1_LEN 12 +#define TEST_CL_LEN 60 +#define TEST_TL_LEN 16 + extern const char test_plain_data[TEST_DATA_BYTE_LEN]; extern uint32_t msg_clear[TEST_MSG_DATA_WORD_LEN]; extern uint32_t msg_encrypted[TEST_MSG_DATA_WORD_LEN]; @@ -86,6 +94,9 @@ extern const uint8_t sha_msg1[SHA_LEN_1]; extern const uint8_t sha_msg2[SHA_LEN_2]; extern const uint8_t sha_msg3[SHA_LEN_3]; + + + #endif /* !defined(__DOXYGEN__) */ #endif /* CRY_TEST_ROOT_H */ diff --git a/test/crypto/source/test/cry_test_sequence_008.c b/test/crypto/source/test/cry_test_sequence_008.c new file mode 100644 index 000000000..d22d6b020 --- /dev/null +++ b/test/crypto/source/test/cry_test_sequence_008.c @@ -0,0 +1,357 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "cry_test_root.h" + +/** + * @file cry_test_sequence_008.c + * @brief Test Sequence 008 code. + * + * @page cry_test_sequence_008 [8] GCM + * + * File: @ref cry_test_sequence_008.c + * + *

Description

+ * GCM testing. + * + *

Test Cases

+ * - @subpage cry_test_008_001 + * - @subpage cry_test_008_002 + * . + */ + +/**************************************************************************** + * Shared code. + ****************************************************************************/ + +#include +#include "ref_gcm.h" +#define plaintext msg_clear +#define cypher msg_encrypted +#define authtag msg_decrypted + +static const CRYConfig config_Polling= +{ + TRANSFER_POLLING, + 0 +}; + +static const CRYConfig config_DMA= +{ + TRANSFER_DMA, + 0 +}; + +struct test_el_t +{ + uint32_t size; + const uint8_t * data; + +}; +struct test_gcm_t +{ + struct test_el_t key; + struct test_el_t p; + struct test_el_t iv; + struct test_el_t aad; + struct test_el_t c; + struct test_el_t t; + +}; +#define TEST_GCM_LEN 3 + +const struct test_gcm_t test_gcm_k[TEST_GCM_LEN]={ + + { {K3_LEN,K3},{P3_LEN,P3},{IV3_LEN,IV3},{AAD3_LEN,A3},{C3_LEN,C3},{T3_LEN,T3} }, + { {K4_LEN,K4},{P4_LEN,P4},{IV4_LEN,IV4},{AAD4_LEN,A4},{C4_LEN,C4},{T4_LEN,T4} }, + { {K5_LEN,K5},{P5_LEN,P5},{IV5_LEN,IV5},{AAD5_LEN,A5},{C5_LEN,C5},{T5_LEN,T5} } +}; + + + + + +/**************************************************************************** + * Test cases. + ****************************************************************************/ + +/** + * @page cry_test_008_001 [8.1] GCM Polling + * + *

Description

+ * testing GCM in polled mode. + * + *

Test Steps

+ * - [8.1.1] loading the key, encrypt and decrypt. + * . + */ + +static void cry_test_008_001_setup(void) { + memset(cypher, 0xff, TEST_MSG_DATA_BYTE_LEN); + memset(authtag, 0xff, TEST_MSG_DATA_BYTE_LEN); + cryStart(&CRYD1, &config_Polling); + + +} + +static void cry_test_008_001_teardown(void) { + cryStop(&CRYD1); +} + +static void cry_test_008_001_execute(void) { + cryerror_t ret; + uint32_t *ref; + uint8_t i,len1,len2; + + /* [8.1.1] loading the key, encrypt and decrypt.*/ + test_set_step(1); + { + for (i = 0;iDescription + * testing GCM in DMA mode. + * + *

Test Steps

+ * - [8.2.1] loading the key, encrypt and decrypt. + * . + */ + +static void cry_test_008_002_setup(void) { + memset(cypher, 0xff, TEST_MSG_DATA_BYTE_LEN); + memset(authtag, 0xff, TEST_MSG_DATA_BYTE_LEN); + cryStart(&CRYD1, &config_DMA); + + +} + +static void cry_test_008_002_teardown(void) { + cryStop(&CRYD1); +} + +static void cry_test_008_002_execute(void) { + cryerror_t ret; + uint32_t *ref; + uint8_t i,len1,len2; + + /* [8.2.1] loading the key, encrypt and decrypt.*/ + test_set_step(1); + { + for (i = 0;i