From b1762e9295dfe92f8d682aba3954adde498ff129 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 19 Nov 2011 09:32:59 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3509 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F4xx/adc_lld.c | 16 +++++++--------- testhal/STM32F4xx/ADC/main.c | 30 ++++++++++++++++-------------- testhal/STM32F4xx/ADC/readme.txt | 2 +- 3 files changed, 24 insertions(+), 24 deletions(-) diff --git a/os/hal/platforms/STM32F4xx/adc_lld.c b/os/hal/platforms/STM32F4xx/adc_lld.c index 603b32135..b31ca178c 100644 --- a/os/hal/platforms/STM32F4xx/adc_lld.c +++ b/os/hal/platforms/STM32F4xx/adc_lld.c @@ -266,9 +266,9 @@ void adc_lld_start(ADCDriver *adcp) { } #endif /* STM32_ADC_USE_ADC3 */ - /* ADC initial setup, just resetting control registers in this case.*/ + /* ADC initial setup, starting the analog part.*/ adcp->adc->CR1 = 0; - adcp->adc->CR2 = 0; + adcp->adc->CR2 = ADC_CR2_ADON; } } @@ -332,19 +332,16 @@ void adc_lld_start_conversion(ADCDriver *adcp) { /* ADC setup.*/ adcp->adc->SR = 0; - adcp->adc->CR1 = grpp->cr1 | ADC_CR1_OVRIE | ADC_CR1_SCAN; - adcp->adc->CR2 = grpp->cr2 | ADC_CR2_CONT | ADC_CR2_DMA | ADC_CR2_DDS | - ADC_CR2_ADON; adcp->adc->SMPR1 = grpp->smpr1; adcp->adc->SMPR2 = grpp->smpr2; adcp->adc->SQR1 = grpp->sqr1; adcp->adc->SQR2 = grpp->sqr2; adcp->adc->SQR3 = grpp->sqr3; - /* TODO: According to section 10.3.6 of the reference manual there should - be a 2uS delay between the ADC activation and conversion start.*/ - /* ADC start by raising ADC_CR2_SWSTART.*/ - adcp->adc->CR2 = grpp->cr2 | ADC_CR2_SWSTART | ADC_CR2_CONT | ADC_CR2_DMA | + /* ADC configuration and start, the start is performed using the method + specified in the CR2 configuration, usually ADC_CR2_SWSTART.*/ + adcp->adc->CR1 = grpp->cr1 | ADC_CR1_OVRIE | ADC_CR1_SCAN; + adcp->adc->CR2 = grpp->cr2 | ADC_CR2_CONT | ADC_CR2_DMA | ADC_CR2_DDS | ADC_CR2_ADON; } @@ -360,6 +357,7 @@ void adc_lld_stop_conversion(ADCDriver *adcp) { dmaStreamDisable(adcp->dmastp); adcp->adc->CR1 = 0; adcp->adc->CR2 = 0; + adcp->adc->CR2 = ADC_CR2_ADON; } /** diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c index 103c05b89..221792a57 100644 --- a/testhal/STM32F4xx/ADC/main.c +++ b/testhal/STM32F4xx/ADC/main.c @@ -54,40 +54,42 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. - * Channels: IN10. + * Channels: IN11. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - 0, 0, /* CR1, CR2 */ - ADC_SMPR1_SMP_AN10(ADC_SAMPLE_3), - 0, /* SMPR2 */ + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + ADC_SMPR1_SMP_AN11(ADC_SAMPLE_3), + 0, /* SMPR2 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - 0, /* SQR2 */ - ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) + 0, /* SQR2 */ + ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) }; /* * ADC conversion group. * Mode: Continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + * Channels: IN11, IN12, IN11, IN12, IN11, IN12, Sensor, VRef. */ static const ADCConversionGroup adcgrpcfg2 = { TRUE, ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, - 0, 0, /* CR1, CR2 */ - ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN10(ADC_SAMPLE_56) | + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + ADC_SMPR1_SMP_AN12(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144), - 0, /* SMPR2 */ + 0, /* SMPR2 */ ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), - ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) + ADC_SQR3_SQ6_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | + ADC_SQR3_SQ4_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) }; /* @@ -124,7 +126,7 @@ int main(void) { /* * Setting up analog inputs used by the demo. */ - palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), PAL_MODE_INPUT_ANALOG); /* diff --git a/testhal/STM32F4xx/ADC/readme.txt b/testhal/STM32F4xx/ADC/readme.txt index 24ff92f25..7fd60b1c6 100644 --- a/testhal/STM32F4xx/ADC/readme.txt +++ b/testhal/STM32F4xx/ADC/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32L1xx ADC driver. ** Board Setup ** -- Connect PC0 to 3.3V and PC1 to GND for analog measurements. +- Connect PC1 to 3.3V and PC2 to GND for analog measurements. ** Build Procedure ** -- cgit v1.2.3