From 62f078360f93ff89fd8d3dc4fd4d911dafa592b5 Mon Sep 17 00:00:00 2001 From: isiora Date: Thu, 17 Aug 2017 21:24:31 +0000 Subject: Added matrix H64H32 clock ratio. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10447 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/SAMA/SAMA5D2x/hal_lld.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_lld.h b/os/hal/ports/SAMA/SAMA5D2x/hal_lld.h index f090126da..643afa66e 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/hal_lld.h +++ b/os/hal/ports/SAMA/SAMA5D2x/hal_lld.h @@ -185,6 +185,7 @@ #define SAMA_MCK_MDIV_DIV4 (2 << 8) /**< MCK is divided by 4. */ #define SAMA_MCK_PLLADIV2 (1 << 12) /**< PLLA is divided by 2. */ + /** @} */ /*===========================================================================*/ @@ -405,6 +406,18 @@ #error "PLLADIV2 must be always enabled when Main Clock Divider is 3" #endif +/** + * @brief Matrix H64H32 clock ratio. + */ + +#if ((SAMA_H64MX_H32MX_RATIO == 2) || defined(__DOXYGEN__)) +#define SAMA_H64MX_H32MX_DIV PMC_MCKR_H32MXDIV_H32MXDIV2 +#elif (SAMA_H64MX_H32MX_RATIO == 1) +#define SAMA_H64MX_H32MX_DIV PMC_MCKR_H32MXDIV_H32MXDIV1 +#else +#error "H64MX H32MX clock ratio out of range." +#endif + /** * @brief Processor Clock frequency. */ -- cgit v1.2.3