From 4e3f49400a9f7dd22369f1f286468b59f0115237 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 15 Oct 2011 13:24:40 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3447 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32L_DISCOVERY/board.h | 58 +- demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj | 20 +- demos/ARMCM3-STM32F107/keil/ch.uvproj | 20 +- demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj | 980 ++++++++++++++++++++++++ docs/reports/STM32F100-24-RVCT.txt | 35 +- docs/reports/STM32L152-32-RVCT.txt | 165 ++++ readme.txt | 1 + 7 files changed, 1214 insertions(+), 65 deletions(-) create mode 100644 demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj create mode 100644 docs/reports/STM32L152-32-RVCT.txt diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h index 46e2965fd..f91998a59 100644 --- a/boards/ST_STM32L_DISCOVERY/board.h +++ b/boards/ST_STM32L_DISCOVERY/board.h @@ -56,35 +56,35 @@ * in the initialization code. * Please refer to the STM32 Reference Manual for details. */ -#define PIN_MODE_INPUT(n) (0 << ((n) * 2)) -#define PIN_MODE_OUTPUT(n) (1 << ((n) * 2)) -#define PIN_MODE_ALTERNATE(n) (2 << ((n) * 2)) -#define PIN_MODE_ANALOG(n) (3 << ((n) * 2)) -#define PIN_OTYPE_PUSHPULL(n) (0 << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1 << (n)) -#define PIN_OSPEED_400K(n) (0 << ((n) * 2)) -#define PIN_OSPEED_2M(n) (1 << ((n) * 2)) -#define PIN_OSPEED_10M(n) (2 << ((n) * 2)) -#define PIN_OSPEED_40M(n) (3 << ((n) * 2)) -#define PIN_PUDR_FLOATING(n) (0 << ((n) * 2)) -#define PIN_PUDR_PULLUP(n) (1 << ((n) * 2)) -#define PIN_PUDR_PULLDOWN(n) (2 << ((n) * 2)) -#define PIN_AFIO_AF0(n) (0 << ((n % 8) * 4)) -#define PIN_AFIO_AF1(n) (1 << ((n % 8) * 4)) -#define PIN_AFIO_AF2(n) (2 << ((n % 8) * 4)) -#define PIN_AFIO_AF3(n) (3 << ((n % 8) * 4)) -#define PIN_AFIO_AF4(n) (4 << ((n % 8) * 4)) -#define PIN_AFIO_AF5(n) (5 << ((n % 8) * 4)) -#define PIN_AFIO_AF6(n) (6 << ((n % 8) * 4)) -#define PIN_AFIO_AF7(n) (7 << ((n % 8) * 4)) -#define PIN_AFIO_AF8(n) (8 << ((n % 8) * 4)) -#define PIN_AFIO_AF9(n) (9 << ((n % 8) * 4)) -#define PIN_AFIO_AF10(n) (10 << ((n % 8) * 4)) -#define PIN_AFIO_AF11(n) (11 << ((n % 8) * 4)) -#define PIN_AFIO_AF12(n) (12 << ((n % 8) * 4)) -#define PIN_AFIO_AF13(n) (13 << ((n % 8) * 4)) -#define PIN_AFIO_AF14(n) (14 << ((n % 8) * 4)) -#define PIN_AFIO_AF15(n) (15 << ((n % 8) * 4)) +#define PIN_MODE_INPUT(n) (0U << ((n) * 2)) +#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) +#define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_400K(n) (0U << ((n) * 2)) +#define PIN_OSPEED_2M(n) (1U << ((n) * 2)) +#define PIN_OSPEED_10M(n) (2U << ((n) * 2)) +#define PIN_OSPEED_40M(n) (3U << ((n) * 2)) +#define PIN_PUDR_FLOATING(n) (0U << ((n) * 2)) +#define PIN_PUDR_PULLUP(n) (1U << ((n) * 2)) +#define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2)) +#define PIN_AFIO_AF0(n) (0U << ((n % 8) * 4)) +#define PIN_AFIO_AF1(n) (1U << ((n % 8) * 4)) +#define PIN_AFIO_AF2(n) (2U << ((n % 8) * 4)) +#define PIN_AFIO_AF3(n) (3U << ((n % 8) * 4)) +#define PIN_AFIO_AF4(n) (4U << ((n % 8) * 4)) +#define PIN_AFIO_AF5(n) (5U << ((n % 8) * 4)) +#define PIN_AFIO_AF6(n) (6U << ((n % 8) * 4)) +#define PIN_AFIO_AF7(n) (7U << ((n % 8) * 4)) +#define PIN_AFIO_AF8(n) (8U << ((n % 8) * 4)) +#define PIN_AFIO_AF9(n) (9U << ((n % 8) * 4)) +#define PIN_AFIO_AF10(n) (10U << ((n % 8) * 4)) +#define PIN_AFIO_AF11(n) (11U << ((n % 8) * 4)) +#define PIN_AFIO_AF12(n) (12U << ((n % 8) * 4)) +#define PIN_AFIO_AF13(n) (13U << ((n % 8) * 4)) +#define PIN_AFIO_AF14(n) (14U << ((n % 8) * 4)) +#define PIN_AFIO_AF15(n) (15U << ((n % 8) * 4)) /* * Port A setup. diff --git a/demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj b/demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj index 723042027..7c66aa137 100644 --- a/demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj +++ b/demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj @@ -826,11 +826,6 @@ 1 ..\..\..\os\hal\platforms\STM32\spi_lld.c - - stm32_dma.c - 1 - D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\DMAv1\stm32_dma.c - uart_lld.c 1 @@ -876,11 +871,6 @@ 5 ..\..\..\os\hal\platforms\STM32\spi_lld.h - - stm32_dma.h - 5 - D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\DMAv1\stm32_dma.h - stm32f10x.h 5 @@ -891,6 +881,16 @@ 5 ..\..\..\os\hal\platforms\STM32\uart_lld.h + + stm32_dma.c + 1 + ..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c + + + stm32_dma.h + 5 + ..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h + diff --git a/demos/ARMCM3-STM32F107/keil/ch.uvproj b/demos/ARMCM3-STM32F107/keil/ch.uvproj index 3600bb519..c68d0291f 100644 --- a/demos/ARMCM3-STM32F107/keil/ch.uvproj +++ b/demos/ARMCM3-STM32F107/keil/ch.uvproj @@ -876,16 +876,6 @@ 1 ..\..\..\os\hal\platforms\STM32\serial_lld.c - - stm32_dma.h - 5 - ..\..\..\os\hal\platforms\STM32\DMAv1\stm32_dma.h - - - stm32_dma.c - 1 - ..\..\..\os\hal\platforms\STM32\DMAv1\stm32_dma.c - pal_lld.h 5 @@ -931,6 +921,16 @@ 5 ..\..\..\os\hal\platforms\STM32F1xx\stm32_rcc.h + + stm32_dma.c + 1 + ..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c + + + stm32_dma.h + 5 + ..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h + diff --git a/demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj b/demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj new file mode 100644 index 000000000..1e43a6c18 --- /dev/null +++ b/demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj @@ -0,0 +1,980 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + Demo + 0x4 + ARM-ADS + + + STM32L152RB + STMicroelectronics + IRAM(0x20000000-0x20003FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3") + + "STARTUP\ST\STM32L1xx\startup_stm32l1xx_md.s" ("STM32L15xx Medium density Startup Code") + ULP2CM3(-O207 -S8 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000) + 5248 + stm32l1xx.h + + + + + + + + + + SFD\ST\STM32L15x\STM32L15x.sfr + 0 + + + + ST\STM32L1xx\ + ST\STM32L1xx\ + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + ch + 1 + 0 + 0 + 1 + 1 + .\lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 8 + + + + + + + + + + + + + + STLink\ST-LINKIII-KEIL.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + STLink\ST-LINKIII-KEIL.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x8000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20004000 + 0x1 + + + + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + __heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base + + ..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\os\hal\platforms\STM32L1xx;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\test + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc + + + ..\;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + board + + + board.c + 1 + ..\..\..\boards\ST_STM32L_DISCOVERY\board.c + + + board.h + 5 + ..\..\..\boards\ST_STM32L_DISCOVERY\board.h + + + + + port + + + cstartup.s + 2 + ..\..\..\os\ports\RVCT\ARMCMx\cstartup.s + + + chcoreasm_v7m.s + 2 + ..\..\..\os\ports\RVCT\ARMCMx\chcoreasm_v7m.s + + + chcore.c + 1 + ..\..\..\os\ports\RVCT\ARMCMx\chcore.c + + + chcore_v7m.c + 1 + ..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.c + + + nvic.c + 1 + ..\..\..\os\ports\RVCT\ARMCMx\nvic.c + + + chcore.h + 5 + ..\..\..\os\ports\RVCT\ARMCMx\chcore.h + + + chcore_v7m.h + 5 + ..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.h + + + chtypes.h + 5 + ..\..\..\os\ports\RVCT\ARMCMx\chtypes.h + + + nvic.h + 5 + ..\..\..\os\ports\RVCT\ARMCMx\nvic.h + + + cmparams.h + 5 + ..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx\cmparams.h + + + vectors.s + 2 + ..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx\vectors.s + + + + + kernel + + + chcond.c + 1 + ..\..\..\os\kernel\src\chcond.c + + + chdebug.c + 1 + ..\..\..\os\kernel\src\chdebug.c + + + chdynamic.c + 1 + ..\..\..\os\kernel\src\chdynamic.c + + + chevents.c + 1 + ..\..\..\os\kernel\src\chevents.c + + + chheap.c + 1 + ..\..\..\os\kernel\src\chheap.c + + + chlists.c + 1 + ..\..\..\os\kernel\src\chlists.c + + + chmboxes.c + 1 + ..\..\..\os\kernel\src\chmboxes.c + + + chmemcore.c + 1 + ..\..\..\os\kernel\src\chmemcore.c + + + chmempools.c + 1 + ..\..\..\os\kernel\src\chmempools.c + + + chmsg.c + 1 + ..\..\..\os\kernel\src\chmsg.c + + + chmtx.c + 1 + ..\..\..\os\kernel\src\chmtx.c + + + chqueues.c + 1 + ..\..\..\os\kernel\src\chqueues.c + + + chregistry.c + 1 + ..\..\..\os\kernel\src\chregistry.c + + + chschd.c + 1 + ..\..\..\os\kernel\src\chschd.c + + + chsem.c + 1 + ..\..\..\os\kernel\src\chsem.c + + + chsys.c + 1 + ..\..\..\os\kernel\src\chsys.c + + + chthreads.c + 1 + ..\..\..\os\kernel\src\chthreads.c + + + chvt.c + 1 + ..\..\..\os\kernel\src\chvt.c + + + ch.h + 5 + ..\..\..\os\kernel\include\ch.h + + + chbsem.h + 5 + ..\..\..\os\kernel\include\chbsem.h + + + chcond.h + 5 + ..\..\..\os\kernel\include\chcond.h + + + chdebug.h + 5 + ..\..\..\os\kernel\include\chdebug.h + + + chdynamic.h + 5 + ..\..\..\os\kernel\include\chdynamic.h + + + chevents.h + 5 + ..\..\..\os\kernel\include\chevents.h + + + chfiles.h + 5 + ..\..\..\os\kernel\include\chfiles.h + + + chheap.h + 5 + ..\..\..\os\kernel\include\chheap.h + + + chinline.h + 5 + ..\..\..\os\kernel\include\chinline.h + + + chioch.h + 5 + ..\..\..\os\kernel\include\chioch.h + + + chlists.h + 5 + ..\..\..\os\kernel\include\chlists.h + + + chmboxes.h + 5 + ..\..\..\os\kernel\include\chmboxes.h + + + chmemcore.h + 5 + ..\..\..\os\kernel\include\chmemcore.h + + + chmempools.h + 5 + ..\..\..\os\kernel\include\chmempools.h + + + chmsg.h + 5 + ..\..\..\os\kernel\include\chmsg.h + + + chmtx.h + 5 + ..\..\..\os\kernel\include\chmtx.h + + + chqueues.h + 5 + ..\..\..\os\kernel\include\chqueues.h + + + chregistry.h + 5 + ..\..\..\os\kernel\include\chregistry.h + + + chschd.h + 5 + ..\..\..\os\kernel\include\chschd.h + + + chsem.h + 5 + ..\..\..\os\kernel\include\chsem.h + + + chstreams.h + 5 + ..\..\..\os\kernel\include\chstreams.h + + + chsys.h + 5 + ..\..\..\os\kernel\include\chsys.h + + + chthreads.h + 5 + ..\..\..\os\kernel\include\chthreads.h + + + chvt.h + 5 + ..\..\..\os\kernel\include\chvt.h + + + + + hal + + + adc.c + 1 + ..\..\..\os\hal\src\adc.c + + + hal.c + 1 + ..\..\..\os\hal\src\hal.c + + + pal.c + 1 + ..\..\..\os\hal\src\pal.c + + + pwm.c + 1 + ..\..\..\os\hal\src\pwm.c + + + serial.c + 1 + ..\..\..\os\hal\src\serial.c + + + spi.c + 1 + ..\..\..\os\hal\src\spi.c + + + adc.h + 5 + ..\..\..\os\hal\include\adc.h + + + hal.h + 5 + ..\..\..\os\hal\include\hal.h + + + pal.h + 5 + ..\..\..\os\hal\include\pal.h + + + pwm.h + 5 + ..\..\..\os\hal\include\pwm.h + + + serial.h + 5 + ..\..\..\os\hal\include\serial.h + + + spi.h + 5 + ..\..\..\os\hal\include\spi.h + + + + + platform + + + adc_lld.c + 1 + ..\..\..\os\hal\platforms\STM32L1xx\adc_lld.c + + + adc_lld.h + 5 + ..\..\..\os\hal\platforms\STM32L1xx\adc_lld.h + + + hal_lld.c + 1 + ..\..\..\os\hal\platforms\STM32L1xx\hal_lld.c + + + hal_lld.h + 5 + ..\..\..\os\hal\platforms\STM32L1xx\hal_lld.h + + + pal_lld.c + 1 + ..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c + + + pal_lld.h + 5 + ..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h + + + pwm_lld.c + 1 + ..\..\..\os\hal\platforms\STM32\pwm_lld.c + + + pwm_lld.h + 5 + ..\..\..\os\hal\platforms\STM32\pwm_lld.h + + + serial_lld.c + 1 + ..\..\..\os\hal\platforms\STM32\serial_lld.c + + + spi_lld.h + 5 + ..\..\..\os\hal\platforms\STM32\spi_lld.h + + + spi_lld.c + 1 + ..\..\..\os\hal\platforms\STM32\spi_lld.c + + + serial_lld.h + 5 + ..\..\..\os\hal\platforms\STM32\serial_lld.h + + + stm32_dma.c + 1 + ..\..\..\os\hal\platforms\STM32L1xx\stm32_dma.c + + + stm32_dma.h + 5 + ..\..\..\os\hal\platforms\STM32L1xx\stm32_dma.h + + + stm32_rcc.h + 5 + ..\..\..\os\hal\platforms\STM32L1xx\stm32_rcc.h + + + stm32l1xx.h + 5 + ..\..\..\os\hal\platforms\STM32L1xx\stm32l1xx.h + + + + + test + + + test.c + 1 + ..\..\..\test\test.c + + + testbmk.c + 1 + ..\..\..\test\testbmk.c + + + testdyn.c + 1 + ..\..\..\test\testdyn.c + + + testevt.c + 1 + ..\..\..\test\testevt.c + + + testheap.c + 1 + ..\..\..\test\testheap.c + + + testmbox.c + 1 + ..\..\..\test\testmbox.c + + + testmsg.c + 1 + ..\..\..\test\testmsg.c + + + testmtx.c + 1 + ..\..\..\test\testmtx.c + + + testpools.c + 1 + ..\..\..\test\testpools.c + + + testqueues.c + 1 + ..\..\..\test\testqueues.c + + + testsem.c + 1 + ..\..\..\test\testsem.c + + + testthd.c + 1 + ..\..\..\test\testthd.c + + + test.h + 5 + ..\..\..\test\test.h + + + testbmk.h + 5 + ..\..\..\test\testbmk.h + + + testdyn.h + 5 + ..\..\..\test\testdyn.h + + + testevt.h + 5 + ..\..\..\test\testevt.h + + + testheap.h + 5 + ..\..\..\test\testheap.h + + + testmbox.h + 5 + ..\..\..\test\testmbox.h + + + testmsg.h + 5 + ..\..\..\test\testmsg.h + + + testmtx.h + 5 + ..\..\..\test\testmtx.h + + + testpools.h + 5 + ..\..\..\test\testpools.h + + + testqueues.h + 5 + ..\..\..\test\testqueues.h + + + testsem.h + 5 + ..\..\..\test\testsem.h + + + testthd.h + 5 + ..\..\..\test\testthd.h + + + + + demo + + + main.c + 1 + ..\main.c + + + mcuconf.h + 5 + ..\mcuconf.h + + + chconf.h + 5 + ..\chconf.h + + + halconf.h + 5 + ..\halconf.h + + + + + + + + diff --git a/docs/reports/STM32F100-24-RVCT.txt b/docs/reports/STM32F100-24-RVCT.txt index 29fcd3156..cde37b57c 100644 --- a/docs/reports/STM32F100-24-RVCT.txt +++ b/docs/reports/STM32F100-24-RVCT.txt @@ -1,14 +1,17 @@ *************************************************************************** Options: -O3 -Otime --apcs=interwork Settings: SYSCLK=24, ACR=0x10 (no wait states) -Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation]. +Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation]. *************************************************************************** *** ChibiOS/RT test suite *** -*** Kernel: 2.1.7unstable +*** Kernel: 2.3.4unstable +*** Compiled: Oct 15 2011 - 14:58:38 +*** Compiler: RVCT *** Architecture: ARMv7-M *** Core Variant: Cortex-M3 +*** Port Info: Advanced kernel mode *** Platform: STM32 Value Line Medium Density *** Test Board: ST STM32VL-Discovery @@ -98,56 +101,56 @@ Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation]. --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.1 (Benchmark, messages #1) ---- Score : 99090 msgs/S, 198180 ctxswc/S +--- Score : 101071 msgs/S, 202142 ctxswc/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.2 (Benchmark, messages #2) ---- Score : 86522 msgs/S, 173044 ctxswc/S +--- Score : 86737 msgs/S, 173474 ctxswc/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.3 (Benchmark, messages #3) ---- Score : 86522 msgs/S, 173044 ctxswc/S +--- Score : 86737 msgs/S, 173474 ctxswc/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.4 (Benchmark, context switch) ---- Score : 343016 ctxswc/S +--- Score : 340176 ctxswc/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.5 (Benchmark, threads, full cycle) ---- Score : 65072 threads/S +--- Score : 63779 threads/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.6 (Benchmark, threads, create only) ---- Score : 91152 threads/S +--- Score : 91045 threads/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads) ---- Score : 29264 reschedules/S, 175584 ctxswc/S +--- Score : 29194 reschedules/S, 175164 ctxswc/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.8 (Benchmark, round robin context switching) ---- Score : 202360 ctxswc/S +--- Score : 203860 ctxswc/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.9 (Benchmark, I/O Queues throughput) ---- Score : 228520 bytes/S +--- Score : 255612 bytes/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.10 (Benchmark, virtual timers set/reset) ---- Score : 294828 timers/S +--- Score : 311804 timers/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.11 (Benchmark, semaphores wait/signal) ---- Score : 454856 wait+signal/S +--- Score : 454332 wait+signal/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.12 (Benchmark, mutexes lock/unlock) ---- Score : 277668 lock+unlock/S +--- Score : 274152 lock+unlock/S --- Result: SUCCESS ---------------------------------------------------------------------------- --- Test Case 11.13 (Benchmark, RAM footprint) ---- System: 360 bytes ---- Thread: 68 bytes +--- System: 376 bytes +--- Thread: 72 bytes --- Timer : 20 bytes --- Semaph: 12 bytes --- EventS: 4 bytes diff --git a/docs/reports/STM32L152-32-RVCT.txt b/docs/reports/STM32L152-32-RVCT.txt new file mode 100644 index 000000000..aadaddb7b --- /dev/null +++ b/docs/reports/STM32L152-32-RVCT.txt @@ -0,0 +1,165 @@ +*************************************************************************** +Options: -O3 -Otime --apcs=interwork +Settings: SYSCLK=24, ACR=0x10 (no wait states) +Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation]. +*************************************************************************** + +*** ChibiOS/RT test suite +*** +*** Kernel: 2.3.4unstable +*** Compiled: Oct 15 2011 - 15:19:16 +*** Compiler: RVCT +*** Architecture: ARMv7-M +*** Core Variant: Cortex-M3 +*** Port Info: Advanced kernel mode +*** Platform: STM32L Ultra Low Power Medium Density +*** Test Board: ST STM32L-Discovery + +---------------------------------------------------------------------------- +--- Test Case 1.1 (Threads, enqueuing test #1) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (Threads, enqueuing test #2) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (Threads, priority change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.4 (Threads, delays) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.1 (Semaphores, enqueuing) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Semaphores, timeout) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Semaphores, atomic signal-wait) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.4 (Binary Semaphores, functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.1 (Mutexes, priority enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Mutexes, priority inheritance, simple case) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.3 (Mutexes, priority inheritance, complex case) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.4 (Mutexes, priority return) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.5 (Mutexes, status) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.6 (CondVar, signal test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.7 (CondVar, broadcast test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.8 (CondVar, boost test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.1 (Messages, loop) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 5.1 (Mailboxes, queuing and timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.1 (Events, registration and dispatch) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.2 (Events, wait and broadcast) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.3 (Events, timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.1 (Heap, allocation and fragmentation test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.1 (Memory Pools, queue/dequeue) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.1 (Dynamic APIs, threads creation from heap) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Dynamic APIs, registry and references) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 10.1 (Queues, input queues) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 10.2 (Queues, output queues) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.1 (Benchmark, messages #1) +--- Score : 123437 msgs/S, 246874 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.2 (Benchmark, messages #2) +--- Score : 106869 msgs/S, 213738 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.3 (Benchmark, messages #3) +--- Score : 106869 msgs/S, 213738 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.4 (Benchmark, context switch) +--- Score : 425360 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.5 (Benchmark, threads, full cycle) +--- Score : 78833 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.6 (Benchmark, threads, create only) +--- Score : 111359 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads) +--- Score : 35464 reschedules/S, 212784 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.8 (Benchmark, round robin context switching) +--- Score : 243100 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.9 (Benchmark, I/O Queues throughput) +--- Score : 312000 bytes/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.10 (Benchmark, virtual timers set/reset) +--- Score : 361876 timers/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.11 (Benchmark, semaphores wait/signal) +--- Score : 530708 wait+signal/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.12 (Benchmark, mutexes lock/unlock) +--- Score : 324940 lock+unlock/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.13 (Benchmark, RAM footprint) +--- System: 376 bytes +--- Thread: 72 bytes +--- Timer : 20 bytes +--- Semaph: 12 bytes +--- EventS: 4 bytes +--- EventL: 12 bytes +--- Mutex : 16 bytes +--- CondV.: 8 bytes +--- Queue : 32 bytes +--- MailB.: 40 bytes +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS diff --git a/readme.txt b/readme.txt index 3b365809d..e6a0d72d8 100644 --- a/readme.txt +++ b/readme.txt @@ -83,6 +83,7 @@ Now makefiles and load script files are requirements and trigger a rebuild if touched. - NEW: Updated AVR demos to use the new PAL driver. +- NEW: Added Keil build files to the STM32L-Discovery demo. - CHANGE: Moved the STM32 DMA helper drivers files under the sub-family specific directories because documentation issues. -- cgit v1.2.3