From 4b0e6ca65c0e896ba95c28946dcbae961d7b92ed Mon Sep 17 00:00:00 2001 From: Rocco Marco Guglielmi Date: Wed, 14 Mar 2018 16:01:39 +0000 Subject: Adjustment to LSM303AGR Driver (Still incomplete), added demo git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11751 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/ex/ST/lsm303agr.c | 486 ++++------------ os/ex/ST/lsm303agr.h | 171 +++--- testex/STM32/STM32F4xx/I2C-LSM303AGR/.cproject | 55 ++ testex/STM32/STM32F4xx/I2C-LSM303AGR/.project | 38 ++ testex/STM32/STM32F4xx/I2C-LSM303AGR/Makefile | 215 ++++++++ testex/STM32/STM32F4xx/I2C-LSM303AGR/chconf.h | 608 +++++++++++++++++++++ ...x-I2C-LSM303AGR (OpenOCD, Flash and Run).launch | 52 ++ testex/STM32/STM32F4xx/I2C-LSM303AGR/halconf.h | 417 ++++++++++++++ testex/STM32/STM32F4xx/I2C-LSM303AGR/main.c | 149 +++++ testex/STM32/STM32F4xx/I2C-LSM303AGR/mcuconf.h | 251 +++++++++ testex/STM32/STM32F4xx/I2C-LSM303AGR/readme.txt | 32 ++ 11 files changed, 1992 insertions(+), 482 deletions(-) create mode 100644 testex/STM32/STM32F4xx/I2C-LSM303AGR/.cproject create mode 100644 testex/STM32/STM32F4xx/I2C-LSM303AGR/.project create mode 100644 testex/STM32/STM32F4xx/I2C-LSM303AGR/Makefile create mode 100644 testex/STM32/STM32F4xx/I2C-LSM303AGR/chconf.h create mode 100644 testex/STM32/STM32F4xx/I2C-LSM303AGR/debug/STM32F4xx-I2C-LSM303AGR (OpenOCD, Flash and Run).launch create mode 100644 testex/STM32/STM32F4xx/I2C-LSM303AGR/halconf.h create mode 100644 testex/STM32/STM32F4xx/I2C-LSM303AGR/main.c create mode 100644 testex/STM32/STM32F4xx/I2C-LSM303AGR/mcuconf.h create mode 100644 testex/STM32/STM32F4xx/I2C-LSM303AGR/readme.txt diff --git a/os/ex/ST/lsm303agr.c b/os/ex/ST/lsm303agr.c index 747ef087d..6881be900 100644 --- a/os/ex/ST/lsm303agr.c +++ b/os/ex/ST/lsm303agr.c @@ -67,7 +67,7 @@ typedef enum { * @return the operation status. */ static msg_t lsm303agrI2CReadRegister(I2CDriver *i2cp, lsm303agr_sad_t sad, - uint8_t reg, uint8_t *rxbuf, size_t n) { + uint8_t reg, uint8_t *rxbuf, size_t n) { uint8_t txbuf = reg | LSM303AGR_MS; return i2cMasterTransmitTimeout(i2cp, sad, &txbuf, 1, rxbuf, n, @@ -87,7 +87,7 @@ static msg_t lsm303agrI2CReadRegister(I2CDriver *i2cp, lsm303agr_sad_t sad, * @return the operation status. */ static msg_t lsm303agrI2CWriteRegister(I2CDriver *i2cp, lsm303agr_sad_t sad, - uint8_t *txbuf, size_t n) { + uint8_t *txbuf, size_t n) { if (n != 1) *txbuf |= LSM303AGR_MS; return i2cMasterTransmitTimeout(i2cp, sad, txbuf, n + 1, NULL, 0, @@ -146,7 +146,7 @@ static msg_t acc_read_raw(void *ip, int32_t axes[]) { #endif /* LSM303AGR_SHARED_I2C */ msg = lsm303agrI2CReadRegister(devp->config->i2cp, LSM303AGR_SAD_ACC, - LSM303AGR_AD_ACC_OUT_X_L, buff, + LSM303AGR_AD_OUT_X_L_A, buff, LSM303AGR_ACC_NUMBER_OF_AXES * 2); #if LSM303AGR_SHARED_I2C @@ -312,18 +312,82 @@ static msg_t acc_reset_sensivity(void *ip) { osalDbgAssert((devp->state == LSM303AGR_READY), "acc_reset_sensivity(), invalid state"); - if(devp->config->accfullscale == LSM303AGR_ACC_FS_2G) - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) - devp->accsensitivity[i] = LSM303AGR_ACC_SENS_2G; - else if(devp->config->accfullscale == LSM303AGR_ACC_FS_4G) - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) - devp->accsensitivity[i] = LSM303AGR_ACC_SENS_4G; - else if(devp->config->accfullscale == LSM303AGR_ACC_FS_8G) - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) - devp->accsensitivity[i] = LSM303AGR_ACC_SENS_8G; - else if(devp->config->accfullscale == LSM303AGR_ACC_FS_16G) - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) - devp->accsensitivity[i] = LSM303AGR_ACC_SENS_16G; + if(devp->config->accfullscale == LSM303AGR_ACC_FS_2G) { + for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { +#if LSM303AGR_ACC_USE_ADVANCED + if(devp->config->accmode == LSM303AGR_ACC_MODE_NORM) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_NORM_2G; + else if(devp->config->accmode == LSM303AGR_ACC_MODE_LPOW) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_LPOW_2G; + else if(devp->config->accmode == LSM303AGR_ACC_MODE_HRES) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_HRES_2G; + else { + osalDbgAssert(FALSE, "acc_reset_sensivity(), accelerometer mode issue"); + msg = MSG_RESET; + return msg; + } +#else + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_NORM_2G; +#endif + } + } + else if(devp->config->accfullscale == LSM303AGR_ACC_FS_4G) { + for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { +#if LSM303AGR_ACC_USE_ADVANCED + if(devp->config->accmode == LSM303AGR_ACC_MODE_NORM) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_NORM_4G; + else if(devp->config->accmode == LSM303AGR_ACC_MODE_LPOW) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_LPOW_4G; + else if(devp->config->accmode == LSM303AGR_ACC_MODE_HRES) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_HRES_4G; + else { + osalDbgAssert(FALSE, "acc_reset_sensivity(), accelerometer mode issue"); + msg = MSG_RESET; + return msg; + } +#else + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_NORM_4G; +#endif + } + } + else if(devp->config->accfullscale == LSM303AGR_ACC_FS_8G) { + for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { +#if LSM303AGR_ACC_USE_ADVANCED + if(devp->config->accmode == LSM303AGR_ACC_MODE_NORM) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_NORM_8G; + else if(devp->config->accmode == LSM303AGR_ACC_MODE_LPOW) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_LPOW_8G; + else if(devp->config->accmode == LSM303AGR_ACC_MODE_HRES) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_HRES_8G; + else { + osalDbgAssert(FALSE, "acc_reset_sensivity(), accelerometer mode issue"); + msg = MSG_RESET; + return msg; + } +#else + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_NORM_8G; +#endif + } + } + else if(devp->config->accfullscale == LSM303AGR_ACC_FS_16G) { + for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { +#if LSM303AGR_ACC_USE_ADVANCED + if(devp->config->accmode == LSM303AGR_ACC_MODE_NORM) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_NORM_16G; + else if(devp->config->accmode == LSM303AGR_ACC_MODE_LPOW) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_LPOW_16G; + else if(devp->config->accmode == LSM303AGR_ACC_MODE_HRES) + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_HRES_16G; + else { + osalDbgAssert(FALSE, "acc_reset_sensivity(), accelerometer mode issue"); + msg = MSG_RESET; + return msg; + } +#else + devp->accsensitivity[i] = LSM303AGR_ACC_SENS_NORM_16G; +#endif + } + } else { osalDbgAssert(FALSE, "reset_sensivity(), accelerometer full scale issue"); msg = MSG_RESET; @@ -389,7 +453,7 @@ static msg_t acc_set_full_scale(LSM303AGRDriver *devp, /* Updating register.*/ msg = lsm303agrI2CReadRegister(devp->config->i2cp, LSM303AGR_SAD_ACC, - LSM303AGR_AD_ACC_CTRL_REG4, + LSM303AGR_AD_CTRL_REG4_A, &buff[1], 1); #if LSM303AGR_SHARED_I2C @@ -401,7 +465,7 @@ static msg_t acc_set_full_scale(LSM303AGRDriver *devp, buff[1] &= ~(LSM303AGR_CTRL_REG4_A_FS_MASK); buff[1] |= fs; - buff[0] = LSM303AGR_AD_ACC_CTRL_REG4; + buff[0] = LSM303AGR_AD_CTRL_REG4_A; #if LSM303AGR_SHARED_I2C i2cAcquireBus(devp->config->i2cp); @@ -478,7 +542,7 @@ static msg_t comp_read_raw(void *ip, int32_t axes[]) { devp->config->i2ccfg); #endif /* LSM303AGR_SHARED_I2C */ msg = lsm303agrI2CReadRegister(devp->config->i2cp, LSM303AGR_SAD_COMP, - LSM303AGR_AD_COMP_OUT_X_L, buff, + LSM303AGR_AD_OUTX_L_REG_M, buff, LSM303AGR_COMP_NUMBER_OF_AXES * 2); #if LSM303AGR_SHARED_I2C @@ -645,180 +709,15 @@ static msg_t comp_reset_sensivity(void *ip) { osalDbgAssert((devp->state == LSM303AGR_READY), "comp_reset_sensivity(), invalid state"); - if(devp->config->compfullscale == LSM303AGR_COMP_FS_1P3GA) - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_1P3GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_1P3GA; - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_1P9GA) - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_1P9GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_1P9GA; - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_2P5GA) - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_2P5GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_2P5GA; - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_4P0GA) - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_4P0GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_4P0GA; - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_4P7GA) - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_4P7GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_4P7GA; - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_5P6GA) - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_5P6GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_5P6GA; - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_8P1GA) - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_8P1GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_8P1GA; - } - } - else { - osalDbgAssert(FALSE, "comp_reset_sensivity(), compass full scale issue"); - msg = MSG_RESET; - } - return msg; -} - -/** - * @brief Changes the LSM303AGRDriver compass fullscale value. - * @note This function also rescale sensitivities and biases based on - * previous and next fullscale value. - * @note A recalibration is highly suggested after calling this function. - * - * @param[in] ip pointer to @p LSM303AGRDriver interface. - * @param[in] fs new fullscale value. - * - * @return The operation status. - * @retval MSG_OK if the function succeeded. - * @retval MSG_RESET otherwise. - */ -static msg_t comp_set_full_scale(LSM303AGRDriver *devp, - lsm303agr_comp_fs_t fs) { - float newfs, scale; - uint8_t i, buff[2]; - msg_t msg; - - osalDbgCheck(devp != NULL); - - osalDbgAssert((devp->state == LSM303AGR_READY), - "comp_set_full_scale(), invalid state"); - osalDbgAssert((devp->config->i2cp->state == I2C_READY), - "comp_set_full_scale(), channel not ready"); - - /* Computing new fullscale value.*/ - if(fs == LSM303AGR_COMP_FS_1P3GA) { - newfs = LSM303AGR_COMP_1P3GA; - } - else if(fs == LSM303AGR_COMP_FS_1P9GA) { - newfs = LSM303AGR_COMP_1P9GA; - } - else if(fs == LSM303AGR_COMP_FS_2P5GA) { - newfs = LSM303AGR_COMP_2P5GA; - } - else if(fs == LSM303AGR_COMP_FS_4P0GA) { - newfs = LSM303AGR_COMP_4P0GA; - } - else if(fs == LSM303AGR_COMP_FS_4P7GA) { - newfs = LSM303AGR_COMP_4P7GA; - } - else if(fs == LSM303AGR_COMP_FS_5P6GA) { - newfs = LSM303AGR_COMP_5P6GA; - } - else if(fs == LSM303AGR_COMP_FS_8P1GA) { - newfs = LSM303AGR_COMP_8P1GA; - } - else { - msg = MSG_RESET; - return msg; - } - - if(newfs != devp->compfullscale) { - /* Computing scale value.*/ - scale = newfs / devp->compfullscale; - devp->compfullscale = newfs; - -#if LSM303AGR_SHARED_I2C - i2cAcquireBus(devp->config->i2cp); - i2cStart(devp->config->i2cp, devp->config->i2ccfg); -#endif /* LSM303AGR_SHARED_I2C */ - - /* Updating register.*/ - msg = lsm303agrI2CReadRegister(devp->config->i2cp, LSM303AGR_SAD_COMP, - LSM303AGR_AD_COMP_CRB_REG, &buff[1], 1); - -#if LSM303AGR_SHARED_I2C - i2cReleaseBus(devp->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ - - if(msg != MSG_OK) - return msg; - buff[1] &= ~(LSM303AGR_CRB_REG_M_GN_MASK); - buff[1] |= fs; - buff[0] = LSM303AGR_AD_COMP_CRB_REG; - -#if LSM303AGR_SHARED_I2C - i2cAcquireBus(devp->config->i2cp); - i2cStart(devp->config->i2cp, devp->config->i2ccfg); -#endif /* LSM303AGR_SHARED_I2C */ - - msg = lsm303agrI2CWriteRegister(devp->config->i2cp, LSM303AGR_SAD_COMP, - buff, 1); - -#if LSM303AGR_SHARED_I2C - i2cReleaseBus(devp->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ - - if(msg != MSG_OK) - return msg; - - /* Scaling sensitivity and bias. Re-calibration is suggested anyway.*/ - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - devp->compsensitivity[i] *= scale; - devp->compbias[i] *= scale; - } - } + for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) + devp->compsensitivity[i] = LSM303AGR_COMP_SENS_50GA; + return msg; } static const struct LSM303AGRVMT vmt_device = { (size_t)0, - acc_set_full_scale, comp_set_full_scale + acc_set_full_scale }; static const struct BaseAccelerometerVMT vmt_accelerometer = { @@ -866,7 +765,6 @@ void lsm303agrObjectInit(LSM303AGRDriver *devp) { * @api */ void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { - uint32_t i; uint8_t cr[6]; osalDbgCheck((devp != NULL) && (config != NULL)); @@ -879,14 +777,14 @@ void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { /* Configuring Accelerometer subsystem.*/ /* Multiple write starting address.*/ - cr[0] = LSM303AGR_AD_ACC_CTRL_REG1; + cr[0] = LSM303AGR_AD_CFG_REG_A_M; /* Control register 1 configuration block.*/ { - cr[1] = LSM303AGR_CTRL_REG1_A_XEN | LSM303AGR_CTRL_REG1_A_YEN | - LSM303AGR_CTRL_REG1_A_ZEN | devp->config->accoutdatarate; + cr[1] = LSM303AGR_ACC_AE_XYZ | devp->config->accoutdatarate; #if LSM303AGR_ACC_USE_ADVANCED || defined(__DOXYGEN__) - cr[1] |= devp->config->acclowpower; + if(devp->config->accmode == LSM303AGR_ACC_MODE_LPOW) + cr[1] |= LSM303AGR_CTRL_REG1_A_LPEN; #endif } @@ -907,6 +805,8 @@ void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { cr[4] |= devp->config->accendianess | devp->config->accblockdataupdate | devp->config->acchighresmode; + if(devp->config->accmode == LSM303AGR_ACC_MODE_HRES) + cr[4] |= LSM303AGR_CTRL_REG4_A_HR; #endif } @@ -920,75 +820,27 @@ void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { #if LSM303AGR_SHARED_I2C i2cReleaseBus((devp)->config->i2cp); #endif /* LSM303AGR_SHARED_I2C */ - - /* Storing sensitivity according to user settings */ - if(devp->config->accfullscale == LSM303AGR_ACC_FS_2G) { - devp->accfullscale = LSM303AGR_ACC_2G; - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { - if(devp->config->accsensitivity == NULL) - devp->accsensitivity[i] = LSM303AGR_ACC_SENS_2G; - else - devp->accsensitivity[i] = devp->config->accsensitivity[i]; - } - } - else if(devp->config->accfullscale == LSM303AGR_ACC_FS_4G) { - devp->accfullscale = LSM303AGR_ACC_4G; - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { - if(devp->config->accsensitivity == NULL) - devp->accsensitivity[i] = LSM303AGR_ACC_SENS_4G; - else - devp->accsensitivity[i] = devp->config->accsensitivity[i]; - } - } - else if(devp->config->accfullscale == LSM303AGR_ACC_FS_8G) { - devp->accfullscale = LSM303AGR_ACC_8G; - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { - if(devp->config->accsensitivity == NULL) - devp->accsensitivity[i] = LSM303AGR_ACC_SENS_8G; - else - devp->accsensitivity[i] = devp->config->accsensitivity[i]; - } - } - else if(devp->config->accfullscale == LSM303AGR_ACC_FS_16G) { - devp->accfullscale = LSM303AGR_ACC_16G; - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { - if(devp->config->accsensitivity == NULL) - devp->accsensitivity[i] = LSM303AGR_ACC_SENS_16G; - else - devp->accsensitivity[i] = devp->config->accsensitivity[i]; - } - } - else - osalDbgAssert(FALSE, "lsm303agrStart(), accelerometer full scale issue"); - - /* Storing bias information */ - if(devp->config->accbias != NULL) - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) - devp->accbias[i] = devp->config->accbias[i]; - else - for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) - devp->accbias[i] = LSM303AGR_ACC_BIAS; - + /* Configuring Compass subsystem */ /* Multiple write starting address.*/ - cr[0] = LSM303AGR_AD_COMP_CRA_REG; + cr[0] = LSM303AGR_AD_CFG_REG_A_M; /* Control register A configuration block.*/ { cr[1] = devp->config->compoutputdatarate; +#if LSM303AGR_COMP_USE_ADVANCED || defined(__DOXYGEN__) + cr[1] |= devp->config->compmode | devp->config->complp; +#endif } /* Control register B configuration block.*/ { - cr[2] = devp->config->compfullscale; + cr[2] = 0; } - /* Mode register configuration block.*/ + /* Control register C configuration block.*/ { cr[3] = 0; -#if LSM303AGR_COMP_USE_ADVANCED || defined(__DOXYGEN__) - cr[3] |= devp->config->compmode; -#endif } #if LSM303AGR_SHARED_I2C @@ -997,139 +849,23 @@ void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { #endif /* LSM303AGR_SHARED_I2C */ lsm303agrI2CWriteRegister(devp->config->i2cp, LSM303AGR_SAD_COMP, - cr, 3); + cr, 3); #if LSM303AGR_SHARED_I2C i2cReleaseBus((devp)->config->i2cp); #endif /* LSM303AGR_SHARED_I2C */ - if(devp->config->compfullscale == LSM303AGR_COMP_FS_1P3GA) { - devp->compfullscale = LSM303AGR_COMP_1P3GA; - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(devp->config->compsensitivity == NULL) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_1P3GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_1P3GA; - } - } - else { - devp->compsensitivity[i] = devp->config->compsensitivity[i]; - } - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_1P9GA) { - devp->compfullscale = LSM303AGR_COMP_1P9GA; - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(devp->config->compsensitivity == NULL) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_1P9GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_1P9GA; - } - } - else { - devp->compsensitivity[i] = devp->config->compsensitivity[i]; - } - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_2P5GA) { - devp->compfullscale = LSM303AGR_COMP_2P5GA; - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(devp->config->compsensitivity == NULL) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_2P5GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_2P5GA; - } - } - else { - devp->compsensitivity[i] = devp->config->compsensitivity[i]; - } - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_4P0GA) { - devp->compfullscale = LSM303AGR_COMP_4P0GA; - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(devp->config->compsensitivity == NULL) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_4P0GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_4P0GA; - } - } - else { - devp->compsensitivity[i] = devp->config->compsensitivity[i]; - } - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_4P7GA) { - devp->compfullscale = LSM303AGR_COMP_4P7GA; - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(devp->config->compsensitivity == NULL) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_4P7GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_4P7GA; - } - } - else { - devp->compsensitivity[i] = devp->config->compsensitivity[i]; - } - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_5P6GA) { - devp->compfullscale = LSM303AGR_COMP_5P6GA; - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(devp->config->compsensitivity == NULL) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_5P6GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_5P6GA; - } - } - else { - devp->compsensitivity[i] = devp->config->compsensitivity[i]; - } - } - } - else if(devp->config->compfullscale == LSM303AGR_COMP_FS_8P1GA) { - devp->compfullscale = LSM303AGR_COMP_8P1GA; - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { - if(devp->config->compsensitivity == NULL) { - if(i != 2) { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_XY_8P1GA; - } - else { - devp->compsensitivity[i] = LSM303AGR_COMP_SENS_Z_8P1GA; - } - } - else { - devp->compsensitivity[i] = devp->config->compsensitivity[i]; - } - } - } - else - osalDbgAssert(FALSE, "lsm303agrStart(), compass full scale issue"); - - /* Storing bias information */ - if(devp->config->compbias != NULL) - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) - devp->compbias[i] = devp->config->compbias[i]; - else - for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) - devp->compbias[i] = LSM303AGR_COMP_BIAS; - /* This is the MEMS transient recovery time */ osalThreadSleepMilliseconds(5); devp->state = LSM303AGR_READY; + + /* Configuring sensitivity and bias of accelerometer.*/ + acc_reset_sensivity(&(devp->acc_if)); + acc_reset_bias(&(devp->acc_if)); + /* Configuring sensitivity and bias of compass.*/ + comp_reset_sensivity(&(devp->comp_if)); + comp_reset_bias(&(devp->comp_if)); } /** @@ -1154,16 +890,14 @@ void lsm303agrStop(LSM303AGRDriver *devp) { #endif /* LSM303AGR_SHARED_I2C */ /* Disabling accelerometer. */ - cr[0] = LSM303AGR_AD_ACC_CTRL_REG1; + cr[0] = LSM303AGR_AD_CTRL_REG1_A; cr[1] = LSM303AGR_ACC_AE_DISABLED | LSM303AGR_ACC_ODR_PD; lsm303agrI2CWriteRegister(devp->config->i2cp, LSM303AGR_SAD_ACC, cr, 1); /* Disabling compass. */ - cr[0] = LSM303AGR_AD_COMP_MR_REG; - cr[1] = LSM303AGR_COMP_MD_SLEEP; - lsm303agrI2CWriteRegister(devp->config->i2cp, LSM303AGR_SAD_ACC, - cr, 1); + cr[0] = LSM303AGR_AD_CFG_REG_A_M; + cr[1] = LSM303AGR_COMP_MODE_IDLE; lsm303agrI2CWriteRegister(devp->config->i2cp, LSM303AGR_SAD_COMP, cr, 1); diff --git a/os/ex/ST/lsm303agr.h b/os/ex/ST/lsm303agr.h index 517d0dc76..979ba54a6 100644 --- a/os/ex/ST/lsm303agr.h +++ b/os/ex/ST/lsm303agr.h @@ -219,7 +219,7 @@ #define LSM303AGR_CTRL_REG2_A_HPCF1 (1 << 4) #define LSM303AGR_CTRL_REG2_A_HPCF2 (1 << 5) #define LSM303AGR_CTRL_REG2_A_HPM0 (1 << 6) -#define LSM303AGR_CTRL_REG2_A_HPM0 (1 << 7) +#define LSM303AGR_CTRL_REG2_A_HPM1 (1 << 7) /** @} */ /** @@ -325,7 +325,7 @@ * @note The default is @p FALSE. */ #if !defined(LSM303AGR_USE_SPI) || defined(__DOXYGEN__) -#define LSM303AGR_USE_SPI FALSE +#define LSM303AGR_USE_SPI FALSE #endif /** @@ -335,7 +335,7 @@ * @note The default is @p FALSE. Requires SPI_USE_MUTUAL_EXCLUSION. */ #if !defined(LSM303AGR_SHARED_SPI) || defined(__DOXYGEN__) -#define LSM303AGR_SHARED_SPI FALSE +#define LSM303AGR_SHARED_SPI FALSE #endif /** @@ -344,7 +344,7 @@ * @note The default is @p TRUE. */ #if !defined(LSM303AGR_USE_I2C) || defined(__DOXYGEN__) -#define LSM303AGR_USE_I2C TRUE +#define LSM303AGR_USE_I2C TRUE #endif /** @@ -354,7 +354,7 @@ * @note The default is @p FALSE. Requires I2C_USE_MUTUAL_EXCLUSION. */ #if !defined(LSM303AGR_SHARED_I2C) || defined(__DOXYGEN__) -#define LSM303AGR_SHARED_I2C FALSE +#define LSM303AGR_SHARED_I2C FALSE #endif /** @@ -364,7 +364,7 @@ * @note The default is @p FALSE. */ #if !defined(LSM303AGR_ACC_USE_ADVANCED) || defined(__DOXYGEN__) -#define LSM303AGR_ACC_USE_ADVANCED FALSE +#define LSM303AGR_ACC_USE_ADVANCED FALSE #endif /** @@ -374,7 +374,7 @@ * @note The default is @p FALSE. */ #if !defined(LSM303AGR_COMP_USE_ADVANCED) || defined(__DOXYGEN__) -#define LSM303AGR_COMP_USE_ADVANCED FALSE +#define LSM303AGR_COMP_USE_ADVANCED FALSE #endif /** @} */ @@ -463,20 +463,13 @@ typedef enum { } lsm303agr_acc_ae_t; /** - * @brief LSM303AGR accelerometer subsystem low power mode. + * @brief LSM303AGR accelerometer subsystem operation mode. */ typedef enum { - LSM303AGR_ACC_LP_DISABLED = 0x00,/**< Low power mode disabled. */ - LSM303AGR_ACC_LP_ENABLED = 0x40 /**< Low power mode enabled. */ -} lsm303agr_acc_lp_t; - -/** - * @brief LSM303AGR accelerometer subsystem high resolution mode. - */ -typedef enum { - LSM303AGR_ACC_HR_DISABLED = 0x00,/**< High resolution mode disabled. */ - LSM303AGR_ACC_HR_ENABLED = 0x08 /**< High resolution mode enabled. */ -} lsm303agr_acc_hr_t; + LSM303AGR_ACC_MODE_NORM = 0, /**< Normal mode. */ + LSM303AGR_ACC_MODE_LPOW = 1, /**< Low power mode. */ + LSM303AGR_ACC_MODE_HRES = 2 /**< High resolution mode. */ +} lsm303agr_acc_mode_t; /** * @brief LSM303AGR accelerometer subsystem block data update. @@ -499,40 +492,31 @@ typedef enum { * @{ */ /** - * @brief LSM303AGR compass subsystem full scale. + * @brief LSM303AGR compass subsystem output data rate. */ typedef enum { - LSM303AGR_COMP_FS_1P3GA = 0x20, /**< Full scale ±1.3 Gauss */ - LSM303AGR_COMP_FS_1P9GA = 0x40, /**< Full scale ±1.9 Gauss */ - LSM303AGR_COMP_FS_2P5GA = 0x60, /**< Full scale ±2.5 Gauss */ - LSM303AGR_COMP_FS_4P0GA = 0x80, /**< Full scale ±4.0 Gauss */ - LSM303AGR_COMP_FS_4P7GA = 0xA0, /**< Full scale ±4.7 Gauss */ - LSM303AGR_COMP_FS_5P6GA = 0xC0, /**< Full scale ±5.6 Gauss */ - LSM303AGR_COMP_FS_8P1GA = 0xE0 /**< Full scale ±8.1 Gauss */ -} lsm303agr_comp_fs_t; + LSM303AGR_COMP_ODR_10HZ = 0x00, /**< ODR 10 Hz */ + LSM303AGR_COMP_ODR_20HZ = 0x04, /**< ODR 20 Hz */ + LSM303AGR_COMP_ODR_50HZ = 0x08, /**< ODR 50 Hz */ + LSM303AGR_COMP_ODR_100HZ = 0x0C /**< ODR 100 Hz */ +} lsm303agr_comp_odr_t; /** - * @brief LSM303AGR compass subsystem output data rate. + * @brief LSM303AGR compass subsystem working mode. */ typedef enum { - LSM303AGR_COMP_ODR_0P75HZ = 0x00,/**< ODR 0.75 Hz */ - LSM303AGR_COMP_ODR_1P5HZ = 0x04, /**< ODR 1.5 Hz */ - LSM303AGR_COMP_ODR_3P0HZ = 0x08, /**< ODR 3 Hz */ - LSM303AGR_COMP_ODR_7P5HZ = 0x0C, /**< ODR 7.5 Hz */ - LSM303AGR_COMP_ODR_15HZ = 0x10, /**< ODR 15 Hz */ - LSM303AGR_COMP_ODR_30HZ = 0x14, /**< ODR 30 Hz */ - LSM303AGR_COMP_ODR_75HZ = 0x18, /**< ODR 75 Hz */ - LSM303AGR_COMP_ODR_220HZ = 0x1C /**< ODR 220 Hz */ -} lsm303agr_comp_odr_t; + LSM303AGR_COMP_MODE_NORM = 0x00, /**< Continuous-Conversion Mode */ + LSM303AGR_COMP_MODE_SINGLE = 0x01,/**< Single-Conversion Mode */ + LSM303AGR_COMP_MODE_IDLE = 0x02 /**< Sleep Mode */ +} lsm303agr_comp_mode_t; /** * @brief LSM303AGR compass subsystem working mode. */ typedef enum { - LSM303AGR_COMP_MD_CONT = 0x00, /**< Continuous-Conversion Mode */ - LSM303AGR_COMP_MD_BLOCK = 0x01, /**< Single-Conversion Mode */ - LSM303AGR_COMP_MD_SLEEP = 0x02 /**< Sleep Mode */ -} lsm303agr_comp_md_t; + LSM303AGR_COMP_LPOW_DIS = 0x00, /**< High Resolution Mode */ + LSM303AGR_COMP_LPOW_EN = 0x10 /**< Low Power Mode */ +} lsm303agr_comp_lpow_t; /** * @name LSM303AGR main system data structures and types. @@ -570,28 +554,24 @@ typedef struct { /** * @brief LSM303AGR accelerometer subsystem initial full scale. */ - lsm303agr_acc_fs_t accfullscale; + lsm303agr_acc_fs_t accfullscale; /** * @brief LSM303AGR accelerometer subsystem output data rate. */ - lsm303agr_acc_odr_t accoutdatarate; + lsm303agr_acc_odr_t accoutdatarate; #if LSM303AGR_ACC_USE_ADVANCED || defined(__DOXYGEN__) /** - * @brief LSM303AGR accelerometer subsystem low power mode. - */ - lsm303agr_acc_lp_t acclowpower; - /** - * @brief LSM303AGR accelerometer subsystem high resolution mode. + * @brief LSM303AGR accelerometer subsystem mode. */ - lsm303agr_acc_hr_t acchighresmode; + lsm303agr_acc_mode_t accmode; /** * @brief LSM303AGR accelerometer subsystem block data update. */ - lsm303agr_acc_bdu_t accblockdataupdate; + lsm303agr_acc_bdu_t accblockdataupdate; /** * @brief LSM303AGR accelerometer endianness. */ - lsm303agr_acc_end_t accendianess; + lsm303agr_acc_end_t accendianess; #endif /** * @brief LSM303AGR compass initial sensitivity. @@ -601,37 +581,34 @@ typedef struct { * @brief LSM303AGR compass initial bias. */ float *compbias; - /** - * @brief LSM303AGR compass subsystem initial full scale. - */ - lsm303agr_comp_fs_t compfullscale; /** * @brief LSM303AGR compass subsystem output data rate. */ - lsm303agr_comp_odr_t compoutputdatarate; + lsm303agr_comp_odr_t compoutputdatarate; #if LSM303AGR_COMP_USE_ADVANCED || defined(__DOXYGEN__) /** * @brief LSM303AGR compass subsystem working mode. */ - lsm303agr_comp_md_t compmode; + lsm303agr_comp_mode_t compmode; + /** + * @brief LSM303AGR compass subsystem lowpower mode. + */ + lsm303agr_comp_lpow_t complp; #endif } LSM303AGRConfig; /** * @brief @p LSM303AGR specific methods. */ -#define _lsm303agr_methods_alone \ - /* Change full scale value of LSM303AGR accelerometer subsystem.*/ \ - msg_t (*acc_set_full_scale)(LSM303AGRDriver *devp, \ - lsm303agr_acc_fs_t fs); \ - /* Change full scale value of LSM303AGR compass subsystem.*/ \ - msg_t (*comp_set_full_scale)(LSM303AGRDriver *devp, \ - lsm303agr_comp_fs_t fs); \ +#define _lsm303agr_methods_alone \ + /* Change full scale value of LSM303AGR accelerometer subsystem.*/ \ + msg_t (*acc_set_full_scale)(LSM303AGRDriver *devp, \ + lsm303agr_acc_fs_t fs); /** * @brief @p LSM303AGR specific methods with inherited ones. */ -#define _lsm303agr_methods \ +#define _lsm303agr_methods \ _base_object_methods \ _lsm303agr_methods_alone @@ -647,26 +624,26 @@ struct LSM303AGRVMT { /** * @brief @p LSM303AGRDriver specific data. */ -#define _lsm303agr_data \ +#define _lsm303agr_data \ _base_sensor_data \ /* Driver state.*/ \ - lsm303agr_state_t state; \ + lsm303agr_state_t state; \ /* Current configuration data.*/ \ - const LSM303AGRConfig *config; \ + const LSM303AGRConfig *config; \ /* Accelerometer subsystem axes number.*/ \ size_t accaxes; \ /* Accelerometer subsystem current sensitivity.*/ \ - float accsensitivity[LSM303AGR_ACC_NUMBER_OF_AXES]; \ + float accsensitivity[LSM303AGR_ACC_NUMBER_OF_AXES]; \ /* Accelerometer subsystem current bias .*/ \ - float accbias[LSM303AGR_ACC_NUMBER_OF_AXES]; \ + float accbias[LSM303AGR_ACC_NUMBER_OF_AXES]; \ /* Accelerometer subsystem current full scale value.*/ \ float accfullscale; \ /* Compass subsystem axes number.*/ \ size_t compaxes; \ /* Compass subsystem current sensitivity.*/ \ - float compsensitivity[LSM303AGR_COMP_NUMBER_OF_AXES];\ + float compsensitivity[LSM303AGR_COMP_NUMBER_OF_AXES]; \ /* Compass subsystem current bias.*/ \ - float compbias[LSM303AGR_COMP_NUMBER_OF_AXES]; \ + float compbias[LSM303AGR_COMP_NUMBER_OF_AXES]; \ /* Compass subsystem current full scale value.*/ \ float compfullscale; @@ -697,7 +674,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrAccelerometerGetAxesNumber(devp) \ +#define lsm303agrAccelerometerGetAxesNumber(devp) \ accelerometerGetAxesNumber(&((devp)->acc_if)) /** @@ -718,7 +695,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrAccelerometerReadRaw(devp, axes) \ +#define lsm303agrAccelerometerReadRaw(devp, axes) \ accelerometerReadRaw(&((devp)->acc_if), axes) /** @@ -740,7 +717,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrAccelerometerReadCooked(devp, axes) \ +#define lsm303agrAccelerometerReadCooked(devp, axes) \ accelerometerReadCooked(&((devp)->acc_if), axes) /** @@ -757,7 +734,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrAccelerometerSetBias(devp, bp) \ +#define lsm303agrAccelerometerSetBias(devp, bp) \ accelerometerSetBias(&((devp)->acc_if), bp) /** @@ -772,7 +749,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrAccelerometerResetBias(devp) \ +#define lsm303agrAccelerometerResetBias(devp) \ accelerometerResetBias(&((devp)->acc_if)) /** @@ -789,7 +766,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrAccelerometerSetSensitivity(devp, sp) \ +#define lsm303agrAccelerometerSetSensitivity(devp, sp) \ accelerometerSetSensitivity(&((devp)->acc_if), sp) /** @@ -804,7 +781,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrAccelerometerResetSensitivity(devp) \ +#define lsm303agrAccelerometerResetSensitivity(devp) \ accelerometerResetSensitivity(&((devp)->acc_if)) /** @@ -822,7 +799,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrAccelerometerSetFullScale(devp, fs) \ +#define lsm303agrAccelerometerSetFullScale(devp, fs) \ (devp)->vmt->acc_set_full_scale(devp, fs) /** @@ -834,7 +811,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrCompassGetAxesNumber(devp) \ +#define lsm303agrCompassGetAxesNumber(devp) \ compassGetAxesNumber(&((devp)->comp_if)) /** @@ -855,7 +832,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrCompassReadRaw(devp, axes) \ +#define lsm303agrCompassReadRaw(devp, axes) \ compassReadRaw(&((devp)->comp_if), axes) /** @@ -877,7 +854,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrCompassReadCooked(devp, axes) \ +#define lsm303agrCompassReadCooked(devp, axes) \ compassReadCooked(&((devp)->comp_if), axes) /** @@ -894,7 +871,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrCompassSetBias(devp, bp) \ +#define lsm303agrCompassSetBias(devp, bp) \ compassSetBias(&((devp)->comp_if), bp) /** @@ -909,7 +886,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrCompassResetBias(devp) \ +#define lsm303agrCompassResetBias(devp) \ compassResetBias(&((devp)->comp_if)) /** @@ -926,7 +903,7 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrCompassSetSensitivity(devp, sp) \ +#define lsm303agrCompassSetSensitivity(devp, sp) \ compassSetSensitivity(&((devp)->comp_if), sp) /** @@ -941,27 +918,9 @@ struct LSM303AGRDriver { * * @api */ -#define lsm303agrCompassResetSensitivity(devp) \ +#define lsm303agrCompassResetSensitivity(devp) \ compassResetSensitivity(&((devp)->comp_if)) -/** - * @brief Changes the LSM303AGRDriver compass fullscale value. - * @note This function also rescale sensitivities and biases based on - * previous and next fullscale value. - * @note A recalibration is highly suggested after calling this function. - * - * @param[in] devp pointer to @p LSM303AGRDriver. - * @param[in] fs new fullscale value. - * - * @return The operation status. - * @retval MSG_OK if the function succeeded. - * @retval MSG_RESET otherwise. - * - * @api - */ -#define lsm303agrCompassSetFullScale(devp, fs) \ - (devp)->vmt->comp_set_full_scale(devp, fs) - /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ diff --git a/testex/STM32/STM32F4xx/I2C-LSM303AGR/.cproject b/testex/STM32/STM32F4xx/I2C-LSM303AGR/.cproject new file mode 100644 index 000000000..0012badfd --- /dev/null +++ b/testex/STM32/STM32F4xx/I2C-LSM303AGR/.cproject @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testex/STM32/STM32F4xx/I2C-LSM303AGR/.project b/testex/STM32/STM32F4xx/I2C-LSM303AGR/.project new file mode 100644 index 000000000..31e050c02 --- /dev/null +++ b/testex/STM32/STM32F4xx/I2C-LSM303AGR/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-I2C-LSM303AGR + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/os/hal/boards/ST_NUCLEO64_F401RE + + + os + 2 + CHIBIOS/os + + + diff --git a/testex/STM32/STM32F4xx/I2C-LSM303AGR/Makefile b/testex/STM32/STM32F4xx/I2C-LSM303AGR/Makefile new file mode 100644 index 000000000..9b3e220a4 --- /dev/null +++ b/testex/STM32/STM32F4xx/I2C-LSM303AGR/Makefile @@ -0,0 +1,215 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = hard +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../.. + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F401RE/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# EX files (optional). +include $(CHIBIOS)/os/ex/ST/lsm303agr.mk +# Other files (optional). +include $(CHIBIOS)/os/hal/lib/streams/streams.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32F401xE.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra -Wundef + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = -DCHPRINTF_USE_FLOAT=1 \ + -DLSM303AGR_USE_ADVANCED=0 -DLSM303AGR_SHARED_I2C=0 + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/testex/STM32/STM32F4xx/I2C-LSM303AGR/chconf.h b/testex/STM32/STM32F4xx/I2C-LSM303AGR/chconf.h new file mode 100644 index 000000000..899a292ef --- /dev/null +++ b/testex/STM32/STM32F4xx/I2C-LSM303AGR/chconf.h @@ -0,0 +1,608 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_0_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_ST_RESOLUTION 32 + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#define CH_CFG_ST_FREQUENCY 10000 + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#define CH_CFG_INTERVALS_SIZE 32 + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_TIME_TYPES_SIZE 32 + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#define CH_CFG_ST_TIMEDELTA 2 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#define CH_CFG_TIME_QUANTUM 0 + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#define CH_CFG_MEMCORE_SIZE 0 + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#define CH_CFG_NO_IDLE_THREAD FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#define CH_CFG_OPTIMIZE_SPEED TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_TM TRUE + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_REGISTRY TRUE + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_WAITEXIT TRUE + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_SEMAPHORES TRUE + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MUTEXES TRUE + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_CONDVARS TRUE + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_EVENTS TRUE + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MESSAGES TRUE + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_MAILBOXES TRUE + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMCORE TRUE + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#define CH_CFG_USE_HEAP TRUE + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMPOOLS TRUE + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_OBJ_FIFOS TRUE + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#define CH_CFG_USE_DYNAMIC TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#define CH_CFG_USE_FACTORY TRUE + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 + +/** + * @brief Enables the registry of generic objects. + */ +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE + +/** + * @brief Enables factory for generic buffers. + */ +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE + +/** + * @brief Enables factory for semaphores. + */ +#define CH_CFG_FACTORY_SEMAPHORES TRUE + +/** + * @brief Enables factory for mailboxes. + */ +#define CH_CFG_FACTORY_MAILBOXES TRUE + +/** + * @brief Enables factory for objects FIFOs. + */ +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_STATISTICS FALSE + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_SYSTEM_STATE_CHECK FALSE + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_CHECKS FALSE + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_ASSERTS FALSE + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#define CH_DBG_TRACE_BUFFER_SIZE 128 + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#define CH_DBG_ENABLE_STACK_CHECK FALSE + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_FILL_THREADS FALSE + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#define CH_DBG_THREADS_PROFILING FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testex/STM32/STM32F4xx/I2C-LSM303AGR/debug/STM32F4xx-I2C-LSM303AGR (OpenOCD, Flash and Run).launch b/testex/STM32/STM32F4xx/I2C-LSM303AGR/debug/STM32F4xx-I2C-LSM303AGR (OpenOCD, Flash and Run).launch new file mode 100644 index 000000000..41160363c --- /dev/null +++ b/testex/STM32/STM32F4xx/I2C-LSM303AGR/debug/STM32F4xx-I2C-LSM303AGR (OpenOCD, Flash and Run).launch @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testex/STM32/STM32F4xx/I2C-LSM303AGR/halconf.h b/testex/STM32/STM32F4xx/I2C-LSM303AGR/halconf.h new file mode 100644 index 000000000..5547d5b5f --- /dev/null +++ b/testex/STM32/STM32F4xx/I2C-LSM303AGR/halconf.h @@ -0,0 +1,417 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C TRUE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the QSPI subsystem. + */ +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) +#define HAL_USE_QSPI FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/testex/STM32/STM32F4xx/I2C-LSM303AGR/main.c b/testex/STM32/STM32F4xx/I2C-LSM303AGR/main.c new file mode 100644 index 000000000..a97d1a38a --- /dev/null +++ b/testex/STM32/STM32F4xx/I2C-LSM303AGR/main.c @@ -0,0 +1,149 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +#include "chprintf.h" +#include "lsm303agr.h" + +#define cls(chp) chprintf(chp, "\033[2J\033[1;1H") + +/*===========================================================================*/ +/* LSM303AGR related. */ +/*===========================================================================*/ + +/* LSM303AGR Driver: This object represent an LSM303AGR instance */ +static LSM303AGRDriver LSM303AGRD1; + +static int32_t accraw[LSM303AGR_ACC_NUMBER_OF_AXES]; +static int32_t compraw[LSM303AGR_COMP_NUMBER_OF_AXES]; + +static float acccooked[LSM303AGR_ACC_NUMBER_OF_AXES]; +static float compcooked[LSM303AGR_COMP_NUMBER_OF_AXES]; + +static char axisID[LSM303AGR_ACC_NUMBER_OF_AXES] = {'X', 'Y', 'Z'}; +static uint32_t i; + +static const I2CConfig i2ccfg = { + OPMODE_I2C, + 400000, + FAST_DUTY_CYCLE_2, +}; + +static const LSM303AGRConfig lsm303agrcfg = { + &I2CD1, + &i2ccfg, + NULL, + NULL, + LSM303AGR_ACC_FS_4G, + LSM303AGR_ACC_ODR_100Hz, +#if LSM303AGR_ACC_USE_ADVANCED + LSM303AGR_ACC_MODE_HRES, + LSM303AGR_ACC_BDU_BLOCK, + LSM303AGR_ACC_END_LITTLE, +#endif + NULL, + NULL, + LSM303AGR_COMP_ODR_50HZ, +#if LSM303AGR_COMP_USE_ADVANCED + LSM303AGR_COMP_MODE_NORM, + LSM303AGR_COMP_LPOW_EN +#endif +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +static BaseSequentialStream* chp = (BaseSequentialStream*)&SD2; +/* + * LED blinker thread, times are in milliseconds. + */ +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (true) { + palToggleLine(LINE_LED_GREEN); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* Configuring I2C SCK and I2C SDA related GPIOs .*/ + palSetLineMode(LINE_ARD_D15, PAL_MODE_ALTERNATE(4) | + PAL_STM32_OSPEED_HIGHEST | PAL_STM32_OTYPE_OPENDRAIN); + palSetLineMode(LINE_ARD_D14, PAL_MODE_ALTERNATE(4) | + PAL_STM32_OSPEED_HIGHEST | PAL_STM32_OTYPE_OPENDRAIN); + + /* Activates the serial driver 2 using the driver default configuration.*/ + sdStart(&SD2, NULL); + + /* Creates the blinker thread.*/ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* LSM303AGR Object Initialization.*/ + lsm303agrObjectInit(&LSM303AGRD1); + + /* Activates the LSM303AGR driver.*/ + lsm303agrStart(&LSM303AGRD1, &lsm303agrcfg); + + /* Normal main() thread activity, printing MEMS data on the SD2. */ + while (true) { + lsm303agrAccelerometerReadRaw(&LSM303AGRD1, accraw); + chprintf(chp, "LSM303AGR Accelerometer raw data...\r\n"); + for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { + chprintf(chp, "%c-axis: %d\r\n", axisID[i], accraw[i]); + } + + lsm303agrCompassReadRaw(&LSM303AGRD1, compraw); + chprintf(chp, "LSM303AGR Compass raw data...\r\n"); + for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { + chprintf(chp, "%c-axis: %d\r\n", axisID[i], compraw[i]); + } + + lsm303agrAccelerometerReadCooked(&LSM303AGRD1, acccooked); + chprintf(chp, "LSM303AGR Accelerometer cooked data...\r\n"); + for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { + chprintf(chp, "%c-axis: %.3f\r\n", axisID[i], acccooked[i]); + } + + lsm303agrCompassReadCooked(&LSM303AGRD1, compcooked); + chprintf(chp, "LSM303AGR Compass cooked data...\r\n"); + for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { + chprintf(chp, "%c-axis: %.3f\r\n", axisID[i], compcooked[i]); + } + chThdSleepMilliseconds(100); + cls(chp); + } + lsm303agrStop(&LSM303AGRD1); +} diff --git a/testex/STM32/STM32F4xx/I2C-LSM303AGR/mcuconf.h b/testex/STM32/STM32F4xx/I2C-LSM303AGR/mcuconf.h new file mode 100644 index 000000000..3528c0aa6 --- /dev/null +++ b/testex/STM32/STM32F4xx/I2C-LSM303AGR/mcuconf.h @@ -0,0 +1,251 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLM_VALUE 16 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 4 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_USE_SPI3 FALSE +#define STM32_I2S_SPI2_IRQ_PRIORITY 10 +#define STM32_I2S_SPI3_IRQ_PRIORITY 10 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI3_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM9 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM9 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/testex/STM32/STM32F4xx/I2C-LSM303AGR/readme.txt b/testex/STM32/STM32F4xx/I2C-LSM303AGR/readme.txt new file mode 100644 index 000000000..3d246b1f2 --- /dev/null +++ b/testex/STM32/STM32F4xx/I2C-LSM303AGR/readme.txt @@ -0,0 +1,32 @@ +***************************************************************************** +** ChibiOS/HAL + ChibiOS/EX - I2C + LSM303AGR demo for STM32F4xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STM32 Nucleo64-F401RE board. It has been tested with the +X-NUCLEO-IKS01A1 shield. + +** The Demo ** + +The application demonstrates the use of the STM32F4xx I2C driver in order +to acquire data from LSM303AGR using ChibiOS/EX. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com \ No newline at end of file -- cgit v1.2.3