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* Add tabulation.Theodore Ateba2017-08-241-3/+3
* Added XDMAC driveredolomb2017-08-243-0/+593
* Added pmc functions for XDMACxedolomb2017-08-241-2/+30
* Added sama_xdmac.hedolomb2017-08-241-1/+1
* Included DMAv1 Driveredolomb2017-08-241-1/+1
* Added dmaInit()edolomb2017-08-241-1/+1
* USB CDC demo for STM32L0, not working yet.Giovanni Di Sirio2017-08-2411-0/+2065
* Fixed bug #878.Giovanni Di Sirio2017-08-242-5/+6
* Fixed bug #877.Giovanni Di Sirio2017-08-243-1/+18
* Fixed bug #876.Giovanni Di Sirio2017-08-242-0/+8
* Fixed bug #875.Giovanni Di Sirio2017-08-241-0/+2
* Fixed bug #864.Giovanni Di Sirio2017-08-222-1/+3
* Fixed bug #874.Giovanni Di Sirio2017-08-2214-4/+18
* Fixed bug #873.Giovanni Di Sirio2017-08-222-6/+8
* Tentative fix for L4 OTG.Giovanni Di Sirio2017-08-222-38/+49
* Tentative workaround for L4 OTG driver.Giovanni Di Sirio2017-08-205-62/+76
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10452 35acf78f-673a-041...isiora2017-08-181-1/+1
* Added check to verify that the matrix H64H32 clock ratio is compatible with m...isiora2017-08-181-12/+15
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10450 35acf78f-673a-041...isiora2017-08-181-2/+3
* Some renaming work for clearness.Giovanni Di Sirio2017-08-182-30/+31
* Added matrix H64H32 clock ratio.isiora2017-08-171-0/+13
* Added matrix clock ratio setting.isiora2017-08-171-2/+8
* Fixed SAMA_PIT define. Now it includes the dependency on busses clock ratio.isiora2017-08-171-1/+1
* Added clock ratio setting of the matrix busses,isiora2017-08-171-0/+2
* Activate the USB driver in mcuconf file to build the demo without any error.Theodore Ateba2017-08-171-1/+1
* Add a NIL demo for Arduino NANO.Theodore Ateba2017-08-175-0/+1433
* Add Arduino MINI NIL demo.Theodore Ateba2017-08-175-0/+1433
* Fixed compiler warning.isiora2017-08-161-4/+6
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10439 35acf78f-673a-041...isiora2017-08-161-3/+3
* Added debug asserts.isiora2017-08-162-6/+17
* Update the AVR MEGA testhal Makefile according the new architecture.tfateba2017-08-167-7/+7
* Add a specific directory for AVR MEGA in the testhal.Theodore Ateba2017-08-1642-0/+0
* Update AVR MEGA demos Makefiles according the new architecture.Theodore Ateba2017-08-169-9/+10
* Update AVR XMEGA all testhal Makefile.Theodore Ateba2017-08-167-7/+7
* Add LLD directory to the AVR XMEGA Low Level Drivers.Theodore Ateba2017-08-168-29/+29
* Modify AVR XMEGA platform according the new architecture.Theodore Ateba2017-08-161-10/+10
* Add low level driver directory and platfor for AVR MEGA.Theodore Ateba2017-08-1635-0/+0
* Fixed IVR addressisiora2017-08-141-2/+2
* Added init code to setup the secure VBAR.isiora2017-08-141-0/+5
* Added acknowledgement of PIT and AIC interrupt.isiora2017-08-141-2/+2
* Changed ST interrupt priority to 0, the lowest one.isiora2017-08-141-1/+1
* Fixed disable/enable macro.isiora2017-08-141-4/+4
* Fixed PLLA_MUL.isiora2017-08-141-1/+1
* Added a macro to acknowledge the current interrupt.isiora2017-08-141-0/+8
* The IRQ handlers are normal functions: deleted interrupt attribute to them.isiora2017-08-141-2/+2
* Enabled FIQ in _port_thread_startisiora2017-08-141-5/+6
* Remove the not implemented TIM lld files.Theodore Ateba2017-08-136-1922/+0
* Remove the not implemented USART lld files.Theodore Ateba2017-08-132-566/+0
* Update the AVR Tiny RT demo makefile.Theodore Ateba2017-08-131-1/+1
* Update the AVR Tiny NIL demo makefile.Theodore Ateba2017-08-131-1/+1
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