diff options
Diffstat (limited to 'testhal/STM32/multi/ADC')
8 files changed, 190 insertions, 24 deletions
| diff --git a/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/mcuconf.h b/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/mcuconf.h index 2dcb46434..e30e2df5b 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/mcuconf.h +++ b/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/mcuconf.h @@ -114,9 +114,9 @@   */
  #define STM32_ADC_DUAL_MODE                 FALSE
  #define STM32_ADC_COMPACT_SAMPLES           FALSE
 -#define STM32_ADC_USE_ADC1                  FALSE
 -#define STM32_ADC_USE_ADC2                  FALSE
 -#define STM32_ADC_USE_ADC3                  FALSE
 +#define STM32_ADC_USE_ADC1                  TRUE
 +#define STM32_ADC_USE_ADC2                  TRUE
 +#define STM32_ADC_USE_ADC3                  TRUE
  #define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)
  #define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(1, 2)
  #define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(1, 3)
 @@ -140,8 +140,8 @@   * DAC driver system settings.
   */
  #define STM32_DAC_DUAL_MODE                 FALSE
 -#define STM32_DAC_USE_DAC1_CH1              TRUE
 -#define STM32_DAC_USE_DAC1_CH2              TRUE
 +#define STM32_DAC_USE_DAC1_CH1              FALSE
 +#define STM32_DAC_USE_DAC1_CH2              FALSE
  #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
  #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
  #define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
 @@ -155,9 +155,9 @@  #define STM32_GPT_USE_TIM1                  FALSE
  #define STM32_GPT_USE_TIM2                  FALSE
  #define STM32_GPT_USE_TIM3                  FALSE
 -#define STM32_GPT_USE_TIM4                  FALSE
 +#define STM32_GPT_USE_TIM4                  TRUE
  #define STM32_GPT_USE_TIM5                  FALSE
 -#define STM32_GPT_USE_TIM6                  TRUE
 +#define STM32_GPT_USE_TIM6                  FALSE
  #define STM32_GPT_USE_TIM7                  FALSE
  #define STM32_GPT_USE_TIM8                  FALSE
  #define STM32_GPT_TIM1_IRQ_PRIORITY         7
 diff --git a/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.c b/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.c index 3c9c59911..7c6b1d2f5 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.c +++ b/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.c @@ -34,6 +34,80 @@  /* Module exported variables.                                                */
  /*===========================================================================*/
 +/*
 + * GPT configuration.
 + */
 +const GPTConfig portab_gptcfg1 = {
 +  .frequency    =  1000000U,
 +  .callback     =  NULL,
 +  .cr2          =  TIM_CR2_MMS_1,   /* MMS = 010 = TRGO on Update Event.    */
 +  .dier         =  0U
 +};
 +
 +const ADCConfig portab_adccfg1 = {
 +  .difsel       = 0U
 +};
 +
 +void adccallback(ADCDriver *adcp);
 +
 +/*
 + * ADC errors callback, should never happen.
 + */
 +void adcerrorcallback(ADCDriver *adcp, adcerror_t err);
 +
 +/*
 + * ADC conversion group 1.
 + * Mode:        One shot, 2 channels, SW triggered.
 + * Channels:    IN0, IN5.
 + */
 +const ADCConversionGroup portab_adcgrpcfg1 = {
 +  .circular     = false,
 +  .num_channels = ADC_GRP1_NUM_CHANNELS,
 +  .end_cb       = NULL,
 +  .error_cb     = adcerrorcallback,
 +  .cfgr         = 0U,
 +  .cfgr2        = 0U,
 +  .tr1          = ADC_TR(0, 4095),
 +  .smpr         = {
 +    ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
 +    ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5),
 +    0U
 +  },
 +  .sqr          = {
 +    ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
 +    0U,
 +    0U,
 +    0U
 +  }
 +};
 +
 +/*
 + * ADC conversion group 2.
 + * Mode:        Continuous, 2 channels, HW triggered by GPT4-TRGO.
 + * Channels:    IN0, IN5.
 + */
 +const ADCConversionGroup portab_adcgrpcfg2 = {
 +  .circular     = true,
 +  .num_channels = ADC_GRP2_NUM_CHANNELS,
 +  .end_cb       = adccallback,
 +  .error_cb     = adcerrorcallback,
 +  .cfgr         = ADC_CFGR_EXTEN_RISING |
 +                  ADC_CFGR_EXTSEL_SRC(12),  /* TIM4_TRGO */
 +  .cfgr2        = 0U,
 +  .tr1          = ADC_TR(0, 4095),
 +  .smpr         = {
 +    ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
 +    ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5),
 +    0U
 +  },
 +  .sqr          = {
 +    ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
 +    0U,
 +    0U,
 +    0U
 +  }
 +};
 +
  /*===========================================================================*/
  /* Module local types.                                                       */
  /*===========================================================================*/
 @@ -52,9 +126,9 @@  void portab_setup(void) {
 -  /* Setting up the output pin as analog as suggested
 -     by the Reference Manual.*/
 -  palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
 +  /* ADC inputs.*/
 +  palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
 +  palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
  }
  /** @} */
 diff --git a/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.h b/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.h index 6df606655..8b262afe4 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.h +++ b/testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.h @@ -39,7 +39,11 @@  #define PORTAB_SD1                  SD2
 -#define PORTAB_DAC_TRIG             0
 +#define PORTAB_GPT1                 GPTD4
 +#define PORTAB_ADC1                 ADCD1
 +
 +#define ADC_GRP1_NUM_CHANNELS       2
 +#define ADC_GRP2_NUM_CHANNELS       2
  /*===========================================================================*/
  /* Module pre-compile time settings.                                         */
 @@ -61,6 +65,11 @@  /* External declarations.                                                    */
  /*===========================================================================*/
 +extern const GPTConfig portab_gptcfg1;
 +extern const ADCConfig portab_adccfg1;
 +extern const ADCConversionGroup portab_adcgrpcfg1;
 +extern const ADCConversionGroup portab_adcgrpcfg2;
 +
  #ifdef __cplusplus
  extern "C" {
  #endif
 diff --git a/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h b/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h index a01ddd3f9..9083b5847 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h @@ -127,7 +127,7 @@   * ADC driver system settings.
   */
  #define STM32_ADC_COMPACT_SAMPLES           FALSE
 -#define STM32_ADC_USE_ADC1                  FALSE
 +#define STM32_ADC_USE_ADC1                  TRUE
  #define STM32_ADC_ADC1_DMA_CHANNEL          10
  #define STM32_ADC_ADC1_DMA_PRIORITY         2
  #define STM32_ADC_ADC12_IRQ_PRIORITY        5
 @@ -144,8 +144,8 @@   * DAC driver system settings.
   */
  #define STM32_DAC_DUAL_MODE                 FALSE
 -#define STM32_DAC_USE_DAC1_CH1              TRUE
 -#define STM32_DAC_USE_DAC1_CH2              TRUE
 +#define STM32_DAC_USE_DAC1_CH1              FALSE
 +#define STM32_DAC_USE_DAC1_CH2              FALSE
  #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
  #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
  #define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
 @@ -159,9 +159,9 @@  #define STM32_GPT_USE_TIM1                  FALSE
  #define STM32_GPT_USE_TIM2                  FALSE
  #define STM32_GPT_USE_TIM3                  FALSE
 -#define STM32_GPT_USE_TIM4                  FALSE
 +#define STM32_GPT_USE_TIM4                  TRUE
  #define STM32_GPT_USE_TIM5                  FALSE
 -#define STM32_GPT_USE_TIM6                  TRUE
 +#define STM32_GPT_USE_TIM6                  FALSE
  #define STM32_GPT_USE_TIM7                  FALSE
  #define STM32_GPT_USE_TIM8                  FALSE
  #define STM32_GPT_TIM1_IRQ_PRIORITY         7
 diff --git a/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.c b/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.c index 3c9c59911..7c6b1d2f5 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.c +++ b/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.c @@ -34,6 +34,80 @@  /* Module exported variables.                                                */
  /*===========================================================================*/
 +/*
 + * GPT configuration.
 + */
 +const GPTConfig portab_gptcfg1 = {
 +  .frequency    =  1000000U,
 +  .callback     =  NULL,
 +  .cr2          =  TIM_CR2_MMS_1,   /* MMS = 010 = TRGO on Update Event.    */
 +  .dier         =  0U
 +};
 +
 +const ADCConfig portab_adccfg1 = {
 +  .difsel       = 0U
 +};
 +
 +void adccallback(ADCDriver *adcp);
 +
 +/*
 + * ADC errors callback, should never happen.
 + */
 +void adcerrorcallback(ADCDriver *adcp, adcerror_t err);
 +
 +/*
 + * ADC conversion group 1.
 + * Mode:        One shot, 2 channels, SW triggered.
 + * Channels:    IN0, IN5.
 + */
 +const ADCConversionGroup portab_adcgrpcfg1 = {
 +  .circular     = false,
 +  .num_channels = ADC_GRP1_NUM_CHANNELS,
 +  .end_cb       = NULL,
 +  .error_cb     = adcerrorcallback,
 +  .cfgr         = 0U,
 +  .cfgr2        = 0U,
 +  .tr1          = ADC_TR(0, 4095),
 +  .smpr         = {
 +    ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
 +    ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5),
 +    0U
 +  },
 +  .sqr          = {
 +    ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
 +    0U,
 +    0U,
 +    0U
 +  }
 +};
 +
 +/*
 + * ADC conversion group 2.
 + * Mode:        Continuous, 2 channels, HW triggered by GPT4-TRGO.
 + * Channels:    IN0, IN5.
 + */
 +const ADCConversionGroup portab_adcgrpcfg2 = {
 +  .circular     = true,
 +  .num_channels = ADC_GRP2_NUM_CHANNELS,
 +  .end_cb       = adccallback,
 +  .error_cb     = adcerrorcallback,
 +  .cfgr         = ADC_CFGR_EXTEN_RISING |
 +                  ADC_CFGR_EXTSEL_SRC(12),  /* TIM4_TRGO */
 +  .cfgr2        = 0U,
 +  .tr1          = ADC_TR(0, 4095),
 +  .smpr         = {
 +    ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
 +    ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5),
 +    0U
 +  },
 +  .sqr          = {
 +    ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
 +    0U,
 +    0U,
 +    0U
 +  }
 +};
 +
  /*===========================================================================*/
  /* Module local types.                                                       */
  /*===========================================================================*/
 @@ -52,9 +126,9 @@  void portab_setup(void) {
 -  /* Setting up the output pin as analog as suggested
 -     by the Reference Manual.*/
 -  palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
 +  /* ADC inputs.*/
 +  palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
 +  palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
  }
  /** @} */
 diff --git a/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.h b/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.h index 48e8e60de..f4fe29722 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.h +++ b/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.h @@ -39,7 +39,11 @@  #define PORTAB_SD1                  LPSD1
 -#define PORTAB_DAC_TRIG             5
 +#define PORTAB_GPT1                 GPTD4
 +#define PORTAB_ADC1                 ADCD1
 +
 +#define ADC_GRP1_NUM_CHANNELS       2
 +#define ADC_GRP2_NUM_CHANNELS       2
  /*===========================================================================*/
  /* Module pre-compile time settings.                                         */
 @@ -61,6 +65,11 @@  /* External declarations.                                                    */
  /*===========================================================================*/
 +extern const GPTConfig portab_gptcfg1;
 +extern const ADCConfig portab_adccfg1;
 +extern const ADCConversionGroup portab_adcgrpcfg1;
 +extern const ADCConversionGroup portab_adcgrpcfg2;
 +
  #ifdef __cplusplus
  extern "C" {
  #endif
 diff --git a/testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch b/testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch index be98c7537..98cf3d524 100644 --- a/testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch +++ b/testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch @@ -33,7 +33,7 @@  <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>  <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>  <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> -<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="rand-main-(format)" val="4"/><content id="rp-mfs_flash_read-(cast_to_array)" val="0:511"/><content id="rp[507]-rp-mfs_flash_read-(format)" val="0"/><content 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<globalVariableList/>
"/>  <stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<memoryBlockExpressionList>
<memoryBlockExpressionItem>
<expression text="0x20000c34"/>
</memoryBlockExpressionItem>
</memoryBlockExpressionList>
"/>  <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${selected_resource_loc}"/> diff --git a/testhal/STM32/multi/ADC/main.c b/testhal/STM32/multi/ADC/main.c index 8e26c3819..1167fa230 100644 --- a/testhal/STM32/multi/ADC/main.c +++ b/testhal/STM32/multi/ADC/main.c @@ -57,7 +57,7 @@ void adccallback(ADCDriver *adcp) {    }
    if ((n % 200) == 0U) {
 -    palToggleLine(LINE_LED2);
 +    palToggleLine(PORTAB_LINE_LED2);
    }
  }
 @@ -86,9 +86,9 @@ static THD_FUNCTION(Thread1, arg) {    (void)arg;
    chRegSetThreadName("blinker");
    while (true) {
 -    palSetLine(LINE_LED1);
 +    palSetLine(PORTAB_LINE_LED1);
      chThdSleepMilliseconds(500);
 -    palClearLine(LINE_LED1);
 +    palClearLine(PORTAB_LINE_LED1);
      chThdSleepMilliseconds(500);
    }
  }
 | 
