diff options
Diffstat (limited to 'testhal/STM32/ADC')
| -rw-r--r-- | testhal/STM32/ADC/Makefile | 205 | ||||
| -rw-r--r-- | testhal/STM32/ADC/ch.ld | 113 | ||||
| -rw-r--r-- | testhal/STM32/ADC/chconf.h | 487 | ||||
| -rw-r--r-- | testhal/STM32/ADC/halconf.h | 163 | ||||
| -rw-r--r-- | testhal/STM32/ADC/main.c | 131 | ||||
| -rw-r--r-- | testhal/STM32/ADC/mcuconf.h | 121 | ||||
| -rw-r--r-- | testhal/STM32/ADC/readme.txt | 26 | 
7 files changed, 1246 insertions, 0 deletions
diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile new file mode 100644 index 000000000..e430a7678 --- /dev/null +++ b/testhal/STM32/ADC/Makefile @@ -0,0 +1,205 @@ +##############################################################################
 +# Build global options
 +# NOTE: Can be overridden externally.
 +#
 +
 +# Compiler options here.
 +ifeq ($(USE_OPT),)
 +  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
 +endif
 +
 +# C++ specific options here (added to USE_OPT).
 +ifeq ($(USE_CPPOPT),)
 +  USE_CPPOPT = -fno-rtti
 +endif
 +
 +# Enable this if you want the linker to remove unused code and data
 +ifeq ($(USE_LINK_GC),)
 +  USE_LINK_GC = yes
 +endif
 +
 +# If enabled, this option allows to compile the application in THUMB mode.
 +ifeq ($(USE_THUMB),)
 +  USE_THUMB = yes
 +endif
 +
 +# Enable register caching optimization (read documentation).
 +ifeq ($(USE_CURRP_CACHING),)
 +  USE_CURRP_CACHING = no
 +endif
 +
 +#
 +# Build global options
 +##############################################################################
 +
 +##############################################################################
 +# Architecture or project specific options
 +#
 +
 +# Enable this if you really want to use the STM FWLib.
 +ifeq ($(USE_FWLIB),)
 +  USE_FWLIB = no
 +endif
 +
 +#
 +# Architecture or project specific options
 +##############################################################################
 +
 +##############################################################################
 +# Project, sources and paths
 +#
 +
 +# Define project name here
 +PROJECT = ch
 +
 +# Define linker script file here
 +LDSCRIPT= ch.ld
 +
 +# Imported source files
 +CHIBIOS = ../../..
 +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk
 +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk
 +include $(CHIBIOS)/os/hal/hal.mk
 +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk
 +include $(CHIBIOS)/os/kernel/kernel.mk
 +#include $(CHIBIOS)/test/test.mk
 +
 +# C sources that can be compiled in ARM or THUMB mode depending on the global
 +# setting.
 +CSRC = $(PORTSRC) \
 +       $(KERNSRC) \
 +       $(TESTSRC) \
 +       $(HALSRC) \
 +       $(PLATFORMSRC) \
 +       $(BOARDSRC) \
 +       $(CHIBIOS)/os/various/evtimer.c \
 +       $(CHIBIOS)/os/various/syscalls.c \
 +       main.c +
 +# C++ sources that can be compiled in ARM or THUMB mode depending on the global
 +# setting.
 +CPPSRC =
 +
 +# C sources to be compiled in ARM mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +ACSRC =
 +
 +# C++ sources to be compiled in ARM mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +ACPPSRC =
 +
 +# C sources to be compiled in THUMB mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +TCSRC =
 +
 +# C sources to be compiled in THUMB mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +TCPPSRC =
 +
 +# List ASM source files here
 +ASMSRC = $(PORTASM) \
 +         $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
 +
 +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
 +         $(HALINC) $(PLATFORMINC) $(BOARDINC) \
 +         $(CHIBIOS)/os/various
 +
 +#
 +# Project, sources and paths
 +##############################################################################
 +
 +##############################################################################
 +# Compiler settings
 +#
 +
 +MCU  = cortex-m3
 +
 +#TRGT = arm-elf-
 +TRGT = arm-none-eabi-
 +CC   = $(TRGT)gcc
 +CPPC = $(TRGT)g++
 +# Enable loading with g++ only if you need C++ runtime support.
 +# NOTE: You can use C++ even without C++ support if you are careful. C++
 +#       runtime support makes code size explode.
 +LD   = $(TRGT)gcc
 +#LD   = $(TRGT)g++
 +CP   = $(TRGT)objcopy
 +AS   = $(TRGT)gcc -x assembler-with-cpp
 +OD   = $(TRGT)objdump
 +HEX  = $(CP) -O ihex
 +BIN  = $(CP) -O binary
 +
 +# ARM-specific options here
 +AOPT =
 +
 +# THUMB-specific options here
 +TOPT = -mthumb -DTHUMB
 +
 +# Define C warning options here
 +CWARN = -Wall -Wextra -Wstrict-prototypes
 +
 +# Define C++ warning options here
 +CPPWARN = -Wall -Wextra
 +
 +#
 +# Compiler settings
 +##############################################################################
 +
 +##############################################################################
 +# Start of default section
 +#
 +
 +# List all default C defines here, like -D_DEBUG=1
 +DDEFS = -DCORTEX_USE_BASEPRI=TRUE
 +
 +# List all default ASM defines here, like -D_DEBUG=1
 +DADEFS =
 +
 +# List all default directories to look for include files here
 +DINCDIR =
 +
 +# List the default directory to look for the libraries here
 +DLIBDIR =
 +
 +# List all default libraries here
 +DLIBS =
 +
 +#
 +# End of default section
 +##############################################################################
 +
 +##############################################################################
 +# Start of user section
 +#
 +
 +# List all user C define here, like -D_DEBUG=1
 +UDEFS =
 +
 +# Define ASM defines here
 +UADEFS =
 +
 +# List all user directories here
 +UINCDIR =
 +
 +# List the user directory to look for the libraries here
 +ULIBDIR =
 +
 +# List all user libraries here
 +ULIBS =
 +
 +#
 +# End of user defines
 +##############################################################################
 +
 +ifeq ($(USE_FWLIB),yes)
 +  include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
 +  CSRC += $(STM32SRC)
 +  INCDIR += $(STM32INC)
 +  USE_OPT += -DUSE_STDPERIPH_DRIVER
 +endif
 +
 +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
 diff --git a/testhal/STM32/ADC/ch.ld b/testhal/STM32/ADC/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/ADC/ch.ld @@ -0,0 +1,113 @@ +/*
 +    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
 +
 +    This file is part of ChibiOS/RT.
 +
 +    ChibiOS/RT is free software; you can redistribute it and/or modify
 +    it under the terms of the GNU General Public License as published by
 +    the Free Software Foundation; either version 3 of the License, or
 +    (at your option) any later version.
 +
 +    ChibiOS/RT is distributed in the hope that it will be useful,
 +    but WITHOUT ANY WARRANTY; without even the implied warranty of
 +    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 +    GNU General Public License for more details.
 +
 +    You should have received a copy of the GNU General Public License
 +    along with this program.  If not, see <http://www.gnu.org/licenses/>.
 +*/
 +
 +/*
 + * ST32F103 memory setup.
 + */
 +__main_stack_size__     = 0x0400;
 +__process_stack_size__  = 0x0400;
 +__stacks_total_size__   = __main_stack_size__ + __process_stack_size__;
 +
 +MEMORY
 +{
 +    flash : org = 0x08000000, len = 128k
 +    ram : org = 0x20000000, len = 20k
 +}
 +
 +__ram_start__           = ORIGIN(ram);
 +__ram_size__            = LENGTH(ram);
 +__ram_end__             = __ram_start__ + __ram_size__;
 +
 +SECTIONS
 +{
 +    . = 0;
 +
 +    .text : ALIGN(16) SUBALIGN(16)
 +    {
 +        _text = .;
 +        KEEP(*(vectors))
 +        *(.text)
 +        *(.text.*)
 +        *(.rodata)
 +        *(.rodata.*)
 +        *(.glue_7t)
 +        *(.glue_7)
 +        *(.gcc*)
 +    } > flash
 +
 +    .ctors :
 +    {
 +        PROVIDE(_ctors_start_ = .);
 +        KEEP(*(SORT(.ctors.*)))
 +        KEEP(*(.ctors))
 +        PROVIDE(_ctors_end_ = .);
 +    } > flash
 +
 +    .dtors :
 +    {
 +        PROVIDE(_dtors_start_ = .);
 +        KEEP(*(SORT(.dtors.*)))
 +        KEEP(*(.dtors))
 +        PROVIDE(_dtors_end_ = .);
 +    } > flash
 +
 +    .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
 +
 +    __exidx_start = .;
 +    .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
 +    __exidx_end = .;
 +
 +    .eh_frame_hdr : {*(.eh_frame_hdr)}
 +
 +    .eh_frame : ONLY_IF_RO {*(.eh_frame)}
 +
 +    . = ALIGN(4);
 +    _etext = .;
 +    _textdata = _etext;
 +
 +    .data :
 +    {
 +        _data = .;
 +        *(.data)
 +        . = ALIGN(4);
 +        *(.data.*)
 +        . = ALIGN(4);
 +        *(.ramtext)
 +        . = ALIGN(4);
 +        _edata = .;
 +    } > ram AT > flash
 +
 +    .bss :
 +    {
 +        _bss_start = .;
 +        *(.bss)
 +        . = ALIGN(4);
 +        *(.bss.*)
 +        . = ALIGN(4);
 +        *(COMMON)
 +        . = ALIGN(4);
 +        _bss_end = .;
 +    } > ram    
 +}
 +
 +PROVIDE(end = .);
 +_end            = .;
 +
 +__heap_base__   = _end;
 +__heap_end__    = __ram_end__ - __stacks_total_size__;
 diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h new file mode 100644 index 000000000..6522e0b3b --- /dev/null +++ b/testhal/STM32/ADC/chconf.h @@ -0,0 +1,487 @@ +/*
 +    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
 +
 +    This file is part of ChibiOS/RT.
 +
 +    ChibiOS/RT is free software; you can redistribute it and/or modify
 +    it under the terms of the GNU General Public License as published by
 +    the Free Software Foundation; either version 3 of the License, or
 +    (at your option) any later version.
 +
 +    ChibiOS/RT is distributed in the hope that it will be useful,
 +    but WITHOUT ANY WARRANTY; without even the implied warranty of
 +    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 +    GNU General Public License for more details.
 +
 +    You should have received a copy of the GNU General Public License
 +    along with this program.  If not, see <http://www.gnu.org/licenses/>.
 +*/
 +
 +/**
 + * @file    templates/chconf.h
 + * @brief   Configuration file template.
 + * @details A copy of this file must be placed in each project directory, it
 + *          contains the application specific kernel settings.
 + *
 + * @addtogroup config
 + * @details Kernel related settings and hooks.
 + * @{
 + */
 +
 +#ifndef _CHCONF_H_
 +#define _CHCONF_H_
 +
 +/*===========================================================================*/
 +/* Kernel parameters.                                                        */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   System tick frequency.
 + * @details Frequency of the system timer that drives the system ticks. This
 + *          setting also defines the system tick time unit.
 + */
 +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
 +#define CH_FREQUENCY                    1000
 +#endif
 +
 +/**
 + * @brief   Round robin interval.
 + * @details This constant is the number of system ticks allowed for the
 + *          threads before preemption occurs. Setting this value to zero
 + *          disables the preemption for threads with equal priority and the
 + *          round robin becomes cooperative. Note that higher priority
 + *          threads can still preempt, the kernel is always preemptive.
 + *
 + * @note    Disabling the round robin preemption makes the kernel more compact
 + *          and generally faster.
 + */
 +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
 +#define CH_TIME_QUANTUM                 20
 +#endif
 +
 +/**
 + * @brief   Nested locks.
 + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
 + *          operations is allowed.<br>
 + *          For performance and code size reasons the recommended setting
 + *          is to leave this option disabled.<br>
 + *          You may use this option if you need to merge ChibiOS/RT with
 + *          external libraries that require nested lock/unlock operations.
 + *
 + * @note T  he default is @p FALSE.
 + */
 +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
 +#define CH_USE_NESTED_LOCKS             FALSE
 +#endif
 +
 +/**
 + * @brief   Managed RAM size.
 + * @details Size of the RAM area to be managed by the OS. If set to zero
 + *          then the whole available RAM is used. The core memory is made
 + *          available to the heap allocator and/or can be used directly through
 + *          the simplified core memory allocator.
 + *
 + * @note    In order to let the OS manage the whole RAM the linker script must
 + *          provide the @p __heap_base__ and @p __heap_end__ symbols.
 + * @note    Requires @p CH_USE_COREMEM.
 + */
 +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
 +#define CH_MEMCORE_SIZE                 0
 +#endif
 +
 +/*===========================================================================*/
 +/* Performance options.                                                      */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   OS optimization.
 + * @details If enabled then time efficient rather than space efficient code
 + *          is used when two possible implementations exist.
 + *
 + * @note    This is not related to the compiler optimization options.
 + * @note    The default is @p TRUE.
 + */
 +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
 +#define CH_OPTIMIZE_SPEED               TRUE
 +#endif
 +
 +/**
 + * @brief   Exotic optimization.
 + * @details If defined then a CPU register is used as storage for the global
 + *          @p currp variable. Caching this variable in a register greatly
 + *          improves both space and time OS efficiency. A side effect is that
 + *          one less register has to be saved during the context switch
 + *          resulting in lower RAM usage and faster context switch.
 + *
 + * @note    This option is only usable with the GCC compiler and is only useful
 + *          on processors with many registers like ARM cores.
 + * @note    If this option is enabled then ALL the libraries linked to the
 + *          ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
 + *          -ffixed-@<reg@>.
 + * @note    This option must be enabled in the Makefile, it is listed here for
 + *          documentation only.
 + */
 +#if defined(__DOXYGEN__)
 +#define CH_CURRP_REGISTER_CACHE         "reg"
 +#endif
 +
 +/*===========================================================================*/
 +/* Subsystem options.                                                        */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Threads registry APIs.
 + * @details If enabled then the registry APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
 +#define CH_USE_REGISTRY                 TRUE
 +#endif
 +
 +/**
 + * @brief   Threads synchronization APIs.
 + * @details If enabled then the @p chThdWait() function is included in
 + *          the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
 +#define CH_USE_WAITEXIT                 TRUE
 +#endif
 +
 +/**
 + * @brief   Semaphores APIs.
 + * @details If enabled then the Semaphores APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
 +#define CH_USE_SEMAPHORES               TRUE
 +#endif
 +
 +/**
 + * @brief   Semaphores queuing mode.
 + * @details If enabled then the threads are enqueued on semaphores by
 + *          priority rather than in FIFO order.
 + *
 + * @note    The default is @p FALSE. Enable this if you have special requirements.
 + * @note    Requires @p CH_USE_SEMAPHORES.
 + */
 +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
 +#define CH_USE_SEMAPHORES_PRIORITY      FALSE
 +#endif
 +
 +/**
 + * @brief   Atomic semaphore API.
 + * @details If enabled then the semaphores the @p chSemSignalWait() API
 + *          is included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_USE_SEMAPHORES.
 + */
 +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
 +#define CH_USE_SEMSW                    TRUE
 +#endif
 +
 +/**
 + * @brief   Mutexes APIs.
 + * @details If enabled then the mutexes APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
 +#define CH_USE_MUTEXES                  TRUE
 +#endif
 +
 +/**
 + * @brief   Conditional Variables APIs.
 + * @details If enabled then the conditional variables APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_USE_MUTEXES.
 + */
 +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
 +#define CH_USE_CONDVARS                 TRUE
 +#endif
 +
 +/**
 + * @brief   Conditional Variables APIs with timeout.
 + * @details If enabled then the conditional variables APIs with timeout
 + *          specification are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_USE_CONDVARS.
 + */
 +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
 +#define CH_USE_CONDVARS_TIMEOUT         TRUE
 +#endif
 +
 +/**
 + * @brief   Events Flags APIs.
 + * @details If enabled then the event flags APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
 +#define CH_USE_EVENTS                   TRUE
 +#endif
 +
 +/**
 + * @brief   Events Flags APIs with timeout.
 + * @details If enabled then the events APIs with timeout specification
 + *          are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_USE_EVENTS.
 + */
 +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
 +#define CH_USE_EVENTS_TIMEOUT           TRUE
 +#endif
 +
 +/**
 + * @brief   Synchronous Messages APIs.
 + * @details If enabled then the synchronous messages APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
 +#define CH_USE_MESSAGES                 TRUE
 +#endif
 +
 +/**
 + * @brief   Synchronous Messages queuing mode.
 + * @details If enabled then messages are served by priority rather than in
 + *          FIFO order.
 + *
 + * @note    The default is @p FALSE. Enable this if you have special requirements.
 + * @note    Requires @p CH_USE_MESSAGES.
 + */
 +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
 +#define CH_USE_MESSAGES_PRIORITY        FALSE
 +#endif
 +
 +/**
 + * @brief   Mailboxes APIs.
 + * @details If enabled then the asynchronous messages (mailboxes) APIs are
 + *          included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_USE_SEMAPHORES.
 + */
 +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
 +#define CH_USE_MAILBOXES                TRUE
 +#endif
 +
 +/**
 + * @brief   I/O Queues APIs.
 + * @details If enabled then the I/O queues APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_USE_SEMAPHORES.
 + */
 +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
 +#define CH_USE_QUEUES                   TRUE
 +#endif
 +
 +/**
 + * @brief   Core Memory Manager APIs.
 + * @details If enabled then the core memory manager APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
 +#define CH_USE_MEMCORE                  TRUE
 +#endif
 +
 +/**
 + * @brief   Heap Allocator APIs.
 + * @details If enabled then the memory heap allocator APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
 + *          @p CH_USE_SEMAPHORES.
 + * @note    Mutexes are recommended.
 + */
 +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
 +#define CH_USE_HEAP                     TRUE
 +#endif
 +
 +/**
 + * @brief   C-runtime allocator.
 + * @details If enabled the the heap allocator APIs just wrap the C-runtime
 + *          @p malloc() and @p free() functions.
 + *
 + * @note    The default is @p FALSE.
 + * @note    Requires @p CH_USE_HEAP.
 + * @note    The C-runtime may or may not require @p CH_USE_COREMEM, see the
 + *          appropriate documentation.
 + */
 +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
 +#define CH_USE_MALLOC_HEAP              FALSE
 +#endif
 +
 +/**
 + * @brief   Memory Pools Allocator APIs.
 + * @details If enabled then the memory pools allocator APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
 +#define CH_USE_MEMPOOLS                 TRUE
 +#endif
 +
 +/**
 + * @brief   Dynamic Threads APIs.
 + * @details If enabled then the dynamic threads creation APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_USE_WAITEXIT.
 + * @note    Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
 + */
 +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
 +#define CH_USE_DYNAMIC                  TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* Debug options.                                                            */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Debug option, parameters checks.
 + * @details If enabled then the checks on the API functions input
 + *          parameters are activated.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
 +#define CH_DBG_ENABLE_CHECKS            FALSE
 +#endif
 +
 +/**
 + * @brief   Debug option, consistency checks.
 + * @details If enabled then all the assertions in the kernel code are
 + *          activated. This includes consistency checks inside the kernel,
 + *          runtime anomalies and port-defined checks.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
 +#define CH_DBG_ENABLE_ASSERTS           FALSE
 +#endif
 +
 +/**
 + * @brief   Debug option, trace buffer.
 + * @details If enabled then the context switch circular trace buffer is
 + *          activated.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
 +#define CH_DBG_ENABLE_TRACE             FALSE
 +#endif
 +
 +/**
 + * @brief   Debug option, stack checks.
 + * @details If enabled then a runtime stack check is performed.
 + *
 + * @note    The default is @p FALSE.
 + * @note    The stack check is performed in a architecture/port dependent way.
 + *          It may not be implemented or some ports.
 + * @note    The default failure mode is to halt the system with the global
 + *          @p panic_msg variable set to @p NULL.
 + */
 +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
 +#define CH_DBG_ENABLE_STACK_CHECK       FALSE
 +#endif
 +
 +/**
 + * @brief   Debug option, stacks initialization.
 + * @details If enabled then the threads working area is filled with a byte
 + *          value when a thread is created. This can be useful for the
 + *          runtime measurement of the used stack.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
 +#define CH_DBG_FILL_THREADS             FALSE
 +#endif
 +
 +/**
 + * @brief   Debug option, threads profiling.
 + * @details If enabled then a field is added to the @p Thread structure that
 + *          counts the system ticks occurred while executing the thread.
 + *
 + * @note    The default is @p TRUE.
 + * @note    This debug option is defaulted to TRUE because it is required by
 + *          some test cases into the test suite.
 + */
 +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
 +#define CH_DBG_THREADS_PROFILING        TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* Kernel hooks.                                                             */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Threads descriptor structure hook.
 + * @details User fields added to the end of the @p Thread structure.
 + */
 +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
 +#define THREAD_EXT_FIELDS                                               \
 +struct {                                                                \
 +  /* Add threads custom fields here.*/                                  \
 +};
 +#endif
 +
 +/**
 + * @brief   Threads initialization hook.
 + * @details User initialization code added to the @p chThdInit() API.
 + *
 + * @note    It is invoked from within @p chThdInit() and implicitily from all
 + *          the threads creation APIs.
 + */
 +#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__)
 +#define THREAD_EXT_INIT(tp) {                                           \
 +  /* Add threads initialization code here.*/                            \
 +}
 +#endif
 +
 +/**
 + * @brief   Threads finalization hook.
 + * @details User finalization code added to the @p chThdExit() API.
 + *
 + * @note    It is inserted into lock zone.
 + * @note    It is also invoked when the threads simply return in order to
 + *          terminate.
 + */
 +#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__)
 +#define THREAD_EXT_EXIT(tp) {                                           \
 +  /* Add threads finalization code here.*/                              \
 +}
 +#endif
 +
 +/**
 + * @brief   Idle Loop hook.
 + * @details This hook is continuously invoked by the idle thread loop.
 + */
 +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
 +#define IDLE_LOOP_HOOK() {                                              \
 +  /* Idle loop code here.*/                                             \
 +}
 +#endif
 +
 +/*===========================================================================*/
 +/* Port-specific settings (override port settings defaulted in chcore.h).    */
 +/*===========================================================================*/
 +
 +#endif  /* _CHCONF_H_ */
 +
 +/** @} */
 diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h new file mode 100644 index 000000000..af334fb5b --- /dev/null +++ b/testhal/STM32/ADC/halconf.h @@ -0,0 +1,163 @@ +/*
 +    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
 +
 +    This file is part of ChibiOS/RT.
 +
 +    ChibiOS/RT is free software; you can redistribute it and/or modify
 +    it under the terms of the GNU General Public License as published by
 +    the Free Software Foundation; either version 3 of the License, or
 +    (at your option) any later version.
 +
 +    ChibiOS/RT is distributed in the hope that it will be useful,
 +    but WITHOUT ANY WARRANTY; without even the implied warranty of
 +    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 +    GNU General Public License for more details.
 +
 +    You should have received a copy of the GNU General Public License
 +    along with this program.  If not, see <http://www.gnu.org/licenses/>.
 +*/
 +
 +/**
 + * @file templates/halconf.h
 + * @brief HAL configuration header.
 + * @addtogroup HAL_CONF
 + * @{
 + */
 +
 +/*
 + * HAL configuration file, this file allows to enable or disable the various
 + * device drivers from your application. You may also use this file in order
 + * to override the device drivers default settings.
 + */
 +
 +#ifndef _HALCONF_H_
 +#define _HALCONF_H_
 +
 +/*
 + * Uncomment the following line in order to include a mcu-related
 + * settings file. This file can be used to include platform specific
 + * header files or to override the low level drivers settings.
 + */
 +#include "mcuconf.h"
 +
 +/*===========================================================================*/
 +/* PAL driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief Enables the PAL subsystem.
 + */
 +#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)
 +#define CH_HAL_USE_PAL              TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* ADC driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief Enables the ADC subsystem.
 + */
 +#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)
 +#define CH_HAL_USE_ADC              TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* CAN driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief Enables the CAN subsystem.
 + */
 +#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)
 +#define CH_HAL_USE_CAN              FALSE
 +#endif
 +
 +/*===========================================================================*/
 +/* MAC driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief Enables the MAC subsystem.
 + */
 +#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
 +#define CH_HAL_USE_MAC              FALSE
 +#endif
 +
 +/*===========================================================================*/
 +/* PWM driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief Enables the PWM subsystem.
 + */
 +#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
 +#define CH_HAL_USE_PWM              FALSE
 +#endif
 +
 +/*===========================================================================*/
 +/* SERIAL driver related settings.                                           */
 +/*===========================================================================*/
 +
 +/**
 + * @brief Enables the SERIAL subsystem.
 + */
 +#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
 +#define CH_HAL_USE_SERIAL           FALSE
 +#endif
 +
 +/*
 + * Default SERIAL settings overrides (uncomment to override).
 + */
 +/*#define SERIAL_DEFAULT_BITRATE      38400*/
 +/*#define SERIAL_BUFFERS_SIZE         64*/
 +
 +/*===========================================================================*/
 +/* SPI driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief Enables the SPI subsystem.
 + */
 +#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
 +#define CH_HAL_USE_SPI              FALSE
 +#endif
 +
 +/*
 + * Default SPI settings overrides (uncomment to override).
 + */
 +/*#define SPI_USE_MUTUAL_EXCLUSION    TRUE*/
 +
 +/*===========================================================================*/
 +/* MMC_SPI driver related settings.                                          */
 +/*===========================================================================*/
 +
 +/**
 + * @brief Enables the MMC_SPI subsystem.
 + */
 +#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
 +#define CH_HAL_USE_MMC_SPI          FALSE
 +#endif
 +
 +/*
 + * Default MMC_SPI settings overrides (uncomment to override).
 + */
 +/*#define MMC_SECTOR_SIZE             512*/
 +/*#define MMC_NICE_WAITING            TRUE*/
 +/*#define MMC_POLLING_INTERVAL        10*/
 +/*#define MMC_POLLING_DELAY           10*/
 +
 +/*===========================================================================*/
 +/* UART driver related settings.                                             */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables the UART subsystem.
 + */
 +#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__)
 +#define CH_HAL_USE_UART             FALSE
 +#endif
 +
 +#endif /* _HALCONF_H_ */
 +
 +/** @} */
 diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c new file mode 100644 index 000000000..b5264130c --- /dev/null +++ b/testhal/STM32/ADC/main.c @@ -0,0 +1,131 @@ +/*
 +    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
 +
 +    This file is part of ChibiOS/RT.
 +
 +    ChibiOS/RT is free software; you can redistribute it and/or modify
 +    it under the terms of the GNU General Public License as published by
 +    the Free Software Foundation; either version 3 of the License, or
 +    (at your option) any later version.
 +
 +    ChibiOS/RT is distributed in the hope that it will be useful,
 +    but WITHOUT ANY WARRANTY; without even the implied warranty of
 +    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 +    GNU General Public License for more details.
 +
 +    You should have received a copy of the GNU General Public License
 +    along with this program.  If not, see <http://www.gnu.org/licenses/>.
 +*/
 +
 +#include "ch.h"
 +#include "hal.h"
 +
 +#define ADC_GRP1_NUM_CHANNELS   8
 +#define ADC_GRP1_BUF_DEPTH      16
 +
 +/*
 + * ADC configuration, empty for STM32, nothing to configure.
 + */
 +static const ADCConfig adccfg = {};
 +
 +/*
 + * ADC conversion group.
 + * Mode:        Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Channels:    IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef.
 + */
 +static const ADCConversionGroup adcgrpcfg = {
 +  TRUE,
 +  ADC_GRP1_NUM_CHANNELS,
 +  0,
 +  ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT,
 +  0,
 +  0,
 +  ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
 +  ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT),
 +  ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11)   | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) |
 +  ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11)   | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) |
 +  ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11)   | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10)
 +};
 +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
 +static Thread *adctp;
 +
 +/*
 + * ADC streaming callback.
 + */
 +size_t nx = 0, ny = 0;
 +static void adccallback(adcsample_t *buffer, size_t n) {
 +
 +  if (samples == buffer) {
 +    nx += n;
 +  }
 +  else {
 +    ny += n;
 +  }
 +}
 +
 +/*
 + * ADC continuous conversion thread.
 + */
 +static WORKING_AREA(adc_continuous_wa, 256);
 +static msg_t adc_continuous_thread(void *p){
 +
 +  (void)p;
 +  adcStart(&ADCD1, &adccfg);
 +  adcStartConversion(&ADCD1, &adcgrpcfg, samples,
 +                     ADC_GRP1_BUF_DEPTH, adccallback);
 +  adcWaitConversion(&ADCD1, TIME_INFINITE);
 +  adcStop(&ADCD1);
 +  return 0;
 +}
 +
 +/*
 + * Red LEDs blinker thread, times are in milliseconds.
 + */
 +static WORKING_AREA(waThread1, 128);
 +static msg_t Thread1(void *arg) {
 +
 +  (void)arg;
 +  while (TRUE) {
 +    palClearPad(IOPORT3, GPIOC_LED);
 +    chThdSleepMilliseconds(500);
 +    palSetPad(IOPORT3, GPIOC_LED);
 +    chThdSleepMilliseconds(500);
 +  }
 +  return 0;
 +}
 +
 +/*
 + * Entry point, note, the main() function is already a thread in the system
 + * on entry.
 + */
 +int main(int argc, char **argv) {
 +
 +  (void)argc;
 +  (void)argv;
 +
 +  /*
 +   * Setting up analog inputs used by the demo. +   */
 +  palSetGroupMode(IOPORT3,
 +                  PAL_PORT_BIT(0) | PAL_PORT_BIT(1),
 +                  PAL_MODE_INPUT_ANALOG);
 +
 +  /*
 +   * Creates the blinker thread.
 +   */
 +  chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
 +
 +  /*
 +   * Creates the ADC continuous conversion test thread.
 +   */
 +  adctp = chThdCreateStatic(adc_continuous_wa, sizeof(adc_continuous_wa),
 +                            NORMALPRIO + 10, adc_continuous_thread, NULL);
 +
 +  /*
 +   * Normal main() thread activity, in this demo it does nothing.
 +   */
 +  while (TRUE) {
 +    chThdSleepMilliseconds(500);
 +  }
 +  return 0;
 +}
 diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h new file mode 100644 index 000000000..98ffc6e5a --- /dev/null +++ b/testhal/STM32/ADC/mcuconf.h @@ -0,0 +1,121 @@ +/*
 +    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
 +
 +    This file is part of ChibiOS/RT.
 +
 +    ChibiOS/RT is free software; you can redistribute it and/or modify
 +    it under the terms of the GNU General Public License as published by
 +    the Free Software Foundation; either version 3 of the License, or
 +    (at your option) any later version.
 +
 +    ChibiOS/RT is distributed in the hope that it will be useful,
 +    but WITHOUT ANY WARRANTY; without even the implied warranty of
 +    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 +    GNU General Public License for more details.
 +
 +    You should have received a copy of the GNU General Public License
 +    along with this program.  If not, see <http://www.gnu.org/licenses/>.
 +*/
 +
 +/*
 + * STM32 drivers configuration.
 + * The following settings override the default settings present in
 + * the various device driver implementation headers.
 + * Note that the settings for each driver only have effect if the driver
 + * is enabled in halconf.h.
 + *
 + * IRQ priorities:
 + * 15...0       Lowest...Highest.
 + *
 + * DMA priorities:
 + * 0...3        Lowest...Highest.
 + */
 +
 +/*
 + * HAL driver system settings.
 + */
 +#define STM32_SW                    STM32_SW_PLL
 +#define STM32_PLLSRC                STM32_PLLSRC_HSE
 +#define STM32_PLLXTPRE              STM32_PLLXTPRE_DIV1
 +#define STM32_PLLMUL_VALUE          9
 +#define STM32_HPRE                  STM32_HPRE_DIV1
 +#define STM32_PPRE1                 STM32_PPRE1_DIV2
 +#define STM32_PPRE2                 STM32_PPRE2_DIV2
 +#define STM32_ADCPRE                STM32_ADCPRE_DIV4
 +#define STM32_MCO                   STM32_MCO_NOCLOCK
 +
 +/*
 + * ADC driver system settings.
 + */
 +#define USE_STM32_ADC1              TRUE
 +#define STM32_ADC1_DMA_PRIORITY     3
 +#define STM32_ADC1_IRQ_PRIORITY     5
 +#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt()
 +
 +/*
 + * CAN driver system settings.
 + */
 +#define USE_STM32_CAN1              TRUE
 +#define STM32_CAN1_IRQ_PRIORITY     11
 +
 +/*
 + * PWM driver system settings.
 + */
 +#define USE_STM32_PWM1              TRUE
 +#define USE_STM32_PWM2              FALSE
 +#define USE_STM32_PWM3              FALSE
 +#define USE_STM32_PWM4              FALSE
 +#define STM32_PWM1_IRQ_PRIORITY     7
 +#define STM32_PWM2_IRQ_PRIORITY     7
 +#define STM32_PWM3_IRQ_PRIORITY     7
 +#define STM32_PWM4_IRQ_PRIORITY     7
 +
 +/*
 + * SERIAL driver system settings.
 + */
 +#define USE_STM32_USART1            FALSE
 +#define USE_STM32_USART2            FALSE
 +#define USE_STM32_USART3            FALSE
 +#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
 +#define USE_STM32_UART4             FALSE
 +#define USE_STM32_UART5             FALSE
 +#endif
 +#define STM32_USART1_PRIORITY       12
 +#define STM32_USART2_PRIORITY       12
 +#define STM32_USART3_PRIORITY       12
 +#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
 +#define STM32_UART4_PRIORITY        12
 +#define STM32_UART5_PRIORITY        12
 +#endif
 +
 +/*
 + * SPI driver system settings.
 + */
 +#define USE_STM32_SPI1              TRUE
 +#define USE_STM32_SPI2              TRUE
 +#define USE_STM32_SPI3              TRUE
 +#define STM32_SPI1_DMA_PRIORITY     2
 +#define STM32_SPI2_DMA_PRIORITY     2
 +#define STM32_SPI3_DMA_PRIORITY     2
 +#define STM32_SPI1_IRQ_PRIORITY     10
 +#define STM32_SPI2_IRQ_PRIORITY     10
 +#define STM32_SPI3_IRQ_PRIORITY     10
 +#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt()
 +#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt()
 +#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt()
 +
 +/*
 + * UART driver system settings.
 + */
 +#define STM32_UART_USE_USART1               FALSE
 +#define STM32_UART_USE_USART2               TRUE
 +#define STM32_UART_USE_USART3               FALSE
 +#define STM32_UART_USART1_IRQ_PRIORITY      12
 +#define STM32_UART_USART2_IRQ_PRIORITY      12
 +#define STM32_UART_USART3_IRQ_PRIORITY      12
 +#define STM32_UART_USART1_DMA_PRIORITY      0
 +#define STM32_UART_USART2_DMA_PRIORITY      0
 +#define STM32_UART_USART3_DMA_PRIORITY      0
 +#define STM32_UART_USART1_DMA_ERROR_HOOK()  chSysHalt()
 +#define STM32_UART_USART2_DMA_ERROR_HOOK()  chSysHalt()
 +#define STM32_UART_USART3_DMA_ERROR_HOOK()  chSysHalt()
 diff --git a/testhal/STM32/ADC/readme.txt b/testhal/STM32/ADC/readme.txt new file mode 100644 index 000000000..e0cf0adea --- /dev/null +++ b/testhal/STM32/ADC/readme.txt @@ -0,0 +1,26 @@ +*****************************************************************************
 +** ChibiOS/RT HAL - ADC driver demo for STM32.                             **
 +*****************************************************************************
 +
 +** TARGET **
 +
 +The demo will on an Olimex STM32-P103 board.
 +
 +** The Demo **
 +
 +The application demonstrates the use of the STM32 ADC driver.
 +
 +** Build Procedure **
 +
 +The demo has been tested by using the free Codesourcery GCC-based toolchain
 +and YAGARTO.
 +Just modify the TRGT line in the makefile in order to use different GCC ports.
 +
 +** Notes **
 +
 +Some files used by the demo are not part of ChibiOS/RT but are copyright of
 +ST Microelectronics and are licensed under a different license.
 +Also note that not all the files present in the ST library are distribited
 +with ChibiOS/RT, you can find the whole library on the ST web site:
 +
 +                             http://www.st.com
  | 
