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-rw-r--r--os/common/ext/CMSIS/ST/STM32L4xx/stm32l431xx.h8
-rw-r--r--os/common/ext/CMSIS/ST/STM32L4xx/stm32l433xx.h8
-rw-r--r--os/common/ext/CMSIS/ST/STM32L4xx/stm32l443xx.h8
-rw-r--r--os/common/ext/CMSIS/ST/STM32L4xx/stm32l471xx.h8
-rw-r--r--os/common/ext/CMSIS/ST/STM32L4xx/stm32l475xx.h8
-rw-r--r--os/common/ext/CMSIS/ST/STM32L4xx/stm32l476xx.h8
-rw-r--r--os/common/ext/CMSIS/ST/STM32L4xx/stm32l485xx.h8
-rw-r--r--os/common/ext/CMSIS/ST/STM32L4xx/stm32l486xx.h8
8 files changed, 48 insertions, 16 deletions
diff --git a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l431xx.h b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l431xx.h
index ce9cfbdb6..f54c78b10 100644
--- a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l431xx.h
+++ b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l431xx.h
@@ -11425,8 +11425,12 @@ typedef struct
#define SDMMC_DCTRL_DBLOCKSIZE SDMMC_DCTRL_DBLOCKSIZE_Msk /*!<DBLOCKSIZE[3:0] bits (Data block size) */
#define SDMMC_DCTRL_DBLOCKSIZE_0 (0x1U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000010 */
#define SDMMC_DCTRL_DBLOCKSIZE_1 (0x2U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000020 */
-#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
-#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX START */
+//#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+//#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x8U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX END */
#define SDMMC_DCTRL_RWSTART_Pos (8U)
#define SDMMC_DCTRL_RWSTART_Msk (0x1U << SDMMC_DCTRL_RWSTART_Pos) /*!< 0x00000100 */
#define SDMMC_DCTRL_RWSTART SDMMC_DCTRL_RWSTART_Msk /*!<Read wait start */
diff --git a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l433xx.h b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l433xx.h
index ca630e642..a2dc1f047 100644
--- a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l433xx.h
+++ b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l433xx.h
@@ -11630,8 +11630,12 @@ typedef struct
#define SDMMC_DCTRL_DBLOCKSIZE SDMMC_DCTRL_DBLOCKSIZE_Msk /*!<DBLOCKSIZE[3:0] bits (Data block size) */
#define SDMMC_DCTRL_DBLOCKSIZE_0 (0x1U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000010 */
#define SDMMC_DCTRL_DBLOCKSIZE_1 (0x2U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000020 */
-#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
-#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX START */
+//#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+//#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x8U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX END */
#define SDMMC_DCTRL_RWSTART_Pos (8U)
#define SDMMC_DCTRL_RWSTART_Msk (0x1U << SDMMC_DCTRL_RWSTART_Pos) /*!< 0x00000100 */
#define SDMMC_DCTRL_RWSTART SDMMC_DCTRL_RWSTART_Msk /*!<Read wait start */
diff --git a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l443xx.h b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l443xx.h
index 964eed24e..cba76bf21 100644
--- a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l443xx.h
+++ b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l443xx.h
@@ -11855,8 +11855,12 @@ typedef struct
#define SDMMC_DCTRL_DBLOCKSIZE SDMMC_DCTRL_DBLOCKSIZE_Msk /*!<DBLOCKSIZE[3:0] bits (Data block size) */
#define SDMMC_DCTRL_DBLOCKSIZE_0 (0x1U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000010 */
#define SDMMC_DCTRL_DBLOCKSIZE_1 (0x2U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000020 */
-#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
-#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX START */
+//#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+//#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x8U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX END */
#define SDMMC_DCTRL_RWSTART_Pos (8U)
#define SDMMC_DCTRL_RWSTART_Msk (0x1U << SDMMC_DCTRL_RWSTART_Pos) /*!< 0x00000100 */
#define SDMMC_DCTRL_RWSTART SDMMC_DCTRL_RWSTART_Msk /*!<Read wait start */
diff --git a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l471xx.h b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l471xx.h
index 88638ae87..32c811288 100644
--- a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l471xx.h
+++ b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l471xx.h
@@ -12684,8 +12684,12 @@ typedef struct
#define SDMMC_DCTRL_DBLOCKSIZE SDMMC_DCTRL_DBLOCKSIZE_Msk /*!<DBLOCKSIZE[3:0] bits (Data block size) */
#define SDMMC_DCTRL_DBLOCKSIZE_0 (0x1U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000010 */
#define SDMMC_DCTRL_DBLOCKSIZE_1 (0x2U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000020 */
-#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
-#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX START */
+//#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+//#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x8U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX END */
#define SDMMC_DCTRL_RWSTART_Pos (8U)
#define SDMMC_DCTRL_RWSTART_Msk (0x1U << SDMMC_DCTRL_RWSTART_Pos) /*!< 0x00000100 */
#define SDMMC_DCTRL_RWSTART SDMMC_DCTRL_RWSTART_Msk /*!<Read wait start */
diff --git a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l475xx.h b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l475xx.h
index 4e1dd7767..9ffa2c1d6 100644
--- a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l475xx.h
+++ b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l475xx.h
@@ -12828,8 +12828,12 @@ typedef struct
#define SDMMC_DCTRL_DBLOCKSIZE SDMMC_DCTRL_DBLOCKSIZE_Msk /*!<DBLOCKSIZE[3:0] bits (Data block size) */
#define SDMMC_DCTRL_DBLOCKSIZE_0 (0x1U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000010 */
#define SDMMC_DCTRL_DBLOCKSIZE_1 (0x2U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000020 */
-#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
-#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX START */
+//#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+//#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x8U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX END */
#define SDMMC_DCTRL_RWSTART_Pos (8U)
#define SDMMC_DCTRL_RWSTART_Msk (0x1U << SDMMC_DCTRL_RWSTART_Pos) /*!< 0x00000100 */
#define SDMMC_DCTRL_RWSTART SDMMC_DCTRL_RWSTART_Msk /*!<Read wait start */
diff --git a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l476xx.h b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l476xx.h
index 84133d3a4..af8ef5c5e 100644
--- a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l476xx.h
+++ b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l476xx.h
@@ -12973,8 +12973,12 @@ typedef struct
#define SDMMC_DCTRL_DBLOCKSIZE SDMMC_DCTRL_DBLOCKSIZE_Msk /*!<DBLOCKSIZE[3:0] bits (Data block size) */
#define SDMMC_DCTRL_DBLOCKSIZE_0 (0x1U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000010 */
#define SDMMC_DCTRL_DBLOCKSIZE_1 (0x2U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000020 */
-#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
-#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX START */
+//#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+//#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x8U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX END */
#define SDMMC_DCTRL_RWSTART_Pos (8U)
#define SDMMC_DCTRL_RWSTART_Msk (0x1U << SDMMC_DCTRL_RWSTART_Pos) /*!< 0x00000100 */
#define SDMMC_DCTRL_RWSTART SDMMC_DCTRL_RWSTART_Msk /*!<Read wait start */
diff --git a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l485xx.h b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l485xx.h
index 7137950f3..d98f1fa4a 100644
--- a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l485xx.h
+++ b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l485xx.h
@@ -13053,8 +13053,12 @@ typedef struct
#define SDMMC_DCTRL_DBLOCKSIZE SDMMC_DCTRL_DBLOCKSIZE_Msk /*!<DBLOCKSIZE[3:0] bits (Data block size) */
#define SDMMC_DCTRL_DBLOCKSIZE_0 (0x1U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000010 */
#define SDMMC_DCTRL_DBLOCKSIZE_1 (0x2U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000020 */
-#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
-#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX START */
+//#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+//#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x8U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX END */
#define SDMMC_DCTRL_RWSTART_Pos (8U)
#define SDMMC_DCTRL_RWSTART_Msk (0x1U << SDMMC_DCTRL_RWSTART_Pos) /*!< 0x00000100 */
#define SDMMC_DCTRL_RWSTART SDMMC_DCTRL_RWSTART_Msk /*!<Read wait start */
diff --git a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l486xx.h b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l486xx.h
index 6501f31f0..81121f8b4 100644
--- a/os/common/ext/CMSIS/ST/STM32L4xx/stm32l486xx.h
+++ b/os/common/ext/CMSIS/ST/STM32L4xx/stm32l486xx.h
@@ -13198,8 +13198,12 @@ typedef struct
#define SDMMC_DCTRL_DBLOCKSIZE SDMMC_DCTRL_DBLOCKSIZE_Msk /*!<DBLOCKSIZE[3:0] bits (Data block size) */
#define SDMMC_DCTRL_DBLOCKSIZE_0 (0x1U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000010 */
#define SDMMC_DCTRL_DBLOCKSIZE_1 (0x2U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000020 */
-#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
-#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX START */
+//#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x3U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+//#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+#define SDMMC_DCTRL_DBLOCKSIZE_2 (0x4U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000040 */
+#define SDMMC_DCTRL_DBLOCKSIZE_3 (0x8U << SDMMC_DCTRL_DBLOCKSIZE_Pos) /*!< 0x00000080 */
+/* CHIBIOS FIX END */
#define SDMMC_DCTRL_RWSTART_Pos (8U)
#define SDMMC_DCTRL_RWSTART_Msk (0x1U << SDMMC_DCTRL_RWSTART_Pos) /*!< 0x00000100 */
#define SDMMC_DCTRL_RWSTART SDMMC_DCTRL_RWSTART_Msk /*!<Read wait start */
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-31 13:21:03 +0000