diff options
| -rw-r--r-- | demos/STM32/RT-STM32H743I-NUCLEO144/main.c | 4 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c | 11 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h | 4 | ||||
| -rw-r--r-- | testhal/STM32/STM32L4xx/GPT-ADC/main.c | 2 | ||||
| -rw-r--r-- | testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.c | 48 | ||||
| -rw-r--r-- | testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.h | 4 | ||||
| -rw-r--r-- | testhal/STM32/multi/ADC/main.c | 53 | 
7 files changed, 110 insertions, 16 deletions
| diff --git a/demos/STM32/RT-STM32H743I-NUCLEO144/main.c b/demos/STM32/RT-STM32H743I-NUCLEO144/main.c index 890322cac..9b7d49b83 100644 --- a/demos/STM32/RT-STM32H743I-NUCLEO144/main.c +++ b/demos/STM32/RT-STM32H743I-NUCLEO144/main.c @@ -29,9 +29,9 @@ static THD_FUNCTION(Thread1, arg) {    (void)arg;
    chRegSetThreadName("blinker");
    while (true) {
 -    palSetLine(LINE_ZIO_D33);
 +    palSetLine(LINE_LED1);
      chThdSleepMilliseconds(500);
 -    palClearLine(LINE_ZIO_D33);
 +    palClearLine(LINE_LED1);
      chThdSleepMilliseconds(500);
    }
  }
 diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c index 61d453c0b..b45aef900 100644 --- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c @@ -151,12 +151,18 @@ static void adc_lld_analog_off(ADCDriver *adcp) {   */
  static void adc_lld_calibrate(ADCDriver *adcp) {
 - osalDbgAssert(adcp->adcm->CR == ADC_CR_ADVREGEN, "invalid register state");
 +  osalDbgAssert(adcp->adcm->CR == ADC_CR_ADVREGEN, "invalid register state");
 +
 +  adcp->adcm->CR = adcp->config->calibration & (ADC_CR_ADCALDIF |
 +                                                ADC_CR_ADCALLIN);
    adcp->adcm->CR |= ADC_CR_ADCAL;
    while ((adcp->adcm->CR & ADC_CR_ADCAL) != 0U)
      ;
  #if STM32_ADC_DUAL_MODE
    osalDbgAssert(adcp->adcs->CR == ADC_CR_ADVREGEN, "invalid register state");
 +
 +  adcp->adcs->CR = adcp->config->calibration & (ADC_CR_ADCALDIF |
 +                                                ADC_CR_ADCALLIN);
    adcp->adcs->CR |= ADC_CR_ADCAL;
    while ((adcp->adcs->CR & ADC_CR_ADCAL) != 0U)
      ;
 @@ -175,6 +181,7 @@ static void adc_lld_stop_adc(ADCDriver *adcp) {      while (adcp->adcm->CR & ADC_CR_ADSTP)
        ;
    }
 +  adcp->adcm->PCSEL = 0U;
  }
  /**
 @@ -407,6 +414,7 @@ void adc_lld_start(ADCDriver *adcp) {                                         (void *)adcp);
        osalDbgAssert(adcp->data.dma != NULL, "unable to allocate stream");
        rccEnableADC12(true);
 +      dmaSetRequestSource(adcp->data.dma, STM32_DMAMUX1_ADC1);
      }
  #endif /* STM32_ADC_USE_ADC12 == TRUE */
 @@ -418,6 +426,7 @@ void adc_lld_start(ADCDriver *adcp) {                                           (void *)adcp);
        osalDbgAssert(adcp->data.bdma != NULL, "unable to allocate stream");
        rccEnableADC3(true);
 +      bdmaSetRequestSource(adcp->data.bdma, STM32_DMAMUX2_ADC3_REQ);
      }
  #endif /* STM32_ADC_USE_ADC3 == TRUE */
 diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h index e345bbcc3..ce5460f62 100644 --- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h +++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h @@ -482,7 +482,9 @@ typedef union {   */
  #define adc_lld_config_fields                                               \
    /* ADC DIFSEL register initialization data.*/                             \
 -  uint32_t                  difsel
 +  uint32_t                  difsel;                                         \
 +  /* Calibration mode, specify ADCCALIN and/or ADCCALDIF bits in here.*/    \
 +  uint32_t                  calibration
  #if (STM32_ADC_DUAL_MODE == TRUE) || defined(__DOXYGEN__)
  #define adc_lld_configuration_group_fields                                  \
 diff --git a/testhal/STM32/STM32L4xx/GPT-ADC/main.c b/testhal/STM32/STM32L4xx/GPT-ADC/main.c index b7d0875f8..648b1992f 100644 --- a/testhal/STM32/STM32L4xx/GPT-ADC/main.c +++ b/testhal/STM32/STM32L4xx/GPT-ADC/main.c @@ -78,7 +78,7 @@ static const ADCConversionGroup adcgrpcfg1 = {    adccallback,
    adcerrorcallback,
    ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(12),                 /* CFGR   */
 -  0,                                                                /* CFGR2   */
 +  0,                                                               /* CFGR2  */
    ADC_TR(0, 4095),                                                 /* TR1    */
    {                                                                /* SMPR[2]*/
      ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
 diff --git a/testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.c b/testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.c index 226f4ba11..2e16ae935 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.c +++ b/testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.c @@ -45,7 +45,8 @@ const GPTConfig portab_gptcfg1 = {  };
  const ADCConfig portab_adccfg1 = {
 -  .difsel       = 0U
 +  .difsel       = 0U,
 +  .calibration  = 0U
  };
  void adccallback(ADCDriver *adcp);
 @@ -56,17 +57,50 @@ void adccallback(ADCDriver *adcp);  void adcerrorcallback(ADCDriver *adcp, adcerror_t err);
  /*
 - * ADC conversion group.
 - * Mode:        Continuous, 16 samples of 2 channels, HW triggered by
 - *              GPT4-TRGO.
 - * Channels:    VRef, PA0.
 + * ADC conversion group 1.
 + * Mode:        One shot, 2 channels, SW triggered.
 + * Channels:    IN0, IN5.
   */
  const ADCConversionGroup portab_adcgrpcfg1 = {
 -  .circular     = true,
 +  .circular     = false,
    .num_channels = ADC_GRP1_NUM_CHANNELS,
 +  .end_cb       = NULL,
 +  .error_cb     = adcerrorcallback,
 +  .cfgr         = 0U,
 +  .cfgr2        = 0U,
 +  .ccr          = 0U,
 +  .pcsel        = ADC_SELMASK_IN0 | ADC_SELMASK_IN5,
 +  .ltr1         = 0x00000000U,
 +  .htr1         = 0x03FFFFFFU,
 +  .ltr2         = 0x00000000U,
 +  .htr2         = 0x03FFFFFFU,
 +  .ltr3         = 0x00000000U,
 +  .htr3         = 0x03FFFFFFU,
 +  .smpr         = {
 +    ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_384P5) |
 +    ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_384P5),
 +    0U
 +  },
 +  .sqr          = {
 +    ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
 +    0U,
 +    0U,
 +    0U
 +  }
 +};
 +
 +/*
 + * ADC conversion group 2.
 + * Mode:        Continuous, 2 channels, HW triggered by GPT4-TRGO.
 + * Channels:    IN0, IN5.
 + */
 +const ADCConversionGroup portab_adcgrpcfg2 = {
 +  .circular     = true,
 +  .num_channels = ADC_GRP2_NUM_CHANNELS,
    .end_cb       = adccallback,
    .error_cb     = adcerrorcallback,
 -  .cfgr         = ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(12),
 +  .cfgr         = ADC_CFGR_EXTEN_RISING |
 +                  ADC_CFGR_EXTSEL_SRC(12),  /* TIM4_TRGO */
    .cfgr2        = 0U,
    .ccr          = 0U,
    .pcsel        = ADC_SELMASK_IN0 | ADC_SELMASK_IN5,
 diff --git a/testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.h b/testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.h index 955d830f7..56ae995fa 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.h +++ b/testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/portab.h @@ -38,9 +38,11 @@  #define PORTAB_SD1                  SD2
 -#define PORTAB_DAC_TRIG             5
 +#define PORTAB_GPT1                 GPTD4
 +#define PORTAB_ADC1                 ADCD1
  #define ADC_GRP1_NUM_CHANNELS       2
 +#define ADC_GRP2_NUM_CHANNELS       2
  /*===========================================================================*/
  /* Module pre-compile time settings.                                         */
 diff --git a/testhal/STM32/multi/ADC/main.c b/testhal/STM32/multi/ADC/main.c index 19328dc26..68d5f3130 100644 --- a/testhal/STM32/multi/ADC/main.c +++ b/testhal/STM32/multi/ADC/main.c @@ -20,6 +20,44 @@  #include "portab.h"
  /*===========================================================================*/
 +/* ADC driver related.                                                       */
 +/*===========================================================================*/
 +
 +#define ADC_GRP1_BUF_DEPTH      1
 +#define ADC_GRP2_BUF_DEPTH      64
 +
 +adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
 +adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH];
 +
 +/*
 + * ADC streaming callback.
 + */
 +size_t nx = 0, ny = 0;
 +void adccallback(ADCDriver *adcp) {
 +
 +  (void)adcp;
 +
 +  /* Updating counters.*/
 +  if (adcIsBufferComplete(adcp)) {
 +    nx += 1;
 +  }
 +  else {
 +    ny += 1;
 +  }
 +}
 +
 +/*
 + * ADC errors callback, should never happen.
 + */
 +void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
 +
 +  (void)adcp;
 +  (void)err;
 +
 +  chSysHalt("it happened");
 +}
 +
 +/*===========================================================================*/
  /* Application code.                                                         */
  /*===========================================================================*/
 @@ -32,11 +70,10 @@ static THD_FUNCTION(Thread1, arg) {    (void)arg;
    chRegSetThreadName("blinker");
 -  palSetLineMode(LINE_ARD_D13, PAL_MODE_OUTPUT_PUSHPULL);
    while (true) {
 -    palSetLine(LINE_ARD_D13);
 +    palSetLine(LINE_LED1);
      chThdSleepMilliseconds(500);
 -    palClearLine(LINE_ARD_D13);
 +    palClearLine(LINE_LED1);
      chThdSleepMilliseconds(500);
    }
  }
 @@ -65,6 +102,16 @@ int main(void) {    chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
    /*
 +   * Activates the PORTAB_ADC1 driver and the temperature sensor.
 +   */
 +  adcStart(&PORTAB_ADC1, &portab_adccfg1);
 +  adcSTM32EnableVREF(&PORTAB_ADC1);
 +  adcSTM32EnableTS(&PORTAB_ADC1);
 +
 +  /* Performing a one-shot conversion on two channels.*/
 +  adcConvert(&PORTAB_ADC1, &portab_adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH);
 +
 +  /*
     * Normal main() thread activity, if the button is pressed then the
     * conversion is stopped.
     */
 | 
