From cf02c79b5aa7209542cbf1b0cefe703a2c0c60be Mon Sep 17 00:00:00 2001
From: awygle <awygle@gmail.com>
Date: Wed, 4 May 2016 23:47:33 -0700
Subject: Merge pull request #68 from awygle/msp430x

MSP430X DMA Support, EXP430FR6989 Demo + Makefile Updates
---
 demos/MSP430X/NIL-EXP430FR5969/Makefile            |  10 +-
 demos/MSP430X/NIL-EXP430FR5969/halconf.h           |   7 +
 demos/MSP430X/NIL-EXP430FR5969/msp_vectors.c       | 322 +++++++++++++++
 demos/MSP430X/NIL-EXP430FR6989/Makefile            | 208 ++++++++++
 demos/MSP430X/NIL-EXP430FR6989/chconf.h            | 274 +++++++++++++
 demos/MSP430X/NIL-EXP430FR6989/halconf.h           | 388 ++++++++++++++++++
 demos/MSP430X/NIL-EXP430FR6989/main.c              |  76 ++++
 demos/MSP430X/NIL-EXP430FR6989/mcuconf.h           |  55 +++
 demos/MSP430X/NIL-EXP430FR6989/msp_vectors.c       | 322 +++++++++++++++
 os/common/ports/MSP430X/chcore.c                   |   4 +-
 os/common/ports/MSP430X/compilers/GCC/chtypes.h    |  14 +-
 .../MSP430X/compilers/GCC/ld/msp430fr6989.ld       | 437 +++++++++++++++++++++
 os/hal/boards/EXP430FR5969/board.h                 |  16 +-
 os/hal/boards/EXP430FR6989/board.c                 |  52 +++
 os/hal/boards/EXP430FR6989/board.h                 | 217 ++++++++++
 os/hal/boards/EXP430FR6989/board.mk                |   5 +
 os/hal/ports/MSP430X/hal_dma_lld.c                 | 244 ++++++++++++
 os/hal/ports/MSP430X/hal_dma_lld.h                 | 174 ++++++++
 os/hal/ports/MSP430X/hal_pal_lld.c                 |  14 +
 os/hal/ports/MSP430X/hal_serial_lld.c              |   6 +-
 os/hal/ports/MSP430X/platform.mk                   |   3 +-
 testhal/MSP430X/EXP430FR5969/DMA/Makefile          | 207 ++++++++++
 testhal/MSP430X/EXP430FR5969/DMA/chconf.h          | 274 +++++++++++++
 testhal/MSP430X/EXP430FR5969/DMA/halconf.h         | 388 ++++++++++++++++++
 testhal/MSP430X/EXP430FR5969/DMA/main.c            | 287 ++++++++++++++
 testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h         |  55 +++
 testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c     | 316 +++++++++++++++
 27 files changed, 4356 insertions(+), 19 deletions(-)
 create mode 100644 demos/MSP430X/NIL-EXP430FR5969/msp_vectors.c
 create mode 100644 demos/MSP430X/NIL-EXP430FR6989/Makefile
 create mode 100644 demos/MSP430X/NIL-EXP430FR6989/chconf.h
 create mode 100644 demos/MSP430X/NIL-EXP430FR6989/halconf.h
 create mode 100644 demos/MSP430X/NIL-EXP430FR6989/main.c
 create mode 100644 demos/MSP430X/NIL-EXP430FR6989/mcuconf.h
 create mode 100644 demos/MSP430X/NIL-EXP430FR6989/msp_vectors.c
 create mode 100644 os/common/startup/MSP430X/compilers/GCC/ld/msp430fr6989.ld
 create mode 100644 os/hal/boards/EXP430FR6989/board.c
 create mode 100644 os/hal/boards/EXP430FR6989/board.h
 create mode 100644 os/hal/boards/EXP430FR6989/board.mk
 create mode 100644 os/hal/ports/MSP430X/hal_dma_lld.c
 create mode 100644 os/hal/ports/MSP430X/hal_dma_lld.h
 create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/Makefile
 create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/chconf.h
 create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/halconf.h
 create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/main.c
 create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h
 create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c

diff --git a/demos/MSP430X/NIL-EXP430FR5969/Makefile b/demos/MSP430X/NIL-EXP430FR5969/Makefile
index 2b7605a..f9a9627 100644
--- a/demos/MSP430X/NIL-EXP430FR5969/Makefile
+++ b/demos/MSP430X/NIL-EXP430FR5969/Makefile
@@ -6,14 +6,14 @@
 # Optimization level, can be [0, 1, 2, 3, s].
 #     0 = turn off optimization. s = optimize for size.
 #     (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
-OPTIMIZE = 1
+OPTIMIZE = 0
 
 # Debugging format.
 DEBUG = 
 #DEBUG = stabs
 
 # Memory/data model
-MODEL = large
+MODEL = small
 
 # Object files directory
 #     To put object files in current directory, use a dot (.), do NOT make
@@ -133,9 +133,11 @@ CSRC = $(STARTUPSRC) \
 CPPSRC =
 
 # List ASM source files here
-ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
+ASMSRC = 
+ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
 
-INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
+INCDIR = $(CHIBIOS)/os/license \
+				 $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
          $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
          $(CHIBIOS)/os/various
 
diff --git a/demos/MSP430X/NIL-EXP430FR5969/halconf.h b/demos/MSP430X/NIL-EXP430FR5969/halconf.h
index b15e689..578785c 100644
--- a/demos/MSP430X/NIL-EXP430FR5969/halconf.h
+++ b/demos/MSP430X/NIL-EXP430FR5969/halconf.h
@@ -37,6 +37,13 @@
 #define HAL_USE_PAL                 TRUE
 #endif
 
+/**
+ * @brief   Enables the DMA subsystem.
+ */
+#if !defined(HAL_USE_DMA) || defined(__DOXYGEN__)
+#define HAL_USE_DMA                 FALSE
+#endif
+
 /**
  * @brief   Enables the ADC subsystem.
  */
diff --git a/demos/MSP430X/NIL-EXP430FR5969/msp_vectors.c b/demos/MSP430X/NIL-EXP430FR5969/msp_vectors.c
new file mode 100644
index 0000000..ad2b367
--- /dev/null
+++ b/demos/MSP430X/NIL-EXP430FR5969/msp_vectors.c
@@ -0,0 +1,322 @@
+#include <msp430.h>
+
+__attribute__((interrupt(1)))
+void Vector1(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(2)))
+void Vector2(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(3)))
+void Vector3(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(4)))
+void Vector4(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(5)))
+void Vector5(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(6)))
+void Vector6(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(7)))
+void Vector7(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(8)))
+void Vector8(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(9)))
+void Vector9(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(10)))
+void Vector10(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(11)))
+void Vector11(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(12)))
+void Vector12(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(13)))
+void Vector13(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(14)))
+void Vector14(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(15)))
+void Vector15(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(16)))
+void Vector16(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(17)))
+void Vector17(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(18)))
+void Vector18(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(19)))
+void Vector19(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(20)))
+void Vector20(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(21)))
+void Vector21(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(22)))
+void Vector22(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(23)))
+void Vector23(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(24)))
+void Vector24(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(25)))
+void Vector25(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(26)))
+void Vector26(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(27)))
+void Vector27(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(28)))
+void Vector28(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(29)))
+void Vector29(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(30)))
+void Vector30(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(31)))
+void Vector31(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(32)))
+void Vector32(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(33)))
+void Vector33(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(34)))
+void Vector34(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(35)))
+void Vector35(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(36)))
+void Vector36(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(37)))
+void Vector37(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(38)))
+void Vector38(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(39)))
+void Vector39(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(40)))
+void Vector40(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(41)))
+void Vector41(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(42)))
+void Vector42(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(43)))
+void Vector43(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(44)))
+void Vector44(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(45)))
+void Vector45(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(46)))
+void Vector46(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(47)))
+void Vector47(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(48)))
+void Vector48(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(50)))
+void Vector50(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(51)))
+void Vector51(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(53)))
+void Vector53(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(54)))
+void Vector54(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(55)))
+void Vector55(void) {
+
+  while (1) {
+  }
+}
+
+
diff --git a/demos/MSP430X/NIL-EXP430FR6989/Makefile b/demos/MSP430X/NIL-EXP430FR6989/Makefile
new file mode 100644
index 0000000..fce3946
--- /dev/null
+++ b/demos/MSP430X/NIL-EXP430FR6989/Makefile
@@ -0,0 +1,208 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Optimization level, can be [0, 1, 2, 3, s].
+#     0 = turn off optimization. s = optimize for size.
+#     (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPTIMIZE = 0
+
+# Debugging format.
+DEBUG = 
+#DEBUG = stabs
+
+# Memory/data model
+MODEL = small
+
+# Object files directory
+#     To put object files in current directory, use a dot (.), do NOT make
+#     this an empty or blank macro!
+OBJDIR = .
+
+# Compiler flag to set the C Standard level.
+#     c89   = "ANSI" C
+#     gnu89 = c89 plus GCC extensions
+#     c99   = ISO C99 standard (not yet fully implemented)
+#     gnu99 = c99 plus GCC extensions
+CSTANDARD = -std=gnu11
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O$(OPTIMIZE) -g$(DEBUG) 
+  USE_OPT += -fsigned-char -fshort-enums 
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+  USE_COPT = 
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+  USE_LDOPT = 
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+  USE_LTO = no
+endif
+
+# Enable the selected hardware multiplier
+ifeq ($(USE_HWMULT),)
+  USE_HWMULT = f5series
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+  USE_VERBOSE_COMPILE = yes
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+  USE_SMART_BUILD = yes
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the idle thread stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_IDLE_STACKSIZE),)
+  USE_IDLE_STACKSIZE = 0xC00
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = nil
+
+# Imported source files and paths
+CHIBIOS = ../../../../ChibiOS-RT
+CHIBIOS_CONTRIB = ../../..
+# Startup files.
+include $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk
+# HAL-OSAL files (optional).
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS_CONTRIB)/os/hal/boards/EXP430FR6989/board.mk
+include $(CHIBIOS_CONTRIB)/os/hal/ports/MSP430X/platform.mk
+include $(CHIBIOS)/os/hal/osal/nil/osal.mk
+# RTOS files (optional).
+include $(CHIBIOS)/os/nil/nil.mk
+include $(CHIBIOS_CONTRIB)/os/common/ports/MSP430X/compilers/GCC/mk/port.mk
+# Other files (optional).
+include $(CHIBIOS)/test/nil/test.mk
+
+# Define linker script file here
+LDSCRIPT = $(STARTUPLD)/msp430fr6989.ld
+
+# C sources 
+CSRC = $(STARTUPSRC) \
+       $(KERNSRC) \
+       $(PORTSRC) \
+       $(OSALSRC) \
+       $(HALSRC) \
+       $(PLATFORMSRC) \
+       $(BOARDSRC) \
+       $(TESTSRC) \
+			 msp_vectors.c \
+       main.c
+
+# C++ sources 
+CPPSRC =
+
+# List ASM source files here
+ASMSRC = 
+ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
+
+INCDIR = $(CHIBIOS)/os/license \
+				 $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
+         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
+         $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = msp430fr6989
+
+TRGT = msp430-elf-
+CC   = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+#       runtime support makes code size explode.
+LD   = $(TRGT)gcc
+#LD   = $(TRGT)g++
+CP   = $(TRGT)objcopy
+AS   = $(TRGT)gcc -x assembler-with-cpp
+AR   = $(TRGT)ar
+OD   = $(TRGT)objdump
+SZ   = $(TRGT)size
+HEX  = $(CP) -O ihex
+BIN  = $(CP) -O binary
+
+# MSP430-specific options here
+MOPT = -m$(MODEL)
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra -Wundef
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC
+include $(RULESPATH)/rules.mk
diff --git a/demos/MSP430X/NIL-EXP430FR6989/chconf.h b/demos/MSP430X/NIL-EXP430FR6989/chconf.h
new file mode 100644
index 0000000..bf2ad1b
--- /dev/null
+++ b/demos/MSP430X/NIL-EXP430FR6989/chconf.h
@@ -0,0 +1,274 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    nilconf.h
+ * @brief   Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ *          contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#define _CHIBIOS_NIL_CONF_
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Number of user threads in the application.
+ * @note    This number is not inclusive of the idle thread which is
+ *          Implicitly handled.
+ */
+#define CH_CFG_NUM_THREADS                 2
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name System timer settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System time counter resolution.
+ * @note    Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION               16
+
+/**
+ * @brief   System tick frequency.
+ * @note    This value together with the @p CH_CFG_ST_RESOLUTION
+ *          option defines the maximum amount of time allowed for
+ *          timeouts.
+ */
+#define CH_CFG_ST_FREQUENCY                1000
+
+/**
+ * @brief   Time delta constant for the tick-less mode.
+ * @note    If this value is zero then the system uses the classic
+ *          periodic tick. This value represents the minimum number
+ *          of ticks that is safe to specify in a timeout directive.
+ *          The value one is not valid, timeouts are rounded up to
+ *          this value.
+ */
+#define CH_CFG_ST_TIMEDELTA                0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES               TRUE
+
+/**
+ * @brief   Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note    Feature not currently implemented.
+ * @note    The default is @p FALSE.
+ */
+#define CH_CFG_USE_MUTEXES                  FALSE
+
+/**
+ * @brief   Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS                   TRUE
+
+/**
+ * @brief   Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ *          included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES                TRUE
+
+/**
+ * @brief   Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE                  TRUE
+
+/**
+ * @brief   Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_HEAP                     TRUE
+
+/**
+ * @brief   Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS                 TRUE
+
+/**
+ * @brief   Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ *          then the whole available RAM is used. The core memory is made
+ *          available to the heap allocator and/or can be used directly through
+ *          the simplified core memory allocator.
+ *
+ * @note    In order to let the OS manage the whole RAM the linker script must
+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note    Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE                 0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Debug option, kernel statistics.
+ *
+ * @note    Feature not currently implemented.
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_STATISTICS                   FALSE
+
+/**
+ * @brief   Debug option, system state check.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_SYSTEM_STATE_CHECK           FALSE
+
+/**
+ * @brief   Debug option, parameters checks.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_CHECKS                FALSE
+
+/**
+ * @brief   System assertions.
+ * 
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_ASSERTS              FALSE
+
+/**
+ * @brief   Stack check.
+ * 
+ *@note     The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_STACK_CHECK          TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System initialization hook.
+ */
+#if !defined(CH_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__)
+#define CH_CFG_SYSTEM_INIT_HOOK() {                                        \
+}
+#endif
+
+/**
+ * @brief   Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXT_FIELDS                                           \
+  /* Add threads custom fields here.*/
+
+/**
+ * @brief   Threads initialization hook.
+ */
+#define CH_CFG_THREAD_EXT_INIT_HOOK(tr) {                                  \
+  /* Add custom threads initialization code here.*/                         \
+}
+
+/**
+ * @brief   Idle thread enter hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() {                                         \
+}
+
+/**
+ * @brief   Idle thread leave hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() {                                         \
+}
+
+/**
+ * @brief   System halt hook.
+ */
+#if !defined(CH_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                  \
+}
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in nilcore.h).   */
+/*===========================================================================*/
+
+#endif  /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/MSP430X/NIL-EXP430FR6989/halconf.h b/demos/MSP430X/NIL-EXP430FR6989/halconf.h
new file mode 100644
index 0000000..578785c
--- /dev/null
+++ b/demos/MSP430X/NIL-EXP430FR6989/halconf.h
@@ -0,0 +1,388 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    templates/halconf.h
+ * @brief   HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ *          various device drivers from your application. You may also use
+ *          this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef HALCONF_H
+#define HALCONF_H
+
+#include "mcuconf.h"
+
+/**
+ * @brief   Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL                 TRUE
+#endif
+
+/**
+ * @brief   Enables the DMA subsystem.
+ */
+#if !defined(HAL_USE_DMA) || defined(__DOXYGEN__)
+#define HAL_USE_DMA                 FALSE
+#endif
+
+/**
+ * @brief   Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN                 FALSE
+#endif
+
+/**
+ * @brief   Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S                 FALSE
+#endif
+
+/**
+ * @brief   Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI             FALSE
+#endif
+
+/**
+ * @brief   Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM                 FALSE
+#endif
+
+/**
+ * @brief   Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL              TRUE
+#endif
+
+/**
+ * @brief   Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB          FALSE
+#endif
+
+/**
+ * @brief   Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI                 FALSE
+#endif
+
+/**
+ * @brief   Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART                FALSE
+#endif
+
+/**
+ * @brief   Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB                 FALSE
+#endif
+
+/**
+ * @brief   Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG                 FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT                FALSE
+#endif
+
+/**
+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE          FALSE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY           FALSE
+#endif
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS              FALSE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings.                                          */
+/*===========================================================================*/
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ *          This option is recommended also if the SPI driver does not
+ *          use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Number of initialization attempts before rejecting the card.
+ * @note    Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY              100
+#endif
+
+/**
+ * @brief   Include support for MMC cards.
+ * @note    MMC support is not yet implemented so this option must be kept
+ *          at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT             FALSE
+#endif
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings.                                           */
+/*===========================================================================*/
+
+/**
+ * @brief   Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ *          default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE      38400
+#endif
+
+/**
+ * @brief   Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ *          buffers depending on the requirements of your application.
+ * @note    The default is 16 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE         16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting.                                        */
+/*===========================================================================*/
+
+/**
+ * @brief   Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ *          the USB data endpoint maximum packet size.
+ * @note    The default is 256 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE     256
+#endif
+
+/**
+ * @brief   Serial over USB number of buffers.
+ * @note    The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER   2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT                FALSE
+#endif
+
+/**
+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings.                                             */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT               FALSE
+#endif
+
+/**
+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION   FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT                FALSE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/demos/MSP430X/NIL-EXP430FR6989/main.c b/demos/MSP430X/NIL-EXP430FR6989/main.c
new file mode 100644
index 0000000..6789cfe
--- /dev/null
+++ b/demos/MSP430X/NIL-EXP430FR6989/main.c
@@ -0,0 +1,76 @@
+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#include "hal.h"
+#include "ch.h"
+#include "ch_test.h"
+#include "test_root.h"
+
+/*
+ * Thread 2.
+ */
+THD_WORKING_AREA(waThread2, 2048);
+THD_FUNCTION(Thread2, arg) {
+
+  (void)arg;
+
+  /*
+   * Activate the serial driver 0 using the driver default configuration.
+   */
+  sdStart(&SD1, NULL);
+
+  while (chnGetTimeout(&SD1, TIME_INFINITE)) {
+    chnWrite(&SD1, (const uint8_t *)"Hello World!\r\n", 14);
+    test_execute((void*)&SD1);
+    chThdSleepMilliseconds(2000);
+  }
+}
+
+/*
+ * Threads static table, one entry per thread. The number of entries must
+ * match NIL_CFG_NUM_THREADS.
+ */
+THD_TABLE_BEGIN
+  THD_TABLE_ENTRY(wa_test_support, "test_support", test_support, 
+      (void *)&nil.threads[1])
+  THD_TABLE_ENTRY(waThread2, "hello", Thread2, NULL)
+THD_TABLE_END
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+  /*
+   * System initializations.
+   * - HAL initialization, this also initializes the configured device drivers
+   *   and performs the board-specific initializations.
+   * - Kernel initialization, the main() function becomes a thread and the
+   *   RTOS is active.
+   */
+  WDTCTL = WDTPW | WDTHOLD;
+  
+
+  halInit();
+  chSysInit();
+  
+  /* This is now the idle thread loop, you may perform here a low priority
+     task but you must never try to sleep or wait in this loop. Note that
+     this tasks runs at the lowest priority level so any instruction added
+     here will be executed after all other tasks have been started.*/
+  while (true) {
+  }
+}
diff --git a/demos/MSP430X/NIL-EXP430FR6989/mcuconf.h b/demos/MSP430X/NIL-EXP430FR6989/mcuconf.h
new file mode 100644
index 0000000..4f89f4e
--- /dev/null
+++ b/demos/MSP430X/NIL-EXP430FR6989/mcuconf.h
@@ -0,0 +1,55 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+/*
+ * MSP430X drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the driver
+ * is enabled in halconf.h.
+ * 
+ */
+
+#define MSP430X_MCUCONF
+
+/* HAL driver system settings */
+#define MSP430X_ACLK_SRC MSP430X_VLOCLK
+#define MSP430X_LFXTCLK_FREQ 0
+#define MSP430X_HFXTCLK_FREQ 0
+#define MSP430X_DCOCLK_FREQ 8000000
+#define MSP430X_MCLK_DIV 1
+#define MSP430X_SMCLK_DIV 32
+
+/*
+ * SERIAL driver system settings.
+ */
+#define MSP430X_SERIAL_USE_USART0         FALSE
+#define MSP430X_SERIAL_USE_USART1         TRUE
+#define MSP430X_USART1_CLK_SRC            MSP430X_SMCLK_SRC
+#define MSP430X_SERIAL_USE_USART2         FALSE
+#define MSP430X_SERIAL_USE_USART3         FALSE
+
+/*
+ * ST driver system settings.
+ */
+#define MSP430X_ST_CLK_SRC MSP430X_SMCLK_SRC
+#define MSP430X_ST_TIMER_TYPE B
+#define MSP430X_ST_TIMER_INDEX 0
+
+#endif /* _MCUCONF_H_ */
diff --git a/demos/MSP430X/NIL-EXP430FR6989/msp_vectors.c b/demos/MSP430X/NIL-EXP430FR6989/msp_vectors.c
new file mode 100644
index 0000000..daaf9b2
--- /dev/null
+++ b/demos/MSP430X/NIL-EXP430FR6989/msp_vectors.c
@@ -0,0 +1,322 @@
+#include <msp430.h>
+
+__attribute__((interrupt(1)))
+void Vector1(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(2)))
+void Vector2(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(3)))
+void Vector3(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(4)))
+void Vector4(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(5)))
+void Vector5(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(6)))
+void Vector6(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(7)))
+void Vector7(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(8)))
+void Vector8(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(9)))
+void Vector9(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(10)))
+void Vector10(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(11)))
+void Vector11(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(12)))
+void Vector12(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(13)))
+void Vector13(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(14)))
+void Vector14(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(15)))
+void Vector15(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(16)))
+void Vector16(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(17)))
+void Vector17(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(18)))
+void Vector18(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(19)))
+void Vector19(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(20)))
+void Vector20(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(21)))
+void Vector21(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(22)))
+void Vector22(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(23)))
+void Vector23(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(24)))
+void Vector24(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(25)))
+void Vector25(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(26)))
+void Vector26(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(27)))
+void Vector27(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(28)))
+void Vector28(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(29)))
+void Vector29(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(30)))
+void Vector30(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(31)))
+void Vector31(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(32)))
+void Vector32(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(33)))
+void Vector33(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(34)))
+void Vector34(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(35)))
+void Vector35(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(36)))
+void Vector36(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(37)))
+void Vector37(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(38)))
+void Vector38(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(39)))
+void Vector39(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(40)))
+void Vector40(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(41)))
+void Vector41(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(42)))
+void Vector42(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(44)))
+void Vector44(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(45)))
+void Vector45(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(46)))
+void Vector46(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(47)))
+void Vector47(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(48)))
+void Vector48(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(49)))
+void Vector49(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(50)))
+void Vector50(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(51)))
+void Vector51(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(53)))
+void Vector53(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(54)))
+void Vector54(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(55)))
+void Vector55(void) {
+
+  while (1) {
+  }
+}
+
+
diff --git a/os/common/ports/MSP430X/chcore.c b/os/common/ports/MSP430X/chcore.c
index 4e09b8f..7a8d7f2 100644
--- a/os/common/ports/MSP430X/chcore.c
+++ b/os/common/ports/MSP430X/chcore.c
@@ -58,11 +58,11 @@
  * @param[in] ntp       the thread to be switched in
  * @param[in] otp       the thread to be switched out
  */
-#if !defined(__DOXYGEN__) && defined(__OPTIMIZE__)
+#if !(__GNUC__ < 6 && __GNUC_MINOR__ < 4) || defined(__OPTIMIZE__)
 __attribute__((naked))
 #endif
 void _port_switch(thread_t *ntp, thread_t *otp) {
-#if !defined(__OPTIMIZE__)
+#if (__GNUC__ < 6 && __GNUC_MINOR__ < 4) && !defined(__OPTIMIZE__)
   asm volatile ("add #4, r1");
 #endif
   (void)(ntp);
diff --git a/os/common/ports/MSP430X/compilers/GCC/chtypes.h b/os/common/ports/MSP430X/compilers/GCC/chtypes.h
index 11cc980..46a074c 100644
--- a/os/common/ports/MSP430X/compilers/GCC/chtypes.h
+++ b/os/common/ports/MSP430X/compilers/GCC/chtypes.h
@@ -94,6 +94,18 @@ typedef uint16_t            ucnt_t;         /**< Generic unsigned counter.  */
  */
 #define ALIGNED_VAR(n) __attribute__((aligned(n)))
 
-#endif /* _NILTYPES_H_ */
+/**
+ * @brief   Size of a pointer.
+ * @note    To be used where the sizeof operator cannot be used, preprocessor
+ *          expressions for example.
+ */
+#define SIZEOF_PTR          4
+
+/**
+ * @brief   True if alignment is low-high in current architecture.
+ */
+#define REVERSE_ORDER       1
+
+#endif /* CHTYPES_H */
 
 /** @} */
diff --git a/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr6989.ld b/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr6989.ld
new file mode 100644
index 0000000..b3cd9ce
--- /dev/null
+++ b/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr6989.ld
@@ -0,0 +1,437 @@
+/* This file supports MSP430FR6989 devices. */
+/* Version: 1.188 */
+/* ChibiOS linker script, for normal executables */
+
+OUTPUT_ARCH(msp430)
+ENTRY(_start)
+
+MEMORY {
+  TINYRAM          : ORIGIN = 0x0006, LENGTH = 0x001A
+  BSL              : ORIGIN = 0x1000, LENGTH = 0x0800
+  RAM              : ORIGIN = 0x1C00, LENGTH = 0x0800 /* END=0x23FF, size 2048 */
+  INFOMEM          : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */
+  INFOA            : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */
+  INFOB            : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */
+  INFOC            : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */
+  INFOD            : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */
+  FRAM (rxw)       : ORIGIN = 0x4400, LENGTH = 0xBB80 /* END=0xFF7F, size 48000 */
+  HIFRAM (rxw)     : ORIGIN = 0x00010000, LENGTH = 0x00013FFF
+  VECT1            : ORIGIN = 0xFF90, LENGTH = 0x0002
+  VECT2            : ORIGIN = 0xFF92, LENGTH = 0x0002
+  VECT3            : ORIGIN = 0xFF94, LENGTH = 0x0002
+  VECT4            : ORIGIN = 0xFF96, LENGTH = 0x0002
+  VECT5            : ORIGIN = 0xFF98, LENGTH = 0x0002
+  VECT6            : ORIGIN = 0xFF9A, LENGTH = 0x0002
+  VECT7            : ORIGIN = 0xFF9C, LENGTH = 0x0002
+  VECT8            : ORIGIN = 0xFF9E, LENGTH = 0x0002
+  VECT9            : ORIGIN = 0xFFA0, LENGTH = 0x0002
+  VECT10           : ORIGIN = 0xFFA2, LENGTH = 0x0002
+  VECT11           : ORIGIN = 0xFFA4, LENGTH = 0x0002
+  VECT12           : ORIGIN = 0xFFA6, LENGTH = 0x0002
+  VECT13           : ORIGIN = 0xFFA8, LENGTH = 0x0002
+  VECT14           : ORIGIN = 0xFFAA, LENGTH = 0x0002
+  VECT15           : ORIGIN = 0xFFAC, LENGTH = 0x0002
+  VECT16           : ORIGIN = 0xFFAE, LENGTH = 0x0002
+  VECT17           : ORIGIN = 0xFFB0, LENGTH = 0x0002
+  VECT18           : ORIGIN = 0xFFB2, LENGTH = 0x0002
+  VECT19           : ORIGIN = 0xFFB4, LENGTH = 0x0002
+  VECT20           : ORIGIN = 0xFFB6, LENGTH = 0x0002
+  VECT21           : ORIGIN = 0xFFB8, LENGTH = 0x0002
+  VECT22           : ORIGIN = 0xFFBA, LENGTH = 0x0002
+  VECT23           : ORIGIN = 0xFFBC, LENGTH = 0x0002
+  VECT24           : ORIGIN = 0xFFBE, LENGTH = 0x0002
+  VECT25           : ORIGIN = 0xFFC0, LENGTH = 0x0002
+  VECT26           : ORIGIN = 0xFFC2, LENGTH = 0x0002
+  VECT27           : ORIGIN = 0xFFC4, LENGTH = 0x0002
+  VECT28           : ORIGIN = 0xFFC6, LENGTH = 0x0002
+  VECT29           : ORIGIN = 0xFFC8, LENGTH = 0x0002
+  VECT30           : ORIGIN = 0xFFCA, LENGTH = 0x0002
+  VECT31           : ORIGIN = 0xFFCC, LENGTH = 0x0002
+  VECT32           : ORIGIN = 0xFFCE, LENGTH = 0x0002
+  VECT33           : ORIGIN = 0xFFD0, LENGTH = 0x0002
+  VECT34           : ORIGIN = 0xFFD2, LENGTH = 0x0002
+  VECT35           : ORIGIN = 0xFFD4, LENGTH = 0x0002
+  VECT36           : ORIGIN = 0xFFD6, LENGTH = 0x0002
+  VECT37           : ORIGIN = 0xFFD8, LENGTH = 0x0002
+  VECT38           : ORIGIN = 0xFFDA, LENGTH = 0x0002
+  VECT39           : ORIGIN = 0xFFDC, LENGTH = 0x0002
+  VECT40           : ORIGIN = 0xFFDE, LENGTH = 0x0002
+  VECT41           : ORIGIN = 0xFFE0, LENGTH = 0x0002
+  VECT42           : ORIGIN = 0xFFE2, LENGTH = 0x0002
+  VECT43           : ORIGIN = 0xFFE4, LENGTH = 0x0002
+  VECT44           : ORIGIN = 0xFFE6, LENGTH = 0x0002
+  VECT45           : ORIGIN = 0xFFE8, LENGTH = 0x0002
+  VECT46           : ORIGIN = 0xFFEA, LENGTH = 0x0002
+  VECT47           : ORIGIN = 0xFFEC, LENGTH = 0x0002
+  VECT48           : ORIGIN = 0xFFEE, LENGTH = 0x0002
+  VECT49           : ORIGIN = 0xFFF0, LENGTH = 0x0002
+  VECT50           : ORIGIN = 0xFFF2, LENGTH = 0x0002
+  VECT51           : ORIGIN = 0xFFF4, LENGTH = 0x0002
+  VECT52           : ORIGIN = 0xFFF6, LENGTH = 0x0002
+  VECT53           : ORIGIN = 0xFFF8, LENGTH = 0x0002
+  VECT54           : ORIGIN = 0xFFFA, LENGTH = 0x0002
+  VECT55           : ORIGIN = 0xFFFC, LENGTH = 0x0002
+  RESETVEC         : ORIGIN = 0xFFFE, LENGTH = 0x0002
+}
+
+PHDRS {
+  vectors PT_LOAD ;
+  stack PT_LOAD ;
+  rodata PT_LOAD ;
+  data PT_LOAD ;
+  text PT_LOAD ;
+  upper_rodata PT_LOAD ;
+  upper_data PT_LOAD ;
+  upper_text PT_LOAD ;
+}
+
+SECTIONS
+{
+  __interrupt_vector_1   : { KEEP (*(__interrupt_vector_1 )) } > VECT1 :vectors
+  __interrupt_vector_2   : { KEEP (*(__interrupt_vector_2 )) } > VECT2
+  __interrupt_vector_3   : { KEEP (*(__interrupt_vector_3 )) } > VECT3
+  __interrupt_vector_4   : { KEEP (*(__interrupt_vector_4 )) } > VECT4
+  __interrupt_vector_5   : { KEEP (*(__interrupt_vector_5 )) } > VECT5
+  __interrupt_vector_6   : { KEEP (*(__interrupt_vector_6 )) } > VECT6
+  __interrupt_vector_7   : { KEEP (*(__interrupt_vector_7 )) } > VECT7
+  __interrupt_vector_8   : { KEEP (*(__interrupt_vector_8 )) } > VECT8
+  __interrupt_vector_9   : { KEEP (*(__interrupt_vector_9 )) } > VECT9
+  __interrupt_vector_10  : { KEEP (*(__interrupt_vector_10)) } > VECT10
+  __interrupt_vector_11  : { KEEP (*(__interrupt_vector_11)) } > VECT11
+  __interrupt_vector_12  : { KEEP (*(__interrupt_vector_12)) } > VECT12
+  __interrupt_vector_13  : { KEEP (*(__interrupt_vector_13)) } > VECT13
+  __interrupt_vector_14  : { KEEP (*(__interrupt_vector_14)) } > VECT14
+  __interrupt_vector_15  : { KEEP (*(__interrupt_vector_15)) } > VECT15
+  __interrupt_vector_16  : { KEEP (*(__interrupt_vector_16)) } > VECT16
+  __interrupt_vector_17  : { KEEP (*(__interrupt_vector_17)) } > VECT17
+  __interrupt_vector_18  : { KEEP (*(__interrupt_vector_18)) } > VECT18
+  __interrupt_vector_19  : { KEEP (*(__interrupt_vector_19)) } > VECT19
+  __interrupt_vector_20  : { KEEP (*(__interrupt_vector_20)) } > VECT20
+  __interrupt_vector_21  : { KEEP (*(__interrupt_vector_21)) } > VECT21
+  __interrupt_vector_22  : { KEEP (*(__interrupt_vector_22)) } > VECT22
+  __interrupt_vector_23  : { KEEP (*(__interrupt_vector_23)) } > VECT23
+  __interrupt_vector_24  : { KEEP (*(__interrupt_vector_24)) } > VECT24
+  __interrupt_vector_25  : { KEEP (*(__interrupt_vector_25)) } > VECT25
+  __interrupt_vector_26  : { KEEP (*(__interrupt_vector_26)) } > VECT26
+  __interrupt_vector_27  : { KEEP (*(__interrupt_vector_27)) } > VECT27
+  __interrupt_vector_28  : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_aes256)) } > VECT28
+  __interrupt_vector_29  : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_rtc)) } > VECT29
+  __interrupt_vector_30  : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_lcd_c)) } > VECT30
+  __interrupt_vector_31  : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_port4)) } > VECT31
+  __interrupt_vector_32  : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_port3)) } > VECT32
+  __interrupt_vector_33  : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT33
+  __interrupt_vector_34  : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT34
+  __interrupt_vector_35  : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_port2)) } > VECT35
+  __interrupt_vector_36  : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT36
+  __interrupt_vector_37  : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT37
+  __interrupt_vector_38  : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_port1)) } > VECT38
+  __interrupt_vector_39  : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT39
+  __interrupt_vector_40  : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT40
+  __interrupt_vector_41  : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_dma)) } > VECT41
+  __interrupt_vector_42  : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_usci_b1)) } > VECT42
+  __interrupt_vector_43  : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_usci_a1)) } > VECT43
+  __interrupt_vector_44  : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT44
+  __interrupt_vector_45  : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT45
+  __interrupt_vector_46  : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_adc12)) } > VECT46
+  __interrupt_vector_47  : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_usci_b0)) } > VECT47
+  __interrupt_vector_48  : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_usci_a0)) } > VECT48
+  __interrupt_vector_49  : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_escan_if)) } > VECT49
+  __interrupt_vector_50  : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_wdt)) } > VECT50
+  __interrupt_vector_51  : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT51
+  __interrupt_vector_52  : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT52
+  __interrupt_vector_53  : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_comp_e)) } > VECT53
+  __interrupt_vector_54  : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_unmi)) } > VECT54
+  __interrupt_vector_55  : { KEEP (*(__interrupt_vector_55)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT55
+  __reset_vector :
+  {
+    KEEP (*(__interrupt_vector_56))
+    KEEP (*(__interrupt_vector_reset))
+    KEEP (*(.resetvec))
+  } > RESETVEC
+
+  .stack :
+  {
+    __main_thread_stack_base__ = .;
+    *(.stack)
+    . += __idle_stack_size__;
+    PROVIDE (__stack = .);
+    . = ALIGN(2);
+    __main_thread_stack_end__ = .;
+  } > FRAM :stack
+
+  .rodata :
+  {
+    . = ALIGN(2);
+    *(.plt)
+    *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
+    *(.rodata1)
+    *(.lower.rodata.* .lower.rodata)
+    KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
+    PROVIDE (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE (__preinit_array_end = .);
+    PROVIDE (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array))
+    PROVIDE (__init_array_end = .);
+    PROVIDE (__fini_array_start = .);
+    KEEP (*(.fini_array))
+    KEEP (*(SORT(.fini_array.*)))
+    PROVIDE (__fini_array_end = .);
+  } > FRAM :rodata
+
+  /* Note: This is a separate .rodata section for sections which are
+     read only but which older linkers treat as read-write.
+     This prevents older linkers from marking the entire .rodata
+     section as read-write.  */
+  .rodata2 : 
+  {
+    . = ALIGN(2);
+    *(.eh_frame_hdr)
+    KEEP (*(.eh_frame))
+
+    /* gcc uses crtbegin.o to find the start of the constructors, so
+       we make sure it is first.  Because this is a wildcard, it
+       doesn't matter if the user does not actually link against
+       crtbegin.o; the linker won't look for a file to match a
+       wildcard.  The wildcard also means that it doesn't matter which
+       directory crtbegin.o is in.  */
+    KEEP (*crtbegin*.o(.ctors))
+
+    /* We don't want to include the .ctor section from from the
+       crtend.o file until after the sorted ctors.  The .ctor section
+       from the crtend file contains the end of ctors marker and it
+       must be last */
+    KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+
+    KEEP (*crtbegin*.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+  } > FRAM
+
+  .data :
+  {
+    . = ALIGN(2);
+    PROVIDE (__datastart = .);
+
+    KEEP (*(.jcr))
+    *(.data.rel.ro.local) *(.data.rel.ro*)
+    *(.dynamic)
+
+    *(.data .data.* .gnu.linkonce.d.*)
+    KEEP (*(.gnu.linkonce.d.*personality*))
+    SORT(CONSTRUCTORS)
+    *(.data1)
+    *(.got.plt) *(.got)
+
+    /* We want the small data sections together, so single-instruction offsets
+       can access them all, and initialized data all before uninitialized, so
+       we can shorten the on-disk segment size.  */
+    . = ALIGN(2);
+    *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
+
+    . = ALIGN(2);
+    *(.lower.data.* .lower.data)
+    . = ALIGN(2);
+
+    _edata = .;
+    PROVIDE (edata = .);
+    PROVIDE (__dataend = .);
+  } > FRAM :data
+
+  /* Note that crt0 assumes this is a multiple of two; all the
+     start/stop symbols are also assumed word-aligned.  */
+  PROVIDE(__romdatastart = LOADADDR(.data));
+  PROVIDE (__romdatacopysize = SIZEOF(.data));
+
+  .bss :
+  {
+    . = ALIGN(2);
+    PROVIDE (__bssstart = .);
+    *(.dynbss)
+    *(.sbss .sbss.*)
+    *(.bss .bss.* .gnu.linkonce.b.*)
+    *(.lower.bss.* .lower.bss)
+    . = ALIGN(2);
+    *(COMMON)
+    PROVIDE (__bssend = .);
+  } > FRAM
+  PROVIDE (__bsssize = SIZEOF(.bss));
+
+  /* This section contains data that is not initialised during load
+     or application reset.  */
+  .noinit (NOLOAD) :
+  {
+    . = ALIGN(2);
+    PROVIDE (__noinit_start = .);
+    *(.noinit)
+    . = ALIGN(2);
+    PROVIDE (__noinit_end = .);
+  } > FRAM :text
+
+  _end = .;
+  PROVIDE (end = .);
+
+  .text :
+  {
+    PROVIDE (_start = .);
+
+    . = ALIGN(2);
+    KEEP (*(SORT(.crt_*)))
+
+    . = ALIGN(2);
+    KEEP (*(.lowtext))
+
+    . = ALIGN(2);
+    *(.lower.text.* .lower.text)
+
+    . = ALIGN(2);
+    *(.text .stub .text.* .gnu.linkonce.t.* .text:*)
+
+    KEEP (*(.text.*personality*))
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+    *(.interp .hash .dynsym .dynstr .gnu.version*)
+    PROVIDE (__etext = .);
+    PROVIDE (_etext = .);
+    PROVIDE (etext = .);
+    . = ALIGN(2);
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    KEEP (*(.tm_clone_table))
+  } > FRAM
+
+  .upper.rodata :
+  {
+    *(.upper.rodata.* .upper.rodata)
+  } > HIFRAM :upper_rodata
+
+  /* This section contains data that is initialised during load
+     but not on application reset.  */  
+  .persistent :
+  {
+    . = ALIGN(2);
+    PROVIDE (__persistent_start = .);
+    *(.persistent)
+    . = ALIGN(2);
+    PROVIDE (__persistent_end = .);
+  } > HIFRAM :upper_data
+
+  .upper.data :
+  {
+    __upper_data_init = LOADADDR (.upper.data);
+    /* Status word.  */
+    SHORT(1);
+    __high_datastart = .;
+    *(.upper.data.* .upper.data)
+    __high_dataend = .;
+  } > HIFRAM 
+
+  __rom_highdatacopysize = SIZEOF(.upper.data) - 2;
+  __rom_highdatastart = LOADADDR(.upper.data) + 2;
+
+  .upper.bss :
+  {
+    . = ALIGN(2);
+    __high_bssstart = .;
+    *(.upper.bss.* .upper.bss)
+    . = ALIGN(2);
+    __high_bssend = .;
+	__high_bsssize = SIZEOF(.upper.bss);
+  } > HIFRAM
+
+  .upper.text :
+  {
+    . = ALIGN(2);
+    *(.upper.text.* .upper.text)
+  } > HIFRAM :upper_text
+
+  /* We create this section so that "end" will always be in the
+     RAM region (matching .stack below), even if the .bss
+     section is empty.  */
+  .heap (NOLOAD) :
+  {
+    . = ALIGN(2);
+    __heap_start__ = .;
+    _end = __heap_start__;
+    PROVIDE (end = .); 
+    KEEP (*(.heap))
+    _end = .;
+    PROVIDE (end = .);
+    /* This word is here so that the section is not empty, and thus
+       not discarded by the linker.  The actual value does not matter
+       and is ignored.  */
+    LONG(0);
+    __heap_end__ = .;
+    __HeapLimit = __heap_end__;
+  } > RAM
+  /* WARNING: Do not place anything in RAM here.
+     The heap section must be the last section in RAM and the stack
+     section must be placed at the very end of the RAM region.  */
+
+  .infoA     : {} > INFOA              /* MSP430 INFO FLASH MEMORY SEGMENTS */
+  .infoB     : {} > INFOB
+  .infoC     : {} > INFOC
+  .infoD     : {} > INFOD
+
+  /* The rest are all not normally part of the runtime image.  */
+
+  .MP430.attributes 0 :
+  {
+    KEEP (*(.MSP430.attributes))
+    KEEP (*(.gnu.attributes))
+    KEEP (*(__TI_build_attributes))
+  }
+
+  /* Stabs debugging sections.  */
+  .stab          0 : { *(.stab) }
+  .stabstr       0 : { *(.stabstr) }
+  .stab.excl     0 : { *(.stab.excl) }
+  .stab.exclstr  0 : { *(.stab.exclstr) }
+  .stab.index    0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment       0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1.  */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions.  */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2.  */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2.  */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line .debug_line.* .debug_line_end ) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions.  */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  /* DWARF 3 */
+  .debug_pubtypes 0 : { *(.debug_pubtypes) }
+  .debug_ranges   0 : { *(.debug_ranges) }
+  /* DWARF Extension.  */
+  .debug_macro    0 : { *(.debug_macro) }
+
+  /DISCARD/ : { *(.note.GNU-stack) }
+}
+
+
+/****************************************************************************/
+/* Include peripherals memory map                                           */
+/****************************************************************************/
+
+INCLUDE msp430fr6989_symbols.ld
+
diff --git a/os/hal/boards/EXP430FR5969/board.h b/os/hal/boards/EXP430FR5969/board.h
index 6b53f4b..97103d3 100644
--- a/os/hal/boards/EXP430FR5969/board.h
+++ b/os/hal/boards/EXP430FR5969/board.h
@@ -18,7 +18,7 @@
 #define _BOARD_H_
 
 /*
- * Setup for the Arduino Uno or  board.
+ * Setup for the EXP430FR5969 LaunchPad board
  */
 
 /*
@@ -44,7 +44,7 @@
  * Port A setup:
  * 
  * P1.0 - Green LED               (output low)
- * P1.1 - Switch S2               (input pullup falling-edge interrupt)
+ * P1.1 - Switch S2               (input pullup)
  * P1.2 - BoosterPack BP19        (input pullup)
  * P1.3 - BoosterPack BP11        (input pullup)
  * P1.4 - BoosterPack BP12        (input pullup)
@@ -65,8 +65,8 @@
 #define VAL_IOPORT1_REN   0xFCFE
 #define VAL_IOPORT1_SEL0  0x0000
 #define VAL_IOPORT1_SEL1  0x0300
-#define VAL_IOPORT1_IES   0x0002
-#define VAL_IOPORT1_IE    0x0002
+#define VAL_IOPORT1_IES   0x0000
+#define VAL_IOPORT1_IE    0x0000
 
 /*
  * Port B setup:
@@ -79,12 +79,12 @@
  * P3.5 - BoosterPack BP9         (input pullup)
  * P3.6 - BoosterPack BP10        (input pullup)
  * P3.7 - N/C                     (input pullup)
- * P4.0 - Application UART CTS    (input pullup falling-edge interrupt)
+ * P4.0 - Application UART CTS    (input pullup)
  * P4.1 - Application UART RTS    (output high)
  * P4.2 - BoosterPack BP2         (input pullup)
  * P4.3 - BoosterPack BP5         (input pullup)
  * P4.4 - N/C                     (input pullup)
- * P4.5 - Switch S1               (input pullup falling-edge interrupt)
+ * P4.5 - Switch S1               (input pullup)
  * P4.6 - Red LED                 (output low)
  * P4.7 - N/C                     (input pullup)
  */
@@ -93,8 +93,8 @@
 #define VAL_IOPORT2_REN   0xBDFF
 #define VAL_IOPORT2_SEL0  0x0000
 #define VAL_IOPORT2_SEL1  0x0000
-#define VAL_IOPORT2_IES   0x2100
-#define VAL_IOPORT2_IE    0x2100
+#define VAL_IOPORT2_IES   0x0000
+#define VAL_IOPORT2_IE    0x0000
 
 /*
  * Port J setup:
diff --git a/os/hal/boards/EXP430FR6989/board.c b/os/hal/boards/EXP430FR6989/board.c
new file mode 100644
index 0000000..a6836cf
--- /dev/null
+++ b/os/hal/boards/EXP430FR6989/board.c
@@ -0,0 +1,52 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#include "hal.h"
+
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+const PALConfig pal_default_config =
+{
+  {VAL_IOPORT1_OUT, VAL_IOPORT1_DIR, VAL_IOPORT1_REN, VAL_IOPORT1_SEL0, 
+    VAL_IOPORT1_SEL1, VAL_IOPORT1_IES, VAL_IOPORT1_IE},
+  {VAL_IOPORT2_OUT, VAL_IOPORT2_DIR, VAL_IOPORT2_REN, VAL_IOPORT2_SEL0, 
+    VAL_IOPORT2_SEL1, VAL_IOPORT2_IES, VAL_IOPORT2_IE},
+  {VAL_IOPORT3_OUT, VAL_IOPORT3_DIR, VAL_IOPORT3_REN, VAL_IOPORT3_SEL0, 
+    VAL_IOPORT3_SEL1, VAL_IOPORT3_IES, VAL_IOPORT3_IE},
+  {VAL_IOPORT4_OUT, VAL_IOPORT4_DIR, VAL_IOPORT4_REN, VAL_IOPORT4_SEL0, 
+    VAL_IOPORT4_SEL1, VAL_IOPORT4_IES, VAL_IOPORT4_IE},
+  {VAL_IOPORT5_OUT, VAL_IOPORT5_DIR, VAL_IOPORT5_REN, VAL_IOPORT5_SEL0, 
+    VAL_IOPORT5_SEL1, VAL_IOPORT5_IES, VAL_IOPORT5_IE},
+  {VAL_IOPORT0_OUT, VAL_IOPORT0_DIR, VAL_IOPORT0_REN, VAL_IOPORT0_SEL0, 
+    VAL_IOPORT0_SEL1, VAL_IOPORT0_IES, VAL_IOPORT0_IE}
+}; /* Set UART TX pin correctly */
+#endif /* HAL_USE_PAL */
+
+/**
+ * Board-specific initialization code.
+ */
+void boardInit(void) {
+
+  /*
+   * External interrupts setup, all disabled initially.
+   */
+  _disable_interrupts();
+
+}
diff --git a/os/hal/boards/EXP430FR6989/board.h b/os/hal/boards/EXP430FR6989/board.h
new file mode 100644
index 0000000..83b8fbb
--- /dev/null
+++ b/os/hal/boards/EXP430FR6989/board.h
@@ -0,0 +1,217 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for the EXP430FR6989 LaunchPad board
+ */
+
+/* NOTE: LCD segment pins configured as unused - controlled by LCD driver if
+ * present
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_EXP430FR6989
+#define BOARD_NAME "MSP430FR6989 LaunchPad"
+
+/*
+ * IO lines assignments.
+ */
+#define LINE_LED_R                                PAL_LINE(IOPORT1, 0U)
+#define LINE_LED_G                                PAL_LINE(IOPORT5, 7U)
+#define LINE_SW_S1                                PAL_LINE(IOPORT1, 1U)
+#define LINE_SW_S2                                PAL_LINE(IOPORT1, 2U)
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the MSP430X Family Users Guide for details.
+ */
+/*
+ * Port A setup:
+ * 
+ * P1.0 - Red LED                 (output low)
+ * P1.1 - Switch S1               (input pullup falling-edge interrupt)
+ * P1.2 - Switch S2               (input pullup falling-edge interrupt)
+ * P1.3 - BoosterPack BP34        (input pullup)
+ * P1.4 - BoosterPack BP7         (input pullup)
+ * P1.5 - BoosterPack BP18        (input pullup)
+ * P1.6 - BoosterPack BP15        (input pullup)
+ * P1.7 - BoosterPack BP14        (input pullup)
+ * P2.0 - BoosterPack BP8         (input pullup)
+ * P2.1 - BoosterPack BP19        (input pullup)
+ * P2.2 - BoosterPack BP35        (input pullup)
+ * P2.3 - BoosterPack BP31        (input pullup)
+ * P2.4 - BoosterPack BP12        (input pullup)
+ * P2.5 - BoosterPack BP13        (input pullup)
+ * P2.6 - BoosterPack BP39        (input pullup)
+ * P2.7 - BoosterPack BP40        (input pullup)
+ */
+#define VAL_IOPORT1_OUT   0xFFFE
+#define VAL_IOPORT1_DIR   0x0001
+#define VAL_IOPORT1_REN   0xFFFE
+#define VAL_IOPORT1_SEL0  0x0000
+#define VAL_IOPORT1_SEL1  0x0000
+#define VAL_IOPORT1_IES   0x0006
+#define VAL_IOPORT1_IE    0x0006
+
+/*
+ * Port B setup:
+ * 
+ * P3.0 - BoosterPack BP33        (input pullup)
+ * P3.1 - BoosterPack BP32        (input pullup)
+ * P3.2 - BoosterPack BP5         (input pullup)
+ * P3.3 - BoosterPack BP38        (input pullup)
+ * P3.4 - Application UART TX     (alternate 1)
+ * P3.5 - Application UART RX     (alternate 1)
+ * P3.6 - BoosterPack BP37        (input pullup)
+ * P3.7 - BoosterPack BP36        (input pullup)
+ * P4.0 - BoosterPack BP10        (input pullup)
+ * P4.1 - BoosterPack BP9         (input pullup)
+ * P4.2 - BoosterPack BP4         (input pullup)
+ * P4.3 - BoosterPack BP3         (input pullup)
+ * P4.4 - LCD S8                  (input pullup)
+ * P4.5 - LCD S7                  (input pullup)
+ * P4.6 - LCD S6                  (input pullup)
+ * P4.7 - BoosterPack BP11        (input pullup)
+ */
+#define VAL_IOPORT2_OUT   0xFFCF
+#define VAL_IOPORT2_DIR   0x0000
+#define VAL_IOPORT2_REN   0xFFCF
+#define VAL_IOPORT2_SEL0  0x0030
+#define VAL_IOPORT2_SEL1  0x0000
+#define VAL_IOPORT2_IES   0x0000
+#define VAL_IOPORT2_IE    0x0000
+
+/*
+ * Port C setup:
+ * 
+ * P5.0 - LCD S38                 (input pullup)
+ * P5.1 - LCD S37                 (input pullup)
+ * P5.2 - LCD S36                 (input pullup)
+ * P5.3 - LCD S35                 (input pullup)
+ * P5.4 - LCD S12                 (input pullup)
+ * P5.5 - LCD S11                 (input pullup)
+ * P5.6 - LCD S10                 (input pullup)
+ * P5.7 - LCD S9                  (input pullup)
+ * P6.0 - LCD R23                 (input pullup)
+ * P6.1 - LCD R13                 (input pullup)
+ * P6.2 - LCD R03                 (input pullup)
+ * P6.3 - LCD COM0                (input pullup)
+ * P6.4 - LCD COM1                (input pullup)
+ * P6.5 - LCD COM2                (input pullup)
+ * P6.6 - LCD COM3                (input pullup)
+ * P6.7 - LCD S31                 (input pullup)
+ */
+#define VAL_IOPORT3_OUT   0xFFFF
+#define VAL_IOPORT3_DIR   0x0000
+#define VAL_IOPORT3_REN   0xFFFF
+#define VAL_IOPORT3_SEL0  0x0000
+#define VAL_IOPORT3_SEL1  0x0000
+#define VAL_IOPORT3_IES   0x0000
+#define VAL_IOPORT3_IE    0x0000
+
+/*
+ * Port D setup:
+ * 
+ * P7.0 - LCD S17                 (input pullup)
+ * P7.1 - LCD S16                 (input pullup)
+ * P7.2 - LCD S15                 (input pullup)
+ * P7.3 - LCD S14                 (input pullup)
+ * P7.4 - LCD S13                 (input pullup)
+ * P7.5 - LCD S30                 (input pullup)
+ * P7.6 - LCD S29                 (input pullup)
+ * P7.7 - LCD S27                 (input pullup)
+ * P8.0 - LCD S21                 (input pullup)
+ * P8.1 - LCD S20                 (input pullup)
+ * P8.2 - LCD S19                 (input pullup)
+ * P8.3 - LCD S18                 (input pullup)
+ * P8.4 - BoosterPack BP23        (input pullup)
+ * P8.5 - BoosterPack BP24        (input pullup)
+ * P8.6 - BoosterPack BP25        (input pullup)
+ * P8.7 - BoosterPack BP26        (input pullup)
+ */
+#define VAL_IOPORT4_OUT   0xFFFF
+#define VAL_IOPORT4_DIR   0x0000
+#define VAL_IOPORT4_REN   0xFFFF
+#define VAL_IOPORT4_SEL0  0x0000
+#define VAL_IOPORT4_SEL1  0x0000
+#define VAL_IOPORT4_IES   0x0000
+#define VAL_IOPORT4_IE    0x0000
+
+/*
+ * Port D setup:
+ * 
+ * P9.0 - BoosterPack BP27        (input pullup)
+ * P9.1 - BoosterPack BP28        (input pullup)
+ * P9.2 - BoosterPack BP2         (input pullup)
+ * P9.3 - BoosterPack BP6         (input pullup)
+ * P9.4 - BoosterPack BP17        (input pullup)
+ * P9.5 - BoosterPack BP29        (input pullup)
+ * P9.6 - BoosterPack BP30        (input pullup)
+ * P9.7 - Green LED               (output low)
+ * P10.0 - LCD S4                 (input pullup)
+ * P10.1 - LCD S28                (input pullup)
+ * P10.2 - LCD S39                (input pullup)
+ * P10.3 - N/C Internally         (input pullup)
+ * P10.4 - N/C Internally         (input pullup)
+ * P10.5 - N/C Internally         (input pullup)
+ * P10.6 - N/C Internally         (input pullup)
+ * P10.7 - N/C Internally         (input pullup)
+ */
+#define VAL_IOPORT5_OUT   0xFF7F
+#define VAL_IOPORT5_DIR   0x0080
+#define VAL_IOPORT5_REN   0xFF7F
+#define VAL_IOPORT5_SEL0  0x0000
+#define VAL_IOPORT5_SEL1  0x0000
+#define VAL_IOPORT5_IES   0x0000
+#define VAL_IOPORT5_IE    0x0000
+
+/*
+ * Port J setup:
+ * 
+ * PJ.0 - TDO                     (input pullup)
+ * PJ.1 - TDI                     (input pullup)
+ * PJ.2 - TMS                     (input pullup)
+ * PJ.3 - TCK                     (input pullup)
+ * PJ.4 - LFXIN                   (alternate 1)
+ * PJ.5 - LFXOUT                  (alternate 1)
+ * PJ.6 - HFXIN (N/C)             (input pullup)
+ * PJ.7 - HFXOUT (N/C)            (input pullup)
+ */
+#define VAL_IOPORT0_OUT   0x00FF
+#define VAL_IOPORT0_DIR   0x0000
+#define VAL_IOPORT0_REN   0x00CF
+#define VAL_IOPORT0_SEL0  0x0030
+#define VAL_IOPORT0_SEL1  0x0000
+#define VAL_IOPORT0_IES   0x0000
+#define VAL_IOPORT0_IE    0x0000
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/os/hal/boards/EXP430FR6989/board.mk b/os/hal/boards/EXP430FR6989/board.mk
new file mode 100644
index 0000000..ea1c237
--- /dev/null
+++ b/os/hal/boards/EXP430FR6989/board.mk
@@ -0,0 +1,5 @@
+# List of all the board related files.
+BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/EXP430FR6989/board.c
+
+# Required include directories
+BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/EXP430FR6989
diff --git a/os/hal/ports/MSP430X/hal_dma_lld.c b/os/hal/ports/MSP430X/hal_dma_lld.c
new file mode 100644
index 0000000..58293ca
--- /dev/null
+++ b/os/hal/ports/MSP430X/hal_dma_lld.c
@@ -0,0 +1,244 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    MSP430X hal_dma_lld.c
+ * @brief   MSP430X DMA subsystem low level driver source.
+ *
+ * @addtogroup MSP430X_DMA
+ * @{
+ */
+
+#include "hal.h"
+#include "ch.h"
+#include "hal_dma_lld.h"
+
+#if (HAL_USE_DMA == TRUE) || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/* TODO make sure this is right... */
+static msp430x_dma_ch_reg_t * const dma_channels = (msp430x_dma_ch_reg_t *)&DMA0CTL;
+static uint8_t * const dma_ctls = (uint8_t *)&DMACTL0;
+
+static msp430x_dma_cb_t callbacks[MSP430X_DMA_CHANNELS];
+#if CH_CFG_USE_SEMAPHORES
+static semaphore_t dma_lock;
+#endif
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+static void init_request(const msp430x_dma_req_t * request, uint8_t index) {
+  
+    dma_ctls[index] = request->trigger;
+    callbacks[index] = request->callback;
+    msp430x_dma_ch_reg_t * ch = &dma_channels[index];
+    ch->sa = (uintptr_t)request->source_addr;
+    ch->da = (uintptr_t)request->dest_addr;
+    ch->sz = request->size;
+    ch->ctl = DMAREQ | DMAIE | DMAEN | request->data_mode | request->addr_mode
+      | request->transfer_mode; 
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers.                                                */
+/*===========================================================================*/
+
+PORT_IRQ_HANDLER(DMA_VECTOR) {
+  uint8_t index;
+  OSAL_IRQ_PROLOGUE();
+  
+  index = (DMAIV >> 1) - 1;
+  
+  if (index < MSP430X_DMA_CHANNELS) {
+    msp430x_dma_cb_t * cb = &callbacks[index];
+    
+    /* WARNING: CALLBACKS ARE CALLED IN AN ISR CONTEXT! */
+    if (cb->callback != NULL) {
+      cb->callback(cb->args);
+    }
+  
+  } 
+  
+  OSAL_IRQ_EPILOGUE();
+}
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
+
+/**
+ * @brief Initialize the DMA engine.
+ * 
+ * @init
+ */
+void dmaInit(void) {
+#if CH_CFG_USE_SEMAPHORES
+  chSemObjectInit(&dma_lock, MSP430X_DMA_CHANNELS);
+#endif
+}
+
+/**
+ * @brief   Requests a DMA transfer operation from the DMA engine.
+ * @note    The DMA engine uses unclaimed DMA channels to provide DMA services
+ *          for one-off or infrequent uses. If all channels are busy, and
+ *          semaphores are enabled, the calling thread will sleep until a
+ *          channel is available or the request times out. If semaphores are
+ *          disabled, the calling thread will busy-wait instead of sleeping.
+ */
+bool dmaRequest(msp430x_dma_req_t * request, systime_t timeout) {
+  /* Check if a DMA channel is available */
+#if CH_CFG_USE_SEMAPHORES
+  msg_t semresult = chSemWaitTimeout(&dma_lock, timeout);
+  if (semresult != MSG_OK)
+    return true;
+#endif
+  
+#if !(CH_CFG_USE_SEMAPHORES)
+  systime_t start = chVTGetSystemTimeX();
+  
+  do {
+#endif
+  /* Grab the correct DMA channel to use */
+  int i = 0;
+  for (i = 0; i < MSP430X_DMA_CHANNELS; i++) {
+    if (!(dma_channels[i].ctl & DMAEN)) {
+      break;
+    }
+  }
+#if !(CH_CFG_USE_SEMAPHORES)
+  while (chVTTimeElapsedSinceX(start) < timeout);
+#endif
+  
+#if !(CH_CFG_USE_SEMAPHORES)
+  if (i == MSP430X_DMA_CHANNELS) {
+    return true;
+  }
+#endif
+  
+  /* Make the request */
+  init_request(request, i);
+  
+#if CH_CFG_USE_SEMAPHORES
+  chSemSignal(&dma_lock);
+#endif
+  
+  return false;
+}
+
+/**
+ * @brief   Acquires exclusive control of a DMA channel.
+ * @pre     The channel must not be already acquired or an error is returned.
+ * @note    If the channel is in use by the DMA engine, blocks until acquired.
+ * @post    This channel must be interacted with using only the functions 
+ *          defined in this module.
+ *          
+ * @param[out] channel    The channel handle. Must be pre-allocated.
+ * @param[in]  index      The index of the channel (< MSP430X_DMA_CHANNELS).
+ * @return                The operation status.
+ * @retval false          no error, channel acquired.
+ * @retval true           error, channel already acquired.
+ */
+bool dmaAcquire(msp430x_dma_ch_t * channel, uint8_t index) {
+  /* Acquire the channel in an idle mode */
+  
+  /* Is the channel already acquired? */
+  osalDbgAssert(index < MSP430X_DMA_CHANNELS, "invalid channel index");
+  if (dma_channels[index].ctl & DMADT_4) {
+    return true;
+  }
+  
+  /* Increment the DMA counter */
+#if CH_CFG_USE_SEMAPHORES
+  msg_t semresult = chSemWait(&dma_lock);
+  if (semresult != MSG_OK)
+    return true;
+#endif
+  
+  while (dma_channels[index].ctl & DMAEN) ;
+  
+  dma_ctls[index] = DMA_TRIGGER_MNEM(DMAREQ);
+  dma_channels[index].sz = 0;
+  dma_channels[index].ctl = DMAEN | DMAABORT | DMADT_4;
+  
+  channel->registers = dma_channels + index;
+  channel->ctl = dma_ctls + index;
+  channel->cb = callbacks + index;
+  
+  return false;
+}
+
+/**
+ * @brief   Initiates a DMA transfer operation using an acquired channel.
+ * @pre     The channel must have been acquired using @p dmaAcquire().
+ * 
+ * @param[in] channel   pointer to a DMA channel from @p dmaAcquire().
+ * @param[in] request   pointer to a DMA request object.
+ */
+void dmaTransfer(msp430x_dma_ch_t * channel, msp430x_dma_req_t * request) {
+  
+    *(channel->ctl) = request->trigger;
+    
+    channel->cb->callback = request->callback.callback;
+    channel->cb->args = request->callback.args;
+    
+    chSysLock();
+    channel->registers->ctl &= (~DMAEN);
+    channel->registers->sa = (uintptr_t)request->source_addr;
+    channel->registers->da = (uintptr_t)request->dest_addr;
+    channel->registers->sz = request->size;
+    channel->registers->ctl = DMAIE | request->data_mode | request->addr_mode
+      | request->transfer_mode | DMADT_4 | DMAEN | DMAREQ; /* repeated transfers */
+    chSysUnlock();
+}
+
+/**
+ * @brief   Releases exclusive control of a DMA channel.
+ * @details The channel is released from control and returned to the DMA engine
+ *          pool. Trying to release an unallocated channel is an illegal
+ *          operation and is trapped if assertions are enabled.
+ * @pre     The channel must have been acquired using @p dmaAcquire().
+ * @post    The channel is returned to the DMA engine pool.
+ */
+void dmaRelease(msp430x_dma_ch_t * channel) {
+  
+  osalDbgCheck(channel != NULL);
+  osalDbgAssert(channel->registers->ctl & DMADT_4, "not acquired");
+  
+  /* Release the channel in an idle mode */
+  channel->registers->ctl = DMAABORT;
+  
+  /* release the DMA counter */
+#if CH_CFG_USE_SEMAPHORES
+  chSemSignal(&dma_lock);
+#endif
+}
+
+#endif /* HAL_USE_DMA == TRUE */
+
+/** @} */
diff --git a/os/hal/ports/MSP430X/hal_dma_lld.h b/os/hal/ports/MSP430X/hal_dma_lld.h
new file mode 100644
index 0000000..2cce85d
--- /dev/null
+++ b/os/hal/ports/MSP430X/hal_dma_lld.h
@@ -0,0 +1,174 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    MSP430X/hal_dma_lld.c
+ * @brief   MSP430X DMA subsystem low level driver header.
+ * @note    This driver is used as a DMA engine for the other
+ *          low level drivers.
+ *
+ * @addtogroup MSP430X_DMA
+ * @{
+ */
+
+#ifndef HAL_MSP430X_DMA_H
+#define HAL_MSP430X_DMA_H
+
+#if (HAL_USE_DMA == TRUE) || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
+#define MSP430X_DMA_SINGLE DMADT_0
+#define MSP430X_DMA_BLOCK  DMADT_1
+#define MSP430X_DMA_BURST  DMADT_2
+
+#define MSP430X_DMA_SRCINCR   DMASRCINCR_3
+#define MSP430X_DMA_SRCDECR   DMASRCINCR_2
+#define MSP430X_DMA_DSTINCR   DMADSTINCR_3
+#define MSP430X_DMA_DSTDECR   DMADSTINCR_2
+
+#define MSP430X_DMA_SRCBYTE   DMASRCBYTE
+#define MSP430X_DMA_DSTBYTE   DMADSTBYTE
+#define MSP430X_DMA_SRCWORD   0
+#define MSP430X_DMA_DSTWORD   0
+
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+#if !defined(DMA_BASE) && !defined(MSP430X_DMA_SOFTWARE)
+  #error "The MSP430 device in use does not support DMA. Explicitly enable"
+  #error "software support by defining MSP430X_DMA_SOFTWARE."
+#endif
+
+#if defined(__MSP430_HAS_DMAX_1__) || defined(__MSP430X_HAS_DMA_1__)
+#define MSP430X_DMA_CHANNELS 1
+#elif defined(__MSP430_HAS_DMAX_3__) || defined(__MSP430X_HAS_DMA_3__)
+#define MSP430X_DMA_CHANNELS 3
+#elif defined(__MSP430_HAS_DMAX_6__) || defined(__MSP430X_HAS_DMA_6__)
+#define MSP430X_DMA_CHANNELS 6
+#else
+  #error "Unexpected error - how many DMA channels does your MSP have?"
+#endif
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief     Type of DMA callback function pointer.
+ */
+typedef void (*msp430x_dma_cbp_t)(void *args);
+
+/**
+ * @brief     DMA callback, function and argument.
+ */
+typedef struct {
+  msp430x_dma_cbp_t   callback; /**< @brief Callback function pointer   */
+  void *              args;     /**< @brief Callback function arguments */
+} msp430x_dma_cb_t;
+
+/**
+ * @brief     MSP430X DMA request structure.
+ */
+typedef struct {
+  void *    source_addr;    /**< @brief Source address                       */
+  void *    dest_addr;      /**< @brief Destination address                  */
+  uint16_t  size;           /**< @brief Number of values to transfer         */
+  uint16_t  addr_mode;      /**< @brief Address manipulation mode            */
+  uint16_t  data_mode;      /**< @brief Data sizes (b2b, w2w, b2w, w2b)      */
+  uint16_t  transfer_mode;  /**< @brief Transfer mode (single, block, burst) */
+  uint16_t  trigger;        /**< @brief Triggering event (see datasheet)     */
+  msp430x_dma_cb_t callback;/**< @brief Callback function and arguments      */
+} msp430x_dma_req_t;
+
+/**
+ * @brief     MSP430X DMA channel register structure.
+ */
+typedef struct {
+  volatile uint16_t ctl; /**< @brief Control register             */
+  volatile uint32_t sa;  /**< @brief Source address register      */
+  volatile uint32_t da;  /**< @brief Destination address register */
+  volatile uint16_t sz;  /**< @brief Size register                */
+  volatile uint16_t pad1;
+  volatile uint16_t pad2;
+} msp430x_dma_ch_reg_t;
+
+/**
+ * @brief     MSP430X DMA controller register structure.
+ */
+typedef struct {
+  volatile uint8_t tsel0; /**< @brief Trigger select for channel 0 */
+  volatile uint8_t tsel1; /**< @brief Trigger select for channel 1 */
+  volatile uint8_t tsel2; /**< @brief Trigger select for channel 2 */
+  volatile uint8_t tsel3; /**< @brief Trigger select for channel 3 */
+  volatile uint8_t tsel4; /**< @brief Trigger select for channel 4 */
+  volatile uint8_t tsel5; /**< @brief Trigger select for channel 5 */
+  volatile uint8_t tsel6; /**< @brief Trigger select for channel 6 */
+  volatile uint8_t tsel7; /**< @brief Trigger select for channel 7 */
+  volatile uint16_t ctl4; /**< @brief Controller register 4        */
+} msp430x_dma_ctl_reg_t;
+
+/**
+ * @brief     MSP430X DMA channel structure.
+ */
+typedef struct {
+  msp430x_dma_ch_reg_t * registers; /**< @brief Pointer to channel registers */
+  volatile uint8_t * ctl; /**< @brief Pointer to channel control register    */
+  msp430x_dma_cb_t * cb; /**< @brief Pointer to callback function  and args  */
+} msp430x_dma_ch_t;
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
+/**
+ * @brief     Identifies a DMA trigger using a mnemonic.
+ * 
+ * @param[in] mnem    The mnemonic for the trigger, e.g. UCA0RXIFG to trigger
+ *                    on UART receive.
+ */
+#define DMA_TRIGGER_MNEM(mnem) DMA0TSEL__ ## mnem
+
+/** @} */
+
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void dmaInit(void);
+  bool dmaRequest(msp430x_dma_req_t * request, systime_t timeout);
+  bool dmaAcquire(msp430x_dma_ch_t * channel, uint8_t index);
+  void dmaTransfer(msp430x_dma_ch_t * channel, msp430x_dma_req_t * request); 
+  void dmaRelease(msp430x_dma_ch_t * channel);
+  
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_DMA == true */
+
+#endif /* HAL_MSP430X_DMA_H */
+
diff --git a/os/hal/ports/MSP430X/hal_pal_lld.c b/os/hal/ports/MSP430X/hal_pal_lld.c
index 4cfff3b..97ad170 100644
--- a/os/hal/ports/MSP430X/hal_pal_lld.c
+++ b/os/hal/ports/MSP430X/hal_pal_lld.c
@@ -68,6 +68,7 @@ void _pal_lld_init(const PALConfig *config) {
   PASEL1 = config->porta.sel1;
   PAIES = config->porta.ies;
   PAIE = config->porta.ie;
+  PAIFG = 0;
 #endif
 #if defined(PB_BASE) || defined(__DOXYGEN__)
   PBOUT = config->portb.out;
@@ -77,6 +78,7 @@ void _pal_lld_init(const PALConfig *config) {
   PBSEL1 = config->portb.sel1;
   PBIES = config->portb.ies;
   PBIE = config->portb.ie;
+  PBIFG = 0;
 #endif
 #if defined(PC_BASE) || defined(__DOXYGEN__)
   PCOUT = config->portc.out;
@@ -84,8 +86,11 @@ void _pal_lld_init(const PALConfig *config) {
   PCREN = config->portc.ren;
   PCSEL0 = config->portc.sel0;
   PCSEL1 = config->portc.sel1;
+#if defined(PCIE) || defined(__DOXYGEN__)
   PCIES = config->portc.ies;
   PCIE = config->portc.ie;
+  PCIFG = 0;
+#endif
 #endif
 #if defined(PD_BASE) || defined(__DOXYGEN__)
   PDOUT = config->portd.out;
@@ -93,8 +98,11 @@ void _pal_lld_init(const PALConfig *config) {
   PDREN = config->portd.ren;
   PDSEL0 = config->portd.sel0;
   PDSEL1 = config->portd.sel1;
+#if defined(PDIE) || defined(__DOXYGEN__)
   PDIES = config->portd.ies;
   PDIE = config->portd.ie;
+  PDIFG = 0;
+#endif
 #endif
 #if defined(PE_BASE) || defined(__DOXYGEN__)
   PEOUT = config->porte.out;
@@ -102,8 +110,11 @@ void _pal_lld_init(const PALConfig *config) {
   PEREN = config->porte.ren;
   PESEL0 = config->porte.sel0;
   PESEL1 = config->porte.sel1;
+#if defined(PEIE) || defined(__DOXYGEN__)
   PEIES = config->porte.ies;
   PEIE = config->porte.ie;
+  PEIFG = 0;
+#endif
 #endif
 #if defined(PF_BASE) || defined(__DOXYGEN__)
   PFOUT = config->portf.out;
@@ -111,8 +122,11 @@ void _pal_lld_init(const PALConfig *config) {
   PFREN = config->portf.ren;
   PFSEL0 = config->portf.sel0;
   PFSEL1 = config->portf.sel1;
+#if defined(PFIE) || defined(__DOXYGEN__)
   PFIES = config->portf.ies;
   PFIE = config->portf.ie;
+  PFIFG = 0;
+#endif
 #endif
   PJOUT = config->portj.out;
   PJDIR = config->portj.dir;
diff --git a/os/hal/ports/MSP430X/hal_serial_lld.c b/os/hal/ports/MSP430X/hal_serial_lld.c
index 277f6d2..bc002cb 100644
--- a/os/hal/ports/MSP430X/hal_serial_lld.c
+++ b/os/hal/ports/MSP430X/hal_serial_lld.c
@@ -223,10 +223,10 @@ static void usart1_init(const SerialConfig *config) {
   UCA1STATW = 0;
   UCA1ABCTL = 0;
   UCA1IRCTL = 0;
-  UCA1IE = UCRXIE;
   UCA1CTLW0 = (MSP430X_USART1_PARITY << 14) | (MSP430X_USART1_ORDER << 13) | \
               (MSP430X_USART1_SIZE << 12) | (MSP430X_USART1_STOP << 11) | \
               (MSP430X_USART1_UCSSEL);
+  UCA1IE = UCRXIE;
 }
 #endif
 
@@ -237,10 +237,10 @@ static void usart2_init(const SerialConfig *config) {
   UCA2STATW = 0;
   UCA2ABCTL = 0;
   UCA2IRCTL = 0;
-  UCA2IE = UCRXIE;
   UCA2CTLW0 = (MSP430X_USART2_PARITY << 14) | (MSP430X_USART2_ORDER << 13) | \
               (MSP430X_USART2_SIZE << 12) | (MSP430X_USART2_STOP << 11) | \
               (MSP430X_USART2_UCSSEL);
+  UCA2IE = UCRXIE;
 }
 #endif
 
@@ -251,10 +251,10 @@ static void usart3_init(const SerialConfig *config) {
   UCA3STATW = 0;
   UCA3ABCTL = 0;
   UCA3IRCTL = 0;
-  UCA3IE = UCRXIE;
   UCA3CTLW0 = (MSP430X_USART3_PARITY << 14) | (MSP430X_USART3_ORDER << 13) | \
               (MSP430X_USART3_SIZE << 12) | (MSP430X_USART3_STOP << 11) | \
               (MSP430X_USART3_UCSSEL);
+  UCA3IE = UCRXIE;
 }
 #endif
 
diff --git a/os/hal/ports/MSP430X/platform.mk b/os/hal/ports/MSP430X/platform.mk
index b0f256e..6947785 100644
--- a/os/hal/ports/MSP430X/platform.mk
+++ b/os/hal/ports/MSP430X/platform.mk
@@ -2,7 +2,8 @@
 PLATFORMSRC = ${CHIBIOS_CONTRIB}/os/hal/ports/MSP430X/hal_lld.c \
               ${CHIBIOS_CONTRIB}/os/hal/ports/MSP430X/hal_st_lld.c \
               ${CHIBIOS_CONTRIB}/os/hal/ports/MSP430X/hal_serial_lld.c \
-              ${CHIBIOS_CONTRIB}/os/hal/ports/MSP430X/hal_pal_lld.c 
+              ${CHIBIOS_CONTRIB}/os/hal/ports/MSP430X/hal_pal_lld.c \
+              ${CHIBIOS_CONTRIB}/os/hal/ports/MSP430X/hal_dma_lld.c 
 
 # Required include directories
 PLATFORMINC = ${CHIBIOS_CONTRIB}/os/hal/ports/MSP430X
diff --git a/testhal/MSP430X/EXP430FR5969/DMA/Makefile b/testhal/MSP430X/EXP430FR5969/DMA/Makefile
new file mode 100644
index 0000000..e109c95
--- /dev/null
+++ b/testhal/MSP430X/EXP430FR5969/DMA/Makefile
@@ -0,0 +1,207 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Optimization level, can be [0, 1, 2, 3, s].
+#     0 = turn off optimization. s = optimize for size.
+#     (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPTIMIZE = 0
+
+# Debugging format.
+DEBUG = 
+#DEBUG = stabs
+
+# Memory/data model
+MODEL = small
+
+# Object files directory
+#     To put object files in current directory, use a dot (.), do NOT make
+#     this an empty or blank macro!
+OBJDIR = .
+
+# Compiler flag to set the C Standard level.
+#     c89   = "ANSI" C
+#     gnu89 = c89 plus GCC extensions
+#     c99   = ISO C99 standard (not yet fully implemented)
+#     gnu99 = c99 plus GCC extensions
+CSTANDARD = -std=gnu11
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O$(OPTIMIZE) -g$(DEBUG) 
+  USE_OPT += -funsigned-char -fshort-enums 
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+  USE_COPT = 
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+  USE_LDOPT = 
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+  USE_LTO = no
+endif
+
+# Enable the selected hardware multiplier
+ifeq ($(USE_HWMULT),)
+  USE_HWMULT = f5series
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+  USE_VERBOSE_COMPILE = yes
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+  USE_SMART_BUILD = yes
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the idle thread stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_IDLE_STACKSIZE),)
+  USE_IDLE_STACKSIZE = 0xC00
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = nil
+
+# Imported source files and paths
+CHIBIOS = ../../../../../ChibiOS-RT
+CHIBIOS_CONTRIB = ../../../..
+# Startup files.
+include $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk
+# HAL-OSAL files (optional).
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS_CONTRIB)/os/hal/boards/EXP430FR5969/board.mk
+include $(CHIBIOS_CONTRIB)/os/hal/ports/MSP430X/platform.mk
+include $(CHIBIOS)/os/hal/osal/nil/osal.mk
+# RTOS files (optional).
+include $(CHIBIOS)/os/nil/nil.mk
+include $(CHIBIOS_CONTRIB)/os/common/ports/MSP430X/compilers/GCC/mk/port.mk
+# Other files (optional).
+include $(CHIBIOS)/test/nil/test.mk
+
+# Define linker script file here
+LDSCRIPT = $(STARTUPLD)/msp430fr5969.ld
+
+# C sources 
+CSRC = $(STARTUPSRC) \
+       $(KERNSRC) \
+       $(PORTSRC) \
+       $(OSALSRC) \
+       $(HALSRC) \
+       $(PLATFORMSRC) \
+       $(BOARDSRC) \
+       $(TESTSRC) \
+       msp_vectors.c \
+       main.c
+
+# C++ sources 
+CPPSRC =
+
+# List ASM source files here
+ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
+
+INCDIR = $(CHIBIOS)/os/license \
+				 $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
+         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
+         $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = msp430fr5969
+
+TRGT = msp430-elf-
+CC   = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+#       runtime support makes code size explode.
+LD   = $(TRGT)gcc
+#LD   = $(TRGT)g++
+CP   = $(TRGT)objcopy
+AS   = $(TRGT)gcc -x assembler-with-cpp
+AR   = $(TRGT)ar
+OD   = $(TRGT)objdump
+SZ   = $(TRGT)size
+HEX  = $(CP) -O ihex
+BIN  = $(CP) -O binary
+
+# MSP430-specific options here
+MOPT = -m$(MODEL)
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra -Wundef
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC
+include $(RULESPATH)/rules.mk
diff --git a/testhal/MSP430X/EXP430FR5969/DMA/chconf.h b/testhal/MSP430X/EXP430FR5969/DMA/chconf.h
new file mode 100644
index 0000000..cb45526
--- /dev/null
+++ b/testhal/MSP430X/EXP430FR5969/DMA/chconf.h
@@ -0,0 +1,274 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    nilconf.h
+ * @brief   Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ *          contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#define _CHIBIOS_NIL_CONF_
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Number of user threads in the application.
+ * @note    This number is not inclusive of the idle thread which is
+ *          Implicitly handled.
+ */
+#define CH_CFG_NUM_THREADS                 1
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name System timer settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System time counter resolution.
+ * @note    Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION               16
+
+/**
+ * @brief   System tick frequency.
+ * @note    This value together with the @p CH_CFG_ST_RESOLUTION
+ *          option defines the maximum amount of time allowed for
+ *          timeouts.
+ */
+#define CH_CFG_ST_FREQUENCY                1000
+
+/**
+ * @brief   Time delta constant for the tick-less mode.
+ * @note    If this value is zero then the system uses the classic
+ *          periodic tick. This value represents the minimum number
+ *          of ticks that is safe to specify in a timeout directive.
+ *          The value one is not valid, timeouts are rounded up to
+ *          this value.
+ */
+#define CH_CFG_ST_TIMEDELTA                0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES               TRUE
+
+/**
+ * @brief   Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note    Feature not currently implemented.
+ * @note    The default is @p FALSE.
+ */
+#define CH_CFG_USE_MUTEXES                  FALSE
+
+/**
+ * @brief   Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS                   TRUE
+
+/**
+ * @brief   Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ *          included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES                TRUE
+
+/**
+ * @brief   Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE                  TRUE
+
+/**
+ * @brief   Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_HEAP                     TRUE
+
+/**
+ * @brief   Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS                 TRUE
+
+/**
+ * @brief   Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ *          then the whole available RAM is used. The core memory is made
+ *          available to the heap allocator and/or can be used directly through
+ *          the simplified core memory allocator.
+ *
+ * @note    In order to let the OS manage the whole RAM the linker script must
+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note    Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE                 0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Debug option, kernel statistics.
+ *
+ * @note    Feature not currently implemented.
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_STATISTICS                   FALSE
+
+/**
+ * @brief   Debug option, system state check.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_SYSTEM_STATE_CHECK           FALSE
+
+/**
+ * @brief   Debug option, parameters checks.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_CHECKS                FALSE
+
+/**
+ * @brief   System assertions.
+ * 
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_ASSERTS              FALSE
+
+/**
+ * @brief   Stack check.
+ * 
+ *@note     The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_STACK_CHECK          TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System initialization hook.
+ */
+#if !defined(CH_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__)
+#define CH_CFG_SYSTEM_INIT_HOOK() {                                        \
+}
+#endif
+
+/**
+ * @brief   Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXT_FIELDS                                           \
+  /* Add threads custom fields here.*/
+
+/**
+ * @brief   Threads initialization hook.
+ */
+#define CH_CFG_THREAD_EXT_INIT_HOOK(tr) {                                  \
+  /* Add custom threads initialization code here.*/                         \
+}
+
+/**
+ * @brief   Idle thread enter hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() {                                         \
+}
+
+/**
+ * @brief   Idle thread leave hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() {                                         \
+}
+
+/**
+ * @brief   System halt hook.
+ */
+#if !defined(CH_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                  \
+}
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in nilcore.h).   */
+/*===========================================================================*/
+
+#endif  /* _CHCONF_H_ */
+
+/** @} */
diff --git a/testhal/MSP430X/EXP430FR5969/DMA/halconf.h b/testhal/MSP430X/EXP430FR5969/DMA/halconf.h
new file mode 100644
index 0000000..81a620d
--- /dev/null
+++ b/testhal/MSP430X/EXP430FR5969/DMA/halconf.h
@@ -0,0 +1,388 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    templates/halconf.h
+ * @brief   HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ *          various device drivers from your application. You may also use
+ *          this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef HALCONF_H
+#define HALCONF_H
+
+#include "mcuconf.h"
+
+/**
+ * @brief   Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL                 TRUE
+#endif
+
+/**
+ * @brief   Enables the DMA subsystem.
+ */
+#if !defined(HAL_USE_DMA) || defined(__DOXYGEN__)
+#define HAL_USE_DMA                 TRUE
+#endif
+
+/**
+ * @brief   Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN                 FALSE
+#endif
+
+/**
+ * @brief   Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S                 FALSE
+#endif
+
+/**
+ * @brief   Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI             FALSE
+#endif
+
+/**
+ * @brief   Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM                 FALSE
+#endif
+
+/**
+ * @brief   Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL              TRUE
+#endif
+
+/**
+ * @brief   Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB          FALSE
+#endif
+
+/**
+ * @brief   Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI                 FALSE
+#endif
+
+/**
+ * @brief   Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART                FALSE
+#endif
+
+/**
+ * @brief   Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB                 FALSE
+#endif
+
+/**
+ * @brief   Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG                 FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT                FALSE
+#endif
+
+/**
+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE          FALSE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY           FALSE
+#endif
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS              FALSE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings.                                          */
+/*===========================================================================*/
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ *          This option is recommended also if the SPI driver does not
+ *          use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Number of initialization attempts before rejecting the card.
+ * @note    Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY              100
+#endif
+
+/**
+ * @brief   Include support for MMC cards.
+ * @note    MMC support is not yet implemented so this option must be kept
+ *          at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT             FALSE
+#endif
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings.                                           */
+/*===========================================================================*/
+
+/**
+ * @brief   Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ *          default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE      38400
+#endif
+
+/**
+ * @brief   Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ *          buffers depending on the requirements of your application.
+ * @note    The default is 16 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE         16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting.                                        */
+/*===========================================================================*/
+
+/**
+ * @brief   Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ *          the USB data endpoint maximum packet size.
+ * @note    The default is 256 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE     256
+#endif
+
+/**
+ * @brief   Serial over USB number of buffers.
+ * @note    The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER   2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT                FALSE
+#endif
+
+/**
+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings.                                             */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT               FALSE
+#endif
+
+/**
+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION   FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT                FALSE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/testhal/MSP430X/EXP430FR5969/DMA/main.c b/testhal/MSP430X/EXP430FR5969/DMA/main.c
new file mode 100644
index 0000000..96f45d0
--- /dev/null
+++ b/testhal/MSP430X/EXP430FR5969/DMA/main.c
@@ -0,0 +1,287 @@
+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#include "hal.h"
+#include "ch.h"
+#include "string.h"
+#include "hal_dma_lld.h"
+
+const char * start_msg = "\r\n\r\nExecuting DMA test suite...\r\n";
+const char * test_1_msg = "TEST 1: Word-to-word memcpy with DMA engine, no callbacks\r\n";
+const char * test_2_msg = "TEST 2: Byte-to-byte memcpy with DMA engine, no callbacks\r\n";
+const char * test_3_msg = "TEST 3: Byte-to-byte memset with DMA engine, no callbacks\r\n";
+const char * test_4_msg = "TEST 4: Word-to-word memcpy with DMA engine, with callback\r\n";
+const char * test_5_msg = "TEST 5: Claim DMA channel 0, perform a Word-to-word memcpy\r\n";
+const char * test_6_msg = "TEST 6: Attempt to claim already claimed DMA channel, fail. Release it, try to claim it again, and succeed.\r\n";
+const char * test_7_msg = "TEST 7: Claim DMA channel 1, perform a Word-to-word memcpy, and release it\r\n";
+
+const char * succeed_string = "SUCCESS\r\n\r\n";
+const char * fail_string = "FAILURE\r\n\r\n";
+
+char instring[256];  
+char outstring[256];
+msp430x_dma_req_t *request;
+uint8_t cb_arg = 1;
+
+void dma_callback_test(void* args) {
+  
+  *((uint8_t *)args) = 0;
+}
+
+msp430x_dma_req_t test_1_req = {
+    instring, /* source address */
+    outstring, /* destination address */
+    9, /* number of words */
+    MSP430X_DMA_SRCINCR | MSP430X_DMA_DSTINCR, /* address mode - dual increment */
+    MSP430X_DMA_SRCWORD | MSP430X_DMA_DSTWORD, /* word transfer */
+    MSP430X_DMA_BLOCK, /* block (and blocking) transfer */
+    DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */
+    {
+      NULL, /* no callback */
+      NULL /* no arguments */
+    }
+};
+
+msp430x_dma_req_t test_2_req = {
+    instring, /* source address */
+    outstring, /* destination address */
+    18, /* number of bytes */
+    MSP430X_DMA_SRCINCR | MSP430X_DMA_DSTINCR, /* address mode - dual increment */
+    MSP430X_DMA_SRCBYTE | MSP430X_DMA_DSTBYTE, /* byte transfer */
+    MSP430X_DMA_BLOCK, /* block (and blocking) transfer */
+    DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */
+    {
+      NULL, /* no callback */
+      NULL /* no arguments */
+    }
+};
+
+msp430x_dma_req_t test_3_req = {
+    instring, /* source address */
+    outstring, /* destination address */
+    16, /* number of words */
+    MSP430X_DMA_DSTINCR, /* address mode - dest increment only */
+    MSP430X_DMA_SRCBYTE | MSP430X_DMA_DSTBYTE, /* word transfer */
+    MSP430X_DMA_BLOCK, /* block (and blocking) transfer */
+    DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */
+    {
+      NULL, /* no callback */
+      NULL /* no arguments */
+    }
+};
+
+msp430x_dma_req_t test_4_req = {
+    instring, /* source address */
+    outstring, /* destination address */
+    9, /* number of words */
+    MSP430X_DMA_SRCINCR | MSP430X_DMA_DSTINCR, /* address mode - dual increment */
+    MSP430X_DMA_SRCWORD | MSP430X_DMA_DSTWORD, /* word transfer */
+    MSP430X_DMA_BLOCK, /* block (and blocking) transfer */
+    DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */
+    {
+      &dma_callback_test, /* test callback */
+      &cb_arg /* test arguments */
+    }
+};
+
+msp430x_dma_req_t test_5_req = {
+    instring, /* source address */
+    outstring, /* destination address */
+    9, /* number of words */
+    MSP430X_DMA_SRCINCR | MSP430X_DMA_DSTINCR, /* address mode - dual increment */
+    MSP430X_DMA_SRCWORD | MSP430X_DMA_DSTWORD, /* word transfer */
+    MSP430X_DMA_BLOCK, /* block (and blocking) transfer */
+    DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */
+    {
+      NULL, /* no callback */
+      NULL /* no arguments */
+    }
+};
+
+msp430x_dma_ch_t ch = {
+    NULL,
+    NULL,
+    NULL
+};
+
+/*
+ * Thread 2.
+ */
+THD_WORKING_AREA(waThread1, 2048);
+THD_FUNCTION(Thread1, arg) {
+    
+  (void)arg;
+
+  /*
+   * Activate the serial driver 0 using the driver default configuration.
+   */
+  sdStart(&SD0, NULL);
+
+  while (chnGetTimeout(&SD0, TIME_INFINITE)) {
+    chnWrite(&SD0, (const uint8_t *)start_msg, strlen(start_msg));
+    chThdSleepMilliseconds(2000);
+    
+    /* Test 1 - use DMA engine to execute a word-wise memory-to-memory copy. */
+    chnWrite(&SD0, (const uint8_t *)test_1_msg, strlen(test_1_msg));
+    strcpy( instring,  "After DMA test  \r\n" );
+    strcpy( outstring, "Before DMA test \r\n");
+    if (strcmp("Before DMA test \r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    request = &test_1_req;
+    dmaRequest(request, TIME_INFINITE);
+    if (strcmp("After DMA test  \r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    else {
+      chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
+    }
+    
+    /* Test 2 - use DMA engine to execute a byte-wise memory-to-memory copy. */
+    chnWrite(&SD0, (const uint8_t *)test_2_msg, strlen(test_2_msg));
+    strcpy( instring,  "After DMA test  \r\n" );
+    strcpy( outstring, "Before DMA test \r\n");
+    if (strcmp("Before DMA test \r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    request = &test_2_req;
+    dmaRequest(request, TIME_INFINITE);
+    if (strcmp("After DMA test  \r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    else {
+      chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
+    }
+    
+    /* Test 3 - use DMA engine to execute a word-wise memory-to-memory set. */
+    chnWrite(&SD0, (const uint8_t *)test_3_msg, strlen(test_3_msg));
+    strcpy( instring,  "After DMA test  \r\n" );
+    strcpy( outstring, "Before DMA test \r\n");
+    if (strcmp("Before DMA test \r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    request = &test_3_req;
+    dmaRequest(request, TIME_INFINITE);
+    if (strcmp("AAAAAAAAAAAAAAAA\r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    else {
+      chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
+    }
+    
+    /* Test 4 - use DMA engine to execute a word-wise memory-to-memory copy, 
+     * then call a callback. */
+    chnWrite(&SD0, (const uint8_t *)test_4_msg, strlen(test_4_msg));
+    strcpy( instring,  "After DMA test  \r\n" );
+    strcpy( outstring, "Before DMA test \r\n");
+    if (strcmp("Before DMA test \r\n", outstring) || (cb_arg != 1)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    request = &test_4_req;
+    dmaRequest(request, TIME_INFINITE);
+    if (strcmp("After DMA test  \r\n", outstring) || cb_arg) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    else {
+      chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
+    }
+    
+    /* Test 5 - use exclusive DMA channel 0 to execute a word-wise memory-to-memory copy. */
+    chnWrite(&SD0, (const uint8_t *)test_5_msg, strlen(test_5_msg));
+    strcpy( instring,  "After DMA test  \r\n" );
+    strcpy( outstring, "Before DMA test \r\n");
+    if (strcmp("Before DMA test \r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    request = &test_5_req;
+    dmaAcquire(&ch, 0);
+    dmaTransfer(&ch, request);
+    if (strcmp("After DMA test  \r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    else {
+      chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
+    }
+    
+    /* Test 6 - Attempt to claim DMA channel 0, fail, release it, attempt to claim it again */
+    chnWrite(&SD0, (const uint8_t *)test_6_msg, strlen(test_6_msg));
+    if (!dmaAcquire(&ch, 0)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    dmaRelease(&ch);
+    if (dmaAcquire(&ch, 0)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    else {
+      chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
+    }
+    dmaRelease(&ch);
+    
+    /* Test 7 - use exclusive DMA channel 1 to execute a word-wise memory-to-memory copy. */
+    chnWrite(&SD0, (const uint8_t *)test_7_msg, strlen(test_7_msg));
+    strcpy( instring,  "After DMA test  \r\n" );
+    strcpy( outstring, "Before DMA test \r\n");
+    if (strcmp("Before DMA test \r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    request = &test_5_req;
+    dmaAcquire(&ch, 1);
+    dmaTransfer(&ch, request);
+    if (strcmp("After DMA test  \r\n", outstring)) {
+      chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+    }
+    else {
+      chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
+    }
+    dmaRelease(&ch);
+  }
+}
+
+
+/*
+ * Threads static table, one entry per thread. The number of entries must
+ * match NIL_CFG_NUM_THREADS.
+ */
+THD_TABLE_BEGIN
+  THD_TABLE_ENTRY(waThread1, "dma_test", Thread1, NULL)
+THD_TABLE_END
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+  /*
+   * System initializations.
+   * - HAL initialization, this also initializes the configured device drivers
+   *   and performs the board-specific initializations.
+   * - Kernel initialization, the main() function becomes a thread and the
+   *   RTOS is active.
+   */
+  WDTCTL = WDTPW | WDTHOLD;
+  
+
+  halInit();
+  chSysInit();
+  dmaInit();
+  
+  /* This is now the idle thread loop, you may perform here a low priority
+     task but you must never try to sleep or wait in this loop. Note that
+     this tasks runs at the lowest priority level so any instruction added
+     here will be executed after all other tasks have been started.*/
+  while (true) {
+  }
+}
diff --git a/testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h b/testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h
new file mode 100644
index 0000000..f47ee12
--- /dev/null
+++ b/testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h
@@ -0,0 +1,55 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+/*
+ * MSP430X drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the driver
+ * is enabled in halconf.h.
+ * 
+ */
+
+#define MSP430X_MCUCONF
+
+/* HAL driver system settings */
+#define MSP430X_ACLK_SRC MSP430X_VLOCLK
+#define MSP430X_LFXTCLK_FREQ 0
+#define MSP430X_HFXTCLK_FREQ 0
+#define MSP430X_DCOCLK_FREQ 8000000
+#define MSP430X_MCLK_DIV 1
+#define MSP430X_SMCLK_DIV 32
+
+/*
+ * SERIAL driver system settings.
+ */
+#define MSP430X_SERIAL_USE_USART0         TRUE
+#define MSP430X_USART0_CLK_SRC            MSP430X_SMCLK_SRC
+#define MSP430X_SERIAL_USE_USART1         FALSE
+#define MSP430X_SERIAL_USE_USART2         FALSE
+#define MSP430X_SERIAL_USE_USART3         FALSE
+
+/*
+ * ST driver system settings.
+ */
+#define MSP430X_ST_CLK_SRC MSP430X_SMCLK_SRC
+#define MSP430X_ST_TIMER_TYPE B
+#define MSP430X_ST_TIMER_INDEX 0
+
+#endif /* _MCUCONF_H_ */
diff --git a/testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c b/testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c
new file mode 100644
index 0000000..8968fb9
--- /dev/null
+++ b/testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c
@@ -0,0 +1,316 @@
+#include <msp430.h>
+
+__attribute__((interrupt(1)))
+void Vector1(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(2)))
+void Vector2(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(3)))
+void Vector3(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(4)))
+void Vector4(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(5)))
+void Vector5(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(6)))
+void Vector6(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(7)))
+void Vector7(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(8)))
+void Vector8(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(9)))
+void Vector9(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(10)))
+void Vector10(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(11)))
+void Vector11(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(12)))
+void Vector12(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(13)))
+void Vector13(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(14)))
+void Vector14(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(15)))
+void Vector15(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(16)))
+void Vector16(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(17)))
+void Vector17(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(18)))
+void Vector18(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(19)))
+void Vector19(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(20)))
+void Vector20(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(21)))
+void Vector21(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(22)))
+void Vector22(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(23)))
+void Vector23(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(24)))
+void Vector24(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(25)))
+void Vector25(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(26)))
+void Vector26(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(27)))
+void Vector27(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(28)))
+void Vector28(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(29)))
+void Vector29(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(30)))
+void Vector30(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(31)))
+void Vector31(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(32)))
+void Vector32(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(33)))
+void Vector33(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(34)))
+void Vector34(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(35)))
+void Vector35(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(36)))
+void Vector36(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(37)))
+void Vector37(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(38)))
+void Vector38(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(39)))
+void Vector39(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(40)))
+void Vector40(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(41)))
+void Vector41(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(42)))
+void Vector42(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(44)))
+void Vector44(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(45)))
+void Vector45(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(46)))
+void Vector46(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(47)))
+void Vector47(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(48)))
+void Vector48(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(50)))
+void Vector50(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(51)))
+void Vector51(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(53)))
+void Vector53(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(54)))
+void Vector54(void) {
+
+  while (1) {
+  }
+}
+__attribute__((interrupt(55)))
+void Vector55(void) {
+
+  while (1) {
+  }
+}
+
+
-- 
cgit v1.2.3