avr/qmk/ChibiOS-Contrib - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
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*	[Comp] Adding interrupt functions, updating example.	Fabien Poussin	2017-02-09	2	-2/+200
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*	[Comp] Adding support for STM32F0.	Fabien Poussin	2017-02-07	1	-1/+7
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*	[Comp] Adding more defines	Fabien Poussin	2017-02-07	1	-0/+45
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*	[Comp] Adding init, helper defines.	Fabien Poussin	2017-02-07	1	-0/+94
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*	[Comp] Cleaning example, removing dependencies and adding checks.	Fabien Poussin	2017-02-07	2	-138/+134
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*	[COMP] Fixing headers, missing includes.	Fabien Poussin	2017-02-07	1	-5/+5
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*	Adding COMP Driver.	Fabien Poussin	2017-02-06	3	-0/+665
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*	[Timcap/Eeprom] Removing ch.h dependencies.	Fabien Poussin	2017-02-06	2	-2/+0
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*	[STM32, NAND] Fixed #elif without expression	barthess	2017-01-24	1	-2/+1
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*	FSMC NAND improvements.	barthess	2017-01-17	3	-65/+140
\| \| \| \| \|	1) Implemented 16 bit bus width support 2) Added workaround errata in STM32
*	Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib	barthess	2017-01-06	4	-19/+33
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\| *	Merge pull request #107 from pl4nkton/stm32_fixes	Fabien Poussin	2017-01-04	4	-19/+33
\| \|\ \| \| \| \| \| \|	Stm32 fixes
\| \| *	STM32: fix USB HOST HS when cpu is in sleep mode	Nicolas Reinecke	2016-12-05	1	-1/+2
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\| \| *	change qei types to int16_t	Peter	2016-12-05	1	-1/+1
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\| \| *	usbh: add otg stepping 2 code	Nicolas Reinecke	2016-12-05	2	-0/+12
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\| \| *	usbh: cleanup	Nicolas Reinecke	2016-12-05	3	-17/+18
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* \| \|	NAND. Added reset function.	barthess	2017-01-06	2	-8/+21
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* /	FSMC. Sync mode improvements.	barthess	2016-12-09	1	-2/+8
\|/ \| \| \| \| \| \|	1) Control registers writes reordered in init sequence to eliminate incorrect output clock frequnency in short period after CCLKEN bit set and B(W)TR registers set. 2) Added reset of CCLEN bit in stop procedure.
*	whitespace	Nicolas Reinecke	2016-11-08	1	-8/+8
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*	add STM32F7 FMC write FIFO disable bit	Nicolas Reinecke	2016-11-08	1	-0/+3
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*	STM32 CRC : Fix asserts	Kimmo Lindholm	2016-11-05	1	-6/+6
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*	Updated include guards	barthess	2016-10-17	19	-47/+47
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*	[STM32 NAND] Code cleanup.	barthess	2016-08-18	1	-3/+4
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*	[STM32 NAND] Deleted ugly hack with EXTI interrupt instead of NAND one	barthess	2016-08-16	4	-45/+5
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*	[STM32 NAND] Deleted unused defines.	barthess	2016-08-16	1	-9/+0
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*	Added room for STM32F7x	barthess	2016-07-14	3	-6/+26
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*	added qeiAdjustI. added new field and checking in STM32	Stephane D'Alu	2016-07-07	2	-0/+69
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*	qei driver: fix potential overflow in qeiUpdateI	Nicolas Reinecke	2016-05-15	1	-1/+1
\| \| \| \| \|	when quiUpdate isn't called for while an cnt(uint16_t) is above 32767 delta(int16_t) can overflow.
*	qei driver: change copyright	Nicolas Reinecke	2016-05-15	2	-4/+4
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*	add STM32 qei (quadrature encoder interface) driver	Nicolas Reinecke	2016-05-08	6	-1/+645
\| \| \| \| \| \| \|	Code from tinito in forum thread: http://forum.chibios.org/phpbb/viewtopic.php?f=14&t=685 Updated to chibios trunk.
*	f4 platform.mk: reoder hardware	Nicolas Reinecke	2016-05-01	1	-5/+5
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*	fix whitespace	Nicolas Reinecke	2016-05-01	1	-3/+3
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*	FSMC: fix build on stm32f1x and stm32f3	Nicolas Reinecke	2016-04-29	1	-0/+4
\| \| \| \|	STM32F1,3 has no fsmc reset function so make it optional
*	add stm32f1xx port	Nicolas Reinecke	2016-04-28	1	-0/+14
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*	STM32 mass update to current naming convention in ChibiOS	barthess	2016-04-07	24	-11030/+11030
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*	NAND. Cosmetical improvement	barthess	2016-03-17	1	-5/+7
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*	Updated some testhal projects to new ChibiOS code	barthess	2016-03-15	3	-8/+2
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*	TIMCAP: Initial commit	Fabien Poussin	2016-02-16	5	-4/+1226
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*	USB-Host: Initial commit	Fabien Poussin	2016-02-15	4	-0/+2688
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*	Fixed typo	barthess	2015-10-14	4	-4/+4
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*	FSMC code cleanup	barthess	2015-10-14	12	-22/+14
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*	Changed the way files are included to a more convenient way.	Fabien Poussin	2015-08-20	2	-15/+15
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*	Add CRC Driver	Michael Spradling	2015-08-16	3	-0/+583
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This patch includes a high level and two low level drivers. The high level driver is enabled with flag HAL_USE_CRC The low level drivers include: * Hardware CRC for the STM32 cortex processor lines.(when supported) * Enabled with flag STM32_CRC_USE_CRC1 * DMA is enabled with CRC_USE_DMA * SYNC api will use DMA, but put calling thread to sleep * ASYNC api enabled. * DMA Disabled * SYNC api spin while calculating CRC * ASYNC api disabled * Software CRC (3 modes) * CRCSW_CRC32_TABLE - Enables crc32 with lookup table. * CRCSW_CRC16_TABLE - Enables crc16 with lookup tables. * CRCSW_PROGRAMMBLE - Enables any crc done with computation. * Can calculate any crc configuration. * CRC_USE_DMA obviously not support with software CRC
*	Improved FSMC.	barthess	2015-08-04	3	-16/+32
\| \| \| \|	SRAM configuration is much more flexible now.
*	Removed dependency on ST library for SDRAM	Andrea Zoppi	2015-06-28	2	-5/+5
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*	Minor changes	Andrea Zoppi	2015-06-27	4	-229/+234
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*	Old definitions removed	Andrea Zoppi	2015-06-27	3	-61/+1
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*	LTDC and DMA2D ported to ChibiOS/RT 3	TexZK	2015-06-24	5	-2/+8383
\| \| \| \| \|	+ LTDC and DMA2D peripheral drivers + LTDC and DMA2D demo project
*	EICU. Fixed incorrect frequency calculation.	barthess	2015-06-02	1	-2/+2
\| \| \| \| \|	Timers 9, 10, 11 connected to APB2 but constant in driver initialization code was taken for APB1.
*	Fixed copypaste error in comment	barthess	2015-06-02	1	-1/+1
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