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-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/.cproject2
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/.project4
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/.settings/org.eclipse.cdt.core.prefs6
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/SEGGER_RTT_Conf.h123
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/SEGGER_SYSVIEW_Conf.h174
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/chconf.h2
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/halconf.h4
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/main.c11
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/mcuconf.h22
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/usbh_additional_class_drivers.h2
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.c2
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.h2
12 files changed, 334 insertions, 20 deletions
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/.cproject b/testhal/STM32/STM32F4xx/USB_HOST/.cproject
index d733e39..8d56b51 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/.cproject
+++ b/testhal/STM32/STM32F4xx/USB_HOST/.cproject
@@ -14,7 +14,7 @@
</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
- <configuration buildProperties="" description="" id="0.1003150841" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+ <configuration buildProperties="" description="" id="0.1003150841" name="Default" optionalBuildProperties="" parent="org.eclipse.cdt.build.core.prefbase.cfg">
<folderInfo id="0.1003150841." name="/" resourcePath="">
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.748316353" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.748316353.81353447" name=""/>
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/.project b/testhal/STM32/STM32F4xx/USB_HOST/.project
index 066a4d6..8db459b 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/.project
+++ b/testhal/STM32/STM32F4xx/USB_HOST/.project
@@ -31,9 +31,9 @@
<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/ChibiOS-contrib/os</locationURI>
</link>
<link>
- <name>ChibiOS-RT-os</name>
+ <name>ChibiOS-RT</name>
<type>2</type>
- <locationURI>$%7BPARENT-5-PROJECT_LOC%7D/ChibiOS-RT/os</locationURI>
+ <locationURI>$%7BPARENT-5-PROJECT_LOC%7D/ChibiOS</locationURI>
</link>
</linkedResources>
</projectDescription>
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/.settings/org.eclipse.cdt.core.prefs b/testhal/STM32/STM32F4xx/USB_HOST/.settings/org.eclipse.cdt.core.prefs
new file mode 100644
index 0000000..8ae48ef
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/.settings/org.eclipse.cdt.core.prefs
@@ -0,0 +1,6 @@
+eclipse.preferences.version=1
+environment/project/0.1003150841/PATH/delimiter=;
+environment/project/0.1003150841/PATH/operation=replace
+environment/project/0.1003150841/PATH/value=${PATH};D\:\\toolchains\\gcc-arm-none-eabi-8-2018-q4-major-win32\\bin;${PATH};D\:\\toolchains\\gcc-arm-none-eabi-4_9-2014q4-20141203-win32\\bin;D\:\\toolchains\\msys64\\usr\\bin
+environment/project/0.1003150841/append=true
+environment/project/0.1003150841/appendContributed=true
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/SEGGER_RTT_Conf.h b/testhal/STM32/STM32F4xx/USB_HOST/SEGGER_RTT_Conf.h
new file mode 100644
index 0000000..5aa7a69
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/SEGGER_RTT_Conf.h
@@ -0,0 +1,123 @@
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* The Embedded Experts *
+**********************************************************************
+* *
+* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER RTT * Real Time Transfer for embedded targets *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+* *
+* RTT version: 6.44i *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : SEGGER_RTT_Conf.h
+Purpose : Implementation of SEGGER real-time transfer (RTT) which
+ allows real-time communication on targets which support
+ debugger memory accesses while the CPU is running.
+Revision: $Rev: 13430 $
+
+*/
+
+#ifndef SEGGER_RTT_CONF_H
+#define SEGGER_RTT_CONF_H
+
+#ifdef __IAR_SYSTEMS_ICC__
+ #include <intrinsics.h>
+#endif
+
+/*********************************************************************
+*
+* Defines, configurable
+*
+**********************************************************************
+*/
+
+#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (2) // Max. number of up-buffers (T->H) available on this target (Default: 3)
+#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (2) // Max. number of down-buffers (H->T) available on this target (Default: 3)
+
+#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
+#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
+
+#define SEGGER_RTT_PRINTF_BUFFER_SIZE (128u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
+
+#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
+
+/*********************************************************************
+*
+* RTT memcpy configuration
+*
+* memcpy() is good for large amounts of data,
+* but the overhead is big for small amounts, which are usually stored via RTT.
+* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
+*
+* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
+* This is may be required with memory access restrictions,
+* such as on Cortex-A devices with MMU.
+*/
+#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
+//
+// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
+//
+//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
+// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
+//#endif
+
+//
+// Target is not allowed to perform other RTT operations while string still has not been stored completely.
+// Otherwise we would probably end up with a mixed string in the buffer.
+// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
+#if !defined(SEGGER_RTT_ASM)
+#include "ch.h"
+#define SEGGER_RTT_LOCK() do { \
+ syssts_t LockState = chSysGetStatusAndLockX()
+#define SEGGER_RTT_UNLOCK() chSysRestoreStatusX(LockState); \
+ } while(0)
+#endif
+#endif
+/*************************** End of file ****************************/
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/SEGGER_SYSVIEW_Conf.h b/testhal/STM32/STM32F4xx/USB_HOST/SEGGER_SYSVIEW_Conf.h
new file mode 100644
index 0000000..69a0dbc
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/SEGGER_SYSVIEW_Conf.h
@@ -0,0 +1,174 @@
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* The Embedded Experts *
+**********************************************************************
+* *
+* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER SystemView * Real-time application analysis *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+* *
+* SystemView version: V2.52h *
+* *
+**********************************************************************
+-------------------------- END-OF-HEADER -----------------------------
+
+File : SEGGER_SYSVIEW_Conf.h
+Purpose : SEGGER SystemView configuration.
+Revision: $Rev: 13453 $
+*/
+
+#ifndef SEGGER_SYSVIEW_CONF_H
+#define SEGGER_SYSVIEW_CONF_H
+
+/*********************************************************************
+*
+* Defines, fixed
+*
+**********************************************************************
+*/
+//
+// Constants for known core configuration
+//
+#define SEGGER_SYSVIEW_CORE_OTHER 0
+#define SEGGER_SYSVIEW_CORE_CM0 1 // Cortex-M0/M0+/M1
+#define SEGGER_SYSVIEW_CORE_CM3 2 // Cortex-M3/M4/M7
+#define SEGGER_SYSVIEW_CORE_RX 3 // Renesas RX
+
+#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__) || (defined __clang__)
+ #if (defined __ARM_ARCH_6M__) || (defined __ARM_ARCH_8M_BASE__)
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+ #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+ #endif
+#elif defined(__ICCARM__)
+ #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+ #elif ((defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+ #endif
+#elif defined(__CC_ARM)
+ #if (defined(__TARGET_ARCH_6S_M))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+ #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+ #endif
+#elif defined(__TI_ARM__)
+ #ifdef __TI_ARM_V6M0__
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+ #elif (defined(__TI_ARM_V7M3__) || defined(__TI_ARM_V7M4__))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+ #endif
+#elif defined(__ICCRX__)
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
+#elif defined(__RX)
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
+#endif
+
+#ifndef SEGGER_SYSVIEW_CORE
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_OTHER
+#endif
+
+/*********************************************************************
+*
+* Defines, configurable
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* SystemView buffer configuration
+*/
+#define SEGGER_SYSVIEW_RTT_BUFFER_SIZE 65536 // Number of bytes that SystemView uses for the buffer.
+#define SEGGER_SYSVIEW_RTT_CHANNEL 1 // The RTT channel that SystemView will use. 0: Auto selection
+
+#define SEGGER_SYSVIEW_USE_STATIC_BUFFER 1 // Use a static buffer to generate events instead of a buffer on the stack
+
+#define SEGGER_SYSVIEW_POST_MORTEM_MODE 0 // 1: Enable post mortem analysis mode
+
+/*********************************************************************
+*
+* SystemView timestamp configuration
+*/
+#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
+ #define SEGGER_SYSVIEW_GET_TIMESTAMP() (*(U32 *)(0xE0001004)) // Retrieve a system timestamp. Cortex-M cycle counter.
+ #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by clock source
+#else
+ #define SEGGER_SYSVIEW_GET_TIMESTAMP() SEGGER_SYSVIEW_X_GetTimestamp() // Retrieve a system timestamp via user-defined function
+ #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by SEGGER_SYSVIEW_X_GetTimestamp()
+#endif
+
+/*********************************************************************
+*
+* SystemView Id configuration
+*/
+#define SEGGER_SYSVIEW_ID_BASE 0x20000000 // Default value for the lowest Id reported by the application. Can be overridden by the application via SEGGER_SYSVIEW_SetRAMBase(). (i.e. 0x20000000 when all Ids are an address in this RAM)
+#define SEGGER_SYSVIEW_ID_SHIFT 2 // Number of bits to shift the Id to save bandwidth. (i.e. 2 when Ids are 4 byte aligned)
+
+/*********************************************************************
+*
+* SystemView interrupt configuration
+*/
+#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x1FF) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[8:0] = active vector)
+#elif SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM0
+ #if defined(__ICCARM__)
+ #if (__VER__ > 6100000)
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() (__get_IPSR()) // Workaround for IAR, which might do a byte-access to 0xE000ED04. Read IPSR instead.
+ #else
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Older versions of IAR do not include __get_IPSR, but might also not optimize to byte-access.
+ #endif
+ #else
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[5:0] = active vector)
+ #endif
+#else
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() SEGGER_SYSVIEW_X_GetInterruptId() // Get the currently active interrupt Id from the user-provided function.
+#endif
+
+#endif // SEGGER_SYSVIEW_CONF_H
+
+/*************************** End of file ****************************/
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/chconf.h b/testhal/STM32/STM32F4xx/USB_HOST/chconf.h
index f26baa0..12c6673 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/chconf.h
+++ b/testhal/STM32/STM32F4xx/USB_HOST/chconf.h
@@ -524,7 +524,7 @@
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
*/
#if !defined(CH_DBG_TRACE_MASK)
-#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
#endif
/**
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/halconf.h b/testhal/STM32/STM32F4xx/USB_HOST/halconf.h
index 6b1255e..4a6fcc5 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/halconf.h
+++ b/testhal/STM32/STM32F4xx/USB_HOST/halconf.h
@@ -394,7 +394,7 @@
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE 38400
+#define SERIAL_DEFAULT_BITRATE 115200
#endif
/**
@@ -405,7 +405,7 @@
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE 16
+#define SERIAL_BUFFERS_SIZE 64
#endif
/*===========================================================================*/
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/main.c b/testhal/STM32/STM32F4xx/USB_HOST/main.c
index c540233..c88880b 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/main.c
+++ b/testhal/STM32/STM32F4xx/USB_HOST/main.c
@@ -297,6 +297,7 @@ start:
#if HAL_USBH_USE_MSD
#include "usbh/dev/msd.h"
#include "ff.h"
+#include "fatfs_devices.h"
static FATFS MSDLUN0FS;
@@ -388,14 +389,14 @@ start:
usbDbgPuts("FS: Block driver ready, try mount...");
- res = f_mount(&MSDLUN0FS, "0:", 1);
+ res = f_mount(&MSDLUN0FS, FATFSDEV_MSD_DRIVE, 1);
if (res != FR_OK) {
usbDbgPuts("FS: Can't mount. Check file system.");
continue;
}
usbDbgPuts("FS: Mounted.");
- res = f_getfree("0:", &clusters, &fsp);
+ res = f_getfree(FATFSDEV_MSD_DRIVE, &clusters, &fsp);
if (res != FR_OK) {
usbDbgPuts("FS: f_getfree() failed");
continue;
@@ -419,7 +420,7 @@ start:
//write test
if (1) {
usbDbgPuts("FS: Write test (create file /test.dat, 1MB)");
- f_open(&file, "/test.dat", FA_CREATE_ALWAYS | FA_WRITE);
+ f_open(&file, FATFSDEV_MSD_DRIVE "/test.dat", FA_CREATE_ALWAYS | FA_WRITE);
src = start;
st = chVTGetSystemTime();
for (j = 0; j < 2048; j++) {
@@ -439,7 +440,7 @@ start:
//read test
if (1) {
usbDbgPuts("FS: Read test (read file /test.dat, 1MB, compare)");
- f_open(&file, "/test.dat", FA_READ);
+ f_open(&file, FATFSDEV_MSD_DRIVE "/test.dat", FA_READ);
src = start;
st = chVTGetSystemTime();
for (j = 0; j < 2048; j++) {
@@ -463,7 +464,7 @@ start:
//scan files test
if (1) {
usbDbgPuts("FS: Scan files test");
- fbuff[0] = 0;
+ strcpy((char *)fbuff, FATFSDEV_MSD_DRIVE);
scan_files(chp, (char *)fbuff);
}
}
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/mcuconf.h b/testhal/STM32/STM32F4xx/USB_HOST/mcuconf.h
index 51be912..668ec41 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/mcuconf.h
+++ b/testhal/STM32/STM32F4xx/USB_HOST/mcuconf.h
@@ -32,11 +32,18 @@
*/
#define STM32F4xx_MCUCONF
+#define STM32F405_MCUCONF
+#define STM32F415_MCUCONF
+#define STM32F407_MCUCONF
+#define STM32F417_MCUCONF
/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
+#define STM32_BKPRAM_ENABLE FALSE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -60,9 +67,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_PVD_ENABLE FALSE
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_BKPRAM_ENABLE FALSE
/*
* IRQ system settings.
@@ -234,6 +238,14 @@
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_PRESA_VALUE 32
+#define STM32_RTC_PRESS_VALUE 1024
+#define STM32_RTC_CR_INIT 0
+#define STM32_RTC_TAMPCR_INIT 0
+
+/*
* SDC driver system settings.
*/
#define STM32_SDC_SDIO_DMA_PRIORITY 3
@@ -330,9 +342,7 @@
#define STM32_USB_OTG2_IRQ_PRIORITY 14
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
-#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
-#define STM32_USB_OTG_THREAD_STACK_SIZE 128
-#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
+#define STM32_USB_HOST_WAKEUP_DURATION 2
/*
* WDG driver system settings.
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/usbh_additional_class_drivers.h b/testhal/STM32/STM32F4xx/USB_HOST/usbh_additional_class_drivers.h
index ac9fc18..9a1a37c 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/usbh_additional_class_drivers.h
+++ b/testhal/STM32/STM32F4xx/USB_HOST/usbh_additional_class_drivers.h
@@ -1,6 +1,6 @@
/*
ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
- Copyright (C) 2015..2017 Diego Ismirlian, (dismirlian (at) google's mail)
+ Copyright (C) 2015..2019 Diego Ismirlian, (dismirlian(at)google's mail)
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.c b/testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.c
index 4585a5c..b0b5560 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.c
+++ b/testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.c
@@ -1,6 +1,6 @@
/*
ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
- Copyright (C) 2015..2017 Diego Ismirlian, (dismirlian (at) google's mail)
+ Copyright (C) 2015..2019 Diego Ismirlian, (dismirlian(at)google's mail)
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.h b/testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.h
index 3f00fe7..c848fc2 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.h
+++ b/testhal/STM32/STM32F4xx/USB_HOST/usbh_custom_class_example.h
@@ -1,6 +1,6 @@
/*
ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
- Copyright (C) 2015..2017 Diego Ismirlian, (dismirlian (at) google's mail)
+ Copyright (C) 2015..2019 Diego Ismirlian, (dismirlian(at)google's mail)
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.