diff options
Diffstat (limited to 'os/hal/boards')
| -rw-r--r-- | os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h | 18 | ||||
| -rw-r--r-- | os/hal/boards/NRF51-DK/board.h | 30 | ||||
| -rw-r--r-- | os/hal/boards/NRF51-DK/board.mk | 2 | ||||
| -rw-r--r-- | os/hal/boards/NRF52-DK/board.c | 81 | ||||
| -rw-r--r-- | os/hal/boards/NRF52-DK/board.h | 201 | ||||
| -rw-r--r-- | os/hal/boards/NRF52-DK/board.mk | 12 | ||||
| -rw-r--r-- | os/hal/boards/WVSHARE_BLE400/board.h | 30 |
7 files changed, 359 insertions, 15 deletions
diff --git a/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h b/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h index 05aeceb..0788eb7 100644 --- a/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h +++ b/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h @@ -587,19 +587,14 @@ PIN_OSPEED_100M(GPIOD_MEM_D0) | \ PIN_OSPEED_100M(GPIOD_MEM_D1)) -#if STM32_NAND_USE_EXT_INT -#define NAND_RB_NWAIT_PUPDR(pin) (PIN_PUPDR_PULLUP(pin)) -#else -#define NAND_RB_NWAIT_PUPDR(pin) (PIN_PUPDR_FLOATING(pin)) -#endif #define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(GPIOD_MEM_D2) | \ PIN_PUPDR_FLOATING(GPIOD_MEM_D3) | \ PIN_PUPDR_FLOATING(GPIOD_PIN2) | \ PIN_PUPDR_FLOATING(GPIOD_PIN3) | \ PIN_PUPDR_FLOATING(GPIOD_MEM_OE) | \ PIN_PUPDR_FLOATING(GPIOD_MEM_WE) | \ - NAND_RB_NWAIT_PUPDR(GPIOD_NAND_RB_NWAIT) | \ - PIN_PUPDR_PULLUP(GPIOD_NAND_CE1) | \ + PIN_PUPDR_FLOATING(GPIOD_NAND_RB_NWAIT) |\ + PIN_PUPDR_PULLUP(GPIOD_NAND_CE1) | \ PIN_PUPDR_FLOATING(GPIOD_MEM_D13) | \ PIN_PUPDR_FLOATING(GPIOD_MEM_D14) | \ PIN_PUPDR_FLOATING(GPIOD_MEM_D15) | \ @@ -893,21 +888,16 @@ PIN_OSPEED_100M(GPIOG_PIN14) | \ PIN_OSPEED_100M(GPIOG_PIN15)) -#if STM32_NAND_USE_EXT_INT -#define NAND_RB1_PUPDR(pin) (PIN_PUPDR_FLOATING(pin)) -#else -#define NAND_RB1_PUPDR(pin) (PIN_PUPDR_PULLUP(pin)) -#endif #define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_MEM_A10) | \ PIN_PUPDR_FLOATING(GPIOG_MEM_A11) | \ PIN_PUPDR_FLOATING(GPIOG_MEM_A12) | \ PIN_PUPDR_FLOATING(GPIOG_MEM_A13) | \ PIN_PUPDR_FLOATING(GPIOG_MEM_A14) | \ PIN_PUPDR_FLOATING(GPIOG_MEM_A15) | \ - NAND_RB1_PUPDR(GPIOG_NAND_RB1) | \ + PIN_PUPDR_PULLUP(GPIOG_NAND_RB1) | \ PIN_PUPDR_FLOATING(GPIOG_NAND_RB2) | \ PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOG_NAND_CE2) | \ + PIN_PUPDR_PULLUP(GPIOG_NAND_CE2) | \ PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ PIN_PUPDR_FLOATING(GPIOG_SRAM_CS1) | \ diff --git a/os/hal/boards/NRF51-DK/board.h b/os/hal/boards/NRF51-DK/board.h index e47240b..67e1724 100644 --- a/os/hal/boards/NRF51-DK/board.h +++ b/os/hal/boards/NRF51-DK/board.h @@ -44,6 +44,16 @@ #define SPI_SS 24 #define I2C_SCL 7 #define I2C_SDA 30 +#define AIN0 26 +#define AIN1 27 +#define AIN2 1 +#define AIN3 2 +#define AIN4 3 +#define AIN5 4 +#define AIN6 5 +#define AIN7 6 +#define AREF0 0 +#define AREF1 6 /* * IO pins assignments. @@ -72,6 +82,16 @@ #define IOPORT1_A3 4U #define IOPORT1_A4 5U #define IOPORT1_A5 6U +#define IOPORT1_AIN0 26U +#define IOPORT1_AIN1 27U +#define IOPORT1_AIN2 1U +#define IOPORT1_AIN3 2U +#define IOPORT1_AIN4 3U +#define IOPORT1_AIN5 4U +#define IOPORT1_AIN6 5U +#define IOPORT1_AIN7 6U +#define IOPORT1_AREF0 0U +#define IOPORT1_AREF1 6U /* * IO lines assignments. @@ -100,6 +120,16 @@ #define LINE_A3 PAL_LINE(IOPORT1, IOPORT1_A3) #define LINE_A4 PAL_LINE(IOPORT1, IOPORT1_A4) #define LINE_A5 PAL_LINE(IOPORT1, IOPORT1_A5) +#define LINE_AIN0 PAL_LINE(IOPORT1, IOPORT1_AIN0) +#define LINE_AIN1 PAL_LINE(IOPORT1, IOPORT1_AIN1) +#define LINE_AIN2 PAL_LINE(IOPORT1, IOPORT1_AIN2) +#define LINE_AIN3 PAL_LINE(IOPORT1, IOPORT1_AIN3) +#define LINE_AIN4 PAL_LINE(IOPORT1, IOPORT1_AIN4) +#define LINE_AIN5 PAL_LINE(IOPORT1, IOPORT1_AIN5) +#define LINE_AIN6 PAL_LINE(IOPORT1, IOPORT1_AIN6) +#define LINE_AIN7 PAL_LINE(IOPORT1, IOPORT1_AIN7) +#define LINE_AREF0 PAL_LINE(IOPORT1, IOPORT1_AREF0) +#define LINE_AREF1 PAL_LINE(IOPORT1, IOPORT1_AREF1) #if !defined(_FROM_ASM_) diff --git a/os/hal/boards/NRF51-DK/board.mk b/os/hal/boards/NRF51-DK/board.mk index 9619bd4..631927b 100644 --- a/os/hal/boards/NRF51-DK/board.mk +++ b/os/hal/boards/NRF51-DK/board.mk @@ -8,4 +8,4 @@ BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF51-DK JLINK_DEVICE = nrf51422 JLINK_PRE_FLASH = w4 4001e504 1 JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100 - +JLINK_PIN_RESET = w4 40000544 1 diff --git a/os/hal/boards/NRF52-DK/board.c b/os/hal/boards/NRF52-DK/board.c new file mode 100644 index 0000000..cfbf24d --- /dev/null +++ b/os/hal/boards/NRF52-DK/board.c @@ -0,0 +1,81 @@ +/* + Copyright (C) 2016 Stéphane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" + +#if HAL_USE_PAL || defined(__DOXYGEN__) + +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +const PALConfig pal_default_config = +{ + .pads = { + PAL_MODE_UNCONNECTED, /* P0.0 : XTAL (32MHz) */ + PAL_MODE_UNCONNECTED, /* P0.1 : XTAL (32MHz) */ + PAL_MODE_UNCONNECTED, /* P0.2 */ + PAL_MODE_UNCONNECTED, /* P0.3 */ + PAL_MODE_UNCONNECTED, /* P0.4 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.5 : UART_RTS */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.6 : UART_TX */ + PAL_MODE_INPUT_PULLUP, /* P0.7 : UART_CTS */ + PAL_MODE_INPUT_PULLUP, /* P0.8 : UART_RX */ + PAL_MODE_UNCONNECTED, /* P0.9 */ + PAL_MODE_UNCONNECTED, /* P0.10 */ + PAL_MODE_UNCONNECTED, /* P0.11 */ + PAL_MODE_UNCONNECTED, /* P0.12 */ + PAL_MODE_INPUT_PULLUP, /* P0.13: BTN1 */ + PAL_MODE_INPUT_PULLUP, /* P0.14: BTN2 */ + PAL_MODE_INPUT_PULLUP, /* P0.15: BTN3 */ + PAL_MODE_INPUT_PULLUP, /* P0.16: BTN4 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.17: LED1 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.18: LED2 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.19: LED3 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.20: LED4 */ + PAL_MODE_UNCONNECTED, /* P0.21 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.22: SPI_SS */ + PAL_MODE_INPUT_PULLUP, /* P0.23: SPI_MISO */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.24: SPI_MOSI */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.25: SPI_SCK */ + PAL_MODE_OUTPUT_OPENDRAIN, /* P0.26: SDA */ + PAL_MODE_OUTPUT_OPENDRAIN, /* P0.27: SCL */ + PAL_MODE_UNCONNECTED, /* P0.28 */ + PAL_MODE_UNCONNECTED, /* P0.29 */ + PAL_MODE_UNCONNECTED, /* P0.30 */ + PAL_MODE_UNCONNECTED, /* P0.31 */ + }, +}; +#endif + +/** + * @brief Early initialization code. + * @details This initialization is performed just after reset before BSS and + * DATA segments initialization. + */ +void __early_init(void) +{ +} + +/** + * @brief Late initialization code. + * @note This initialization is performed after BSS and DATA segments + * initialization and before invoking the main() function. + */ +void boardInit(void) +{ +} diff --git a/os/hal/boards/NRF52-DK/board.h b/os/hal/boards/NRF52-DK/board.h new file mode 100644 index 0000000..5c7566a --- /dev/null +++ b/os/hal/boards/NRF52-DK/board.h @@ -0,0 +1,201 @@ +/* + Copyright (C) 2016 Stephane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* Board identifier. */ +#define BOARD_NRF52_DK +#define BOARD_NAME "nRF52 DK" + +/* Board oscillators-related settings. */ +#define NRF5_XTAL_VALUE 32000000 +#define NRF5_LFCLK_SOURCE 1 + +/* + * GPIO pins. + */ +/* Defined by board */ +#define BTN1 13U +#define BTN2 14U +#define BTN3 15U +#define BTN4 16U +#define LED1 17U +#define LED2 18U +#define LED3 19U +#define LED4 20U +#define UART_RTS 5U +#define UART_TX 6U +#define UART_CTS 7U +#define UART_RX 8U +#define NFC1 9U +#define NFC2 10U +#define I2C_SCL 27U +#define I2C_SDA 26U + +/* Our definitions */ +#define SPI_SCK 25U +#define SPI_MOSI 24U +#define SPI_MISO 23U +#define SPI_SS 22U + +/* Analog input */ +#define AIN0 2U +#define AIN1 3U +#define AIN2 4U +#define AIN3 5U +#define AIN4 28U +#define AIN5 29U +#define AIN6 30U +#define AIN7 31U +#define AREF0 AIN0 +#define AREF1 AIN1 + +/* + * IO pins assignments. + */ +/* Defined by board */ +#define IOPORT1_BTN1 13U +#define IOPORT1_BTN2 14U +#define IOPORT1_BTN3 15U +#define IOPORT1_BTN4 16U +#define IOPORT1_LED1 17U +#define IOPORT1_LED2 18U +#define IOPORT1_LED3 19U +#define IOPORT1_LED4 20U +#define IOPORT1_UART_RTS 5U +#define IOPORT1_UART_TX 6U +#define IOPORT1_UART_CTS 7U +#define IOPORT1_UART_RX 8U +#define IOPORT1_NFC1 9U +#define IOPORT1_NFC2 10U +#define IOPORT1_I2C_SCL 27U +#define IOPORT1_I2C_SDA 26U +#define IOPORT1_RESET 21U + +/* Our definitions */ +#define IOPORT1_SPI_SCK 25U +#define IOPORT1_SPI_MOSI 24U +#define IOPORT1_SPI_MISO 23U +#define IOPORT1_SPI_SS 22U + +/* Analog inpupt */ +#define IOPORT1_AIN0 2U +#define IOPORT1_AIN1 3U +#define IOPORT1_AIN2 4U +#define IOPORT1_AIN3 5U +#define IOPORT1_AIN4 28U +#define IOPORT1_AIN5 29U +#define IOPORT1_AIN6 30U +#define IOPORT1_AIN7 31U +#define IOPORT1_AREF0 IOPORT1_AIN0 +#define IOPORT1_AREF1 IOPORT1_AIN1 + +/* Arduino naming */ +#define IOPORT1_A0 3U +#define IOPORT1_A1 4U +#define IOPORT1_A2 28U +#define IOPORT1_A3 39U +#define IOPORT1_A4 30U +#define IOPORT1_A5 31U +#define IOPORT1_D0 11U +#define IOPORT1_D1 12U +#define IOPORT1_D2 13U +#define IOPORT1_D3 14U +#define IOPORT1_D4 15U +#define IOPORT1_D5 16U +#define IOPORT1_D6 17U +#define IOPORT1_D7 18U +#define IOPORT1_D8 19U +#define IOPORT1_D9 20U +#define IOPORT1_D10 22U +#define IOPORT1_D11 23U +#define IOPORT1_D12 24U +#define IOPORT1_D13 25U + + +/* + * IO lines assignments. + */ +/* Board defined */ +#define LINE_BTN1 PAL_LINE(IOPORT1, IOPORT1_BTN1) +#define LINE_BTN2 PAL_LINE(IOPORT1, IOPORT1_BTN2) +#define LINE_BTN3 PAL_LINE(IOPORT1, IOPORT1_BTN3) +#define LINE_BTN4 PAL_LINE(IOPORT1, IOPORT1_BTN4) +#define LINE_LED1 PAL_LINE(IOPORT1, IOPORT1_LED1) +#define LINE_LED2 PAL_LINE(IOPORT1, IOPORT1_LED2) +#define LINE_LED3 PAL_LINE(IOPORT1, IOPORT1_LED3) +#define LINE_LED4 PAL_LINE(IOPORT1, IOPORT1_LED4) +#define LINE_UART_RTS PAL_LINE(IOPORT1, IOPORT1_UART_RTS) +#define LINE_UART_TX PAL_LINE(IOPORT1, IOPORT1_UART_TX) +#define LINE_UART_CTS PAL_LINE(IOPORT1, IOPORT1_UART_CTS) +#define LINE_UART_RX PAL_LINE(IOPORT1, IOPORT1_UART_RX) +#define LINE_NFC1 PAL_LINE(IOPORT1, IOPORT1_NFC1) +#define LINE_NFC2 PAL_LINE(IOPORT1, IOPORT1_NFC2) +#define LINE_I2C_SCL PAL_LINE(IOPORT1, IOPORT1_I2C_SCL) +#define LINE_I2C_SDA PAL_LINE(IOPORT1, IOPORT1_I2C_SDA) + +/* Our definitions */ +#define LINE_SPI_SCK PAL_LINE(IOPORT1, IOPORT1_SPI_SCK) +#define LINE_SPI_MOSI PAL_LINE(IOPORT1, IOPORT1_SPI_MOSI) +#define LINE_SPI_MISO PAL_LINE(IOPORT1, IOPORT1_SPI_MISO) +#define LINE_SPI_SS PAL_LINE(IOPORT1, IOPORT1_SPI_SS) + +/* Analog line */ +#define LINE_AIN0 PAL_LINE(IOPORT1, IOPORT1_AIN0) +#define LINE_AIN1 PAL_LINE(IOPORT1, IOPORT1_AIN1) +#define LINE_AIN2 PAL_LINE(IOPORT1, IOPORT1_AIN2) +#define LINE_AIN3 PAL_LINE(IOPORT1, IOPORT1_AIN3) +#define LINE_AIN4 PAL_LINE(IOPORT1, IOPORT1_AIN4) +#define LINE_AIN5 PAL_LINE(IOPORT1, IOPORT1_AIN5) +#define LINE_AIN6 PAL_LINE(IOPORT1, IOPORT1_AIN6) +#define LINE_AIN7 PAL_LINE(IOPORT1, IOPORT1_AIN7) +#define LINE_AREF0 PAL_LINE(IOPORT1, IOPORT1_AREF0) +#define LINE_AREF1 PAL_LINE(IOPORT1, IOPORT1_AREF1) + +/* Arduino naming */ +#define LINE_A0 PAL_LINE(IOPORT1, IOPORT1_A0) +#define LINE_A1 PAL_LINE(IOPORT1, IOPORT1_A1) +#define LINE_A2 PAL_LINE(IOPORT1, IOPORT1_A2) +#define LINE_A3 PAL_LINE(IOPORT1, IOPORT1_A3) +#define LINE_A4 PAL_LINE(IOPORT1, IOPORT1_A4) +#define LINE_A5 PAL_LINE(IOPORT1, IOPORT1_A5) +#define LINE_D0 PAL_LINE(IOPORT1, IOPORT1_D0) +#define LINE_D1 PAL_LINE(IOPORT1, IOPORT1_D1) +#define LINE_D2 PAL_LINE(IOPORT1, IOPORT1_D2) +#define LINE_D3 PAL_LINE(IOPORT1, IOPORT1_D3) +#define LINE_D4 PAL_LINE(IOPORT1, IOPORT1_D4) +#define LINE_D5 PAL_LINE(IOPORT1, IOPORT1_D5) +#define LINE_D6 PAL_LINE(IOPORT1, IOPORT1_D6) +#define LINE_D7 PAL_LINE(IOPORT1, IOPORT1_D7) +#define LINE_D8 PAL_LINE(IOPORT1, IOPORT1_D8) +#define LINE_D9 PAL_LINE(IOPORT1, IOPORT1_D9) +#define LINE_D10 PAL_LINE(IOPORT1, IOPORT1_D10) +#define LINE_D11 PAL_LINE(IOPORT1, IOPORT1_D11) +#define LINE_D12 PAL_LINE(IOPORT1, IOPORT1_D12) +#define LINE_D13 PAL_LINE(IOPORT1, IOPORT1_D13) + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/os/hal/boards/NRF52-DK/board.mk b/os/hal/boards/NRF52-DK/board.mk new file mode 100644 index 0000000..4310291 --- /dev/null +++ b/os/hal/boards/NRF52-DK/board.mk @@ -0,0 +1,12 @@ +# List of all the board related files. +BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-DK/board.c + +# Required include directories +BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-DK + +# Flash +JLINK_DEVICE = nrf52 +JLINK_PRE_FLASH = w4 4001e504 1 +#JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100 +JLINK_PIN_RESET = w4 40000544 1 + diff --git a/os/hal/boards/WVSHARE_BLE400/board.h b/os/hal/boards/WVSHARE_BLE400/board.h index fd52467..5a4e8f0 100644 --- a/os/hal/boards/WVSHARE_BLE400/board.h +++ b/os/hal/boards/WVSHARE_BLE400/board.h @@ -42,6 +42,16 @@ #define SPI_SS 30 #define I2C_SCL 1 #define I2C_SDA 0 +#define AIN0 26 +#define AIN1 27 +#define AIN2 1 +#define AIN3 2 +#define AIN4 3 +#define AIN5 4 +#define AIN6 5 +#define AIN7 6 +#define AREF0 0 +#define AREF1 6 /* * IO pins assignments. @@ -63,6 +73,16 @@ #define IOPORT1_SPI_SS 30U #define IOPORT1_I2C_SCL 1U #define IOPORT1_I2C_SDA 0U +#define IOPORT1_AIN0 26U +#define IOPORT1_AIN1 27U +#define IOPORT1_AIN2 1U +#define IOPORT1_AIN3 2U +#define IOPORT1_AIN4 3U +#define IOPORT1_AIN5 4U +#define IOPORT1_AIN6 5U +#define IOPORT1_AIN7 6U +#define IOPORT1_AREF0 0U +#define IOPORT1_AREF1 6U /* * IO lines assignments. @@ -84,6 +104,16 @@ #define LINE_SPI_SS PAL_LINE(IOPORT1, IOPORT1_SPI_SS) #define LINE_I2C_SCL PAL_LINE(IOPORT1, IOPORT1_I2C_SCL) #define LINE_I2C_SDA PAL_LINE(IOPORT1, IOPORT1_I2C_SDA) +#define LINE_AIN0 PAL_LINE(IOPORT1, IOPORT1_AIN0) +#define LINE_AIN1 PAL_LINE(IOPORT1, IOPORT1_AIN1) +#define LINE_AIN2 PAL_LINE(IOPORT1, IOPORT1_AIN2) +#define LINE_AIN3 PAL_LINE(IOPORT1, IOPORT1_AIN3) +#define LINE_AIN4 PAL_LINE(IOPORT1, IOPORT1_AIN4) +#define LINE_AIN5 PAL_LINE(IOPORT1, IOPORT1_AIN5) +#define LINE_AIN6 PAL_LINE(IOPORT1, IOPORT1_AIN6) +#define LINE_AIN7 PAL_LINE(IOPORT1, IOPORT1_AIN7) +#define LINE_AREF0 PAL_LINE(IOPORT1, IOPORT1_AREF0) +#define LINE_AREF1 PAL_LINE(IOPORT1, IOPORT1_AREF1) #if !defined(_FROM_ASM_) #ifdef __cplusplus |