1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
|
/////////////////////////////////////////////////////////////////////////
// $Id: instrument.h,v 1.14 2003/10/09 19:05:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
//
// MandrakeSoft S.A.
// 43, rue d'Aboukir
// 75002 Paris - France
// http://www.linux-mandrake.com/
// http://www.mandrakesoft.com/
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
// possible types passed to BX_INSTR_TLB_CNTRL()
#define BX_INSTR_MOV_CR3 10
#define BX_INSTR_INVLPG 11
#define BX_INSTR_TASKSWITCH 12
// possible types passed to BX_INSTR_CACHE_CNTRL()
#define BX_INSTR_INVD 20
#define BX_INSTR_WBINVD 21
#define BX_INSTR_IS_CALL 10
#define BX_INSTR_IS_RET 11
#define BX_INSTR_IS_IRET 12
#define BX_INSTR_IS_JMP 13
#define BX_INSTR_IS_INT 14
#define BX_INSTR_PREFETCH_NTA 00
#define BX_INSTR_PREFETCH_T0 01
#define BX_INSTR_PREFETCH_T1 02
#define BX_INSTR_PREFETCH_T2 03
#if BX_INSTRUMENTATION
class bxInstruction_c;
// called from the CPU core
void bx_instr_init(unsigned cpu);
void bx_instr_shutdown(unsigned cpu);
void bx_instr_reset(unsigned cpu);
void bx_instr_new_instruction(unsigned cpu);
void bx_instr_debug_promt();
void bx_instr_start();
void bx_instr_stop();
void bx_instr_print();
void bx_instr_cnear_branch_taken(unsigned cpu, bx_address new_eip);
void bx_instr_cnear_branch_not_taken(unsigned cpu);
void bx_instr_ucnear_branch(unsigned cpu, unsigned what, bx_address new_eip);
void bx_instr_far_branch(unsigned cpu, unsigned what, Bit16u new_cs, bx_address new_eip);
void bx_instr_opcode(unsigned cpu, Bit8u *opcode, unsigned len, bx_bool is32);
void bx_instr_fetch_decode_completed(unsigned cpu, const bxInstruction_c *i);
void bx_instr_prefix_as(unsigned cpu);
void bx_instr_prefix_os(unsigned cpu);
void bx_instr_prefix_rep(unsigned cpu);
void bx_instr_prefix_repne(unsigned cpu);
void bx_instr_prefix_lock(unsigned cpu);
void bx_instr_prefix_cs(unsigned cpu);
void bx_instr_prefix_ss(unsigned cpu);
void bx_instr_prefix_ds(unsigned cpu);
void bx_instr_prefix_es(unsigned cpu);
void bx_instr_prefix_fs(unsigned cpu);
void bx_instr_prefix_gs(unsigned cpu);
void bx_instr_prefix_extend8b(unsigned cpu);
void bx_instr_interrupt(unsigned cpu, unsigned vector);
void bx_instr_exception(unsigned cpu, unsigned vector);
void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address eip);
void bx_instr_tlb_cntrl(unsigned cpu, unsigned what, Bit32u newval);
void bx_instr_cache_cntrl(unsigned cpu, unsigned what);
void bx_instr_prefetch_hint(unsigned cpu, unsigned what, unsigned seg, bx_address offset);
void bx_instr_before_execution(unsigned cpu);
void bx_instr_after_execution(unsigned cpu);
void bx_instr_repeat_iteration(unsigned cpu);
void bx_instr_inp(Bit16u addr, unsigned len);
void bx_instr_outp(Bit16u addr, unsigned len);
void bx_instr_inp2(Bit16u addr, unsigned len, unsigned val);
void bx_instr_outp2(Bit16u addr, unsigned len, unsigned val);
void bx_instr_mem_code(unsigned cpu, bx_address linear, unsigned size);
void bx_instr_mem_data(unsigned cpu, bx_address linear, unsigned size, unsigned rw);
void bx_instr_lin_read(unsigned cpu, bx_address lin, bx_address phy, unsigned len);
void bx_instr_lin_write(unsigned cpu, bx_address lin, bx_address phy, unsigned len);
void bx_instr_phy_write(unsigned cpu, bx_address addr, unsigned len);
void bx_instr_phy_read(unsigned cpu, bx_address addr, unsigned len);
/* simulation init, shutdown, reset */
# define BX_INSTR_INIT(cpu_id) bx_instr_init(cpu_id)
# define BX_INSTR_SHUTDOWN(cpu_id) bx_instr_shutdown(cpu_id)
# define BX_INSTR_RESET(cpu_id) bx_instr_reset(cpu_id)
# define BX_INSTR_NEW_INSTRUCTION(cpu_id) bx_instr_new_instruction(cpu_id)
/* called from command line debugger */
# define BX_INSTR_DEBUG_PROMPT() bx_instr_debug_promt()
# define BX_INSTR_START() bx_instr_start()
# define BX_INSTR_STOP() bx_instr_stop()
# define BX_INSTR_PRINT() bx_instr_print()
/* branch resoultion */
# define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) bx_instr_cnear_branch_taken(cpu_id, new_eip)
# define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) bx_instr_cnear_branch_not_taken(cpu_id)
# define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) bx_instr_ucnear_branch(cpu_id, what, new_eip)
# define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) bx_instr_far_branch(cpu_id, what, new_cs, new_eip)
/* decoding completed */
# define BX_INSTR_OPCODE(cpu_id, opcode, len, is32) \
bx_instr_opcode(cpu_id, opcode, len, is32)
# define BX_INSTR_FETCH_DECODE_COMPLETED(cpu_id, i) \
bx_instr_fetch_decode_completed(cpu_id, i)
/* prefix decoded */
# define BX_INSTR_PREFIX_AS(cpu_id) bx_instr_prefix_as(cpu_id)
# define BX_INSTR_PREFIX_OS(cpu_id) bx_instr_prefix_os(cpu_id)
# define BX_INSTR_PREFIX_REP(cpu_id) bx_instr_prefix_rep(cpu_id)
# define BX_INSTR_PREFIX_REPNE(cpu_id) bx_instr_prefix_repne(cpu_id)
# define BX_INSTR_PREFIX_LOCK(cpu_id) bx_instr_prefix_lock(cpu_id)
# define BX_INSTR_PREFIX_CS(cpu_id) bx_instr_prefix_cs(cpu_id)
# define BX_INSTR_PREFIX_SS(cpu_id) bx_instr_prefix_ss(cpu_id)
# define BX_INSTR_PREFIX_DS(cpu_id) bx_instr_prefix_ds(cpu_id)
# define BX_INSTR_PREFIX_ES(cpu_id) bx_instr_prefix_es(cpu_id)
# define BX_INSTR_PREFIX_FS(cpu_id) bx_instr_prefix_fs(cpu_id)
# define BX_INSTR_PREFIX_GS(cpu_id) bx_instr_prefix_gs(cpu_id)
# define BX_INSTR_PREFIX_EXTEND8B(cpu_id) bx_instr_prefix_extend8b(cpu_id)
/* exceptional case and interrupt */
# define BX_INSTR_EXCEPTION(cpu_id, vector) bx_instr_exception(cpu_id, vector)
# define BX_INSTR_INTERRUPT(cpu_id, vector) bx_instr_interrupt(cpu_id, vector)
# define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) bx_instr_hwinterrupt(cpu_id, vector, cs, eip)
/* TLB/CACHE control instruction executed */
# define BX_INSTR_CACHE_CNTRL(cpu_id, what) bx_instr_cache_cntrl(cpu_id, what)
# define BX_INSTR_TLB_CNTRL(cpu_id, what, newval) bx_instr_tlb_cntrl(cpu_id, what, newval)
# define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) \
bx_instr_prefetch_hint(cpu_id, what, seg, offset)
/* execution */
# define BX_INSTR_BEFORE_EXECUTION(cpu_id) bx_instr_before_execution(cpu_id)
# define BX_INSTR_AFTER_EXECUTION(cpu_id) bx_instr_after_execution(cpu_id)
# define BX_INSTR_REPEAT_ITERATION(cpu_id) bx_instr_repeat_iteration(cpu_id)
/* memory access */
# define BX_INSTR_LIN_READ(cpu_id, lin, phy, len) bx_instr_lin_read(cpu_id, lin, phy, len)
# define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len) bx_instr_lin_write(cpu_id, lin, phy, len)
# define BX_INSTR_MEM_CODE(cpu_id, linear, size) bx_instr_mem_code(cpu_id, linear, size)
# define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw) bx_instr_mem_data(cpu_id, linear, size, rw)
/* called from memory object */
# define BX_INSTR_PHY_WRITE(cpu_id, addr, len) bx_instr_phy_write(cpu_id, addr, len)
# define BX_INSTR_PHY_READ(cpu_id, addr, len) bx_instr_phy_read(cpu_id, addr, len)
/* feedback from device units */
# define BX_INSTR_INP(addr, len) bx_instr_inp(addr, len)
# define BX_INSTR_INP2(addr, len, val) bx_instr_inp2(addr, len, val)
# define BX_INSTR_OUTP(addr, len) bx_instr_outp(addr, len)
# define BX_INSTR_OUTP2(addr, len, val) bx_instr_outp2(addr, len, val)
#else
/* simulation init, shutdown, reset */
# define BX_INSTR_INIT(cpu_id)
# define BX_INSTR_SHUTDOWN(cpu_id)
# define BX_INSTR_RESET(cpu_id)
# define BX_INSTR_NEW_INSTRUCTION(cpu_id)
/* called from command line debugger */
# define BX_INSTR_DEBUG_PROMPT()
# define BX_INSTR_START()
# define BX_INSTR_STOP()
# define BX_INSTR_PRINT()
/* branch resoultion */
# define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip)
# define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id)
# define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip)
# define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip)
/* decoding completed */
# define BX_INSTR_OPCODE(cpu_id, opcode, len, is32)
# define BX_INSTR_FETCH_DECODE_COMPLETED(cpu_id, i)
/* prefix decoded */
# define BX_INSTR_PREFIX_AS(cpu_id)
# define BX_INSTR_PREFIX_OS(cpu_id)
# define BX_INSTR_PREFIX_REP(cpu_id)
# define BX_INSTR_PREFIX_REPNE(cpu_id)
# define BX_INSTR_PREFIX_LOCK(cpu_id)
# define BX_INSTR_PREFIX_CS(cpu_id)
# define BX_INSTR_PREFIX_SS(cpu_id)
# define BX_INSTR_PREFIX_DS(cpu_id)
# define BX_INSTR_PREFIX_ES(cpu_id)
# define BX_INSTR_PREFIX_FS(cpu_id)
# define BX_INSTR_PREFIX_GS(cpu_id)
# define BX_INSTR_PREFIX_EXTEND8B(cpu_id)
/* exceptional case and interrupt */
# define BX_INSTR_EXCEPTION(cpu_id, vector)
# define BX_INSTR_INTERRUPT(cpu_id, vector)
# define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip)
/* TLB/CACHE control instruction executed */
# define BX_INSTR_CACHE_CNTRL(cpu_id, what)
# define BX_INSTR_TLB_CNTRL(cpu_id, what, newval)
# define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset)
/* execution */
# define BX_INSTR_BEFORE_EXECUTION(cpu_id)
# define BX_INSTR_AFTER_EXECUTION(cpu_id)
# define BX_INSTR_REPEAT_ITERATION(cpu_id)
/* memory access */
# define BX_INSTR_LIN_READ(cpu_id, lin, phy, len)
# define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len)
# define BX_INSTR_MEM_CODE(cpu_id, linear, size)
# define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw)
/* called from memory object */
# define BX_INSTR_PHY_WRITE(cpu_id, addr, len)
# define BX_INSTR_PHY_READ(cpu_id, addr, len)
/* feedback from device units */
# define BX_INSTR_INP(addr, len)
# define BX_INSTR_INP2(addr, len, val)
# define BX_INSTR_OUTP(addr, len)
# define BX_INSTR_OUTP2(addr, len, val)
#endif
|
