From 4b46e7be783df641b2889e514e85643febd378c2 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Fri, 11 Oct 2013 09:30:31 +0200 Subject: x86: use {rd,wr}{fs,gs}base when available ... as being intended to be faster than MSR reads/writes. In the case of emulate_privileged_op() also use these in favor of the cached (but possibly stale) addresses from arch.pv_vcpu. This allows entirely removing the code that was the subject of XSA-67. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper Acked-by: Keir Fraser --- xen/arch/x86/traps.c | 30 ++++++++++-------------------- 1 file changed, 10 insertions(+), 20 deletions(-) (limited to 'xen/arch/x86/traps.c') diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 35be017dc8..8dcb70a98f 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1985,28 +1985,18 @@ static int emulate_privileged_op(struct cpu_user_regs *regs) } else { - if ( lm_ovr == lm_seg_none || data_sel < 4 ) + switch ( lm_ovr ) { - switch ( lm_ovr ) - { - case lm_seg_none: - data_base = 0UL; - break; - case lm_seg_fs: - data_base = v->arch.pv_vcpu.fs_base; - break; - case lm_seg_gs: - if ( guest_kernel_mode(v, regs) ) - data_base = v->arch.pv_vcpu.gs_base_kernel; - else - data_base = v->arch.pv_vcpu.gs_base_user; - break; - } + default: + data_base = 0UL; + break; + case lm_seg_fs: + data_base = rdfsbase(); + break; + case lm_seg_gs: + data_base = rdgsbase(); + break; } - else if ( !read_descriptor(data_sel, v, regs, - &data_base, &data_limit, &ar, 0) || - !(ar & _SEGMENT_S) || !(ar & _SEGMENT_P) ) - goto fail; data_limit = ~0UL; ar = _SEGMENT_WR|_SEGMENT_S|_SEGMENT_DPL|_SEGMENT_P; } -- cgit v1.2.3