From 8137e3ea1a0ea66181680b9bc4f1865c0edb81b5 Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Tue, 31 Jan 2012 16:34:39 +0000 Subject: libxl: expose cpu topology as a single list of cpu->{node,core,socket} maps. Rather than the previous tripple list which is more complicated to work with and harder for language bindings. Signed-off-by: Ian Campbell Acked-by: Ian Jackson Committed-by: Ian Jackson --- tools/ocaml/libs/xl/genwrap.py | 3 ++- tools/ocaml/libs/xl/xenlight.ml.in | 11 -------- tools/ocaml/libs/xl/xenlight.mli.in | 10 -------- tools/ocaml/libs/xl/xenlight_stubs.c | 49 ++++++++++++++---------------------- 4 files changed, 21 insertions(+), 52 deletions(-) (limited to 'tools/ocaml') diff --git a/tools/ocaml/libs/xl/genwrap.py b/tools/ocaml/libs/xl/genwrap.py index f83581848b..22cca80bcb 100644 --- a/tools/ocaml/libs/xl/genwrap.py +++ b/tools/ocaml/libs/xl/genwrap.py @@ -29,6 +29,8 @@ functions = { # ( name , [type1,type2,....] ) "device_pci": DEVICE_FUNCTIONS, "physinfo": [ ("get", ["unit", "t"]), ], + "cputopology": [ ("get", ["unit", "t array"]), + ], "sched_credit": [ ("domain_get", ["domid", "t"]), ("domain_set", ["domid", "t", "unit"]), ], @@ -266,7 +268,6 @@ if __name__ == '__main__': "domain_create_info", "domain_build_info", "vcpuinfo", - "topologyinfo", "event", ] diff --git a/tools/ocaml/libs/xl/xenlight.ml.in b/tools/ocaml/libs/xl/xenlight.ml.in index 162b4a96bb..c47623c3fc 100644 --- a/tools/ocaml/libs/xl/xenlight.ml.in +++ b/tools/ocaml/libs/xl/xenlight.ml.in @@ -19,17 +19,6 @@ type domid = int (* @@LIBXL_TYPES@@ *) -module Topologyinfo = struct - type t = - { - core : int; - socket : int; - node : int; - } - external get : unit -> t array = "stub_xl_topologyinfo" -end - - external send_trigger : domid -> trigger -> int -> unit = "stub_xl_send_trigger" external send_sysrq : domid -> char -> unit = "stub_xl_send_sysrq" external send_debug_keys : domid -> string -> unit = "stub_xl_send_debug_keys" diff --git a/tools/ocaml/libs/xl/xenlight.mli.in b/tools/ocaml/libs/xl/xenlight.mli.in index ea919a7a00..4717bac3f7 100644 --- a/tools/ocaml/libs/xl/xenlight.mli.in +++ b/tools/ocaml/libs/xl/xenlight.mli.in @@ -19,16 +19,6 @@ type domid = int (* @@LIBXL_TYPES@@ *) -module Topologyinfo : sig - type t = - { - core : int; - socket : int; - node : int; - } - external get : unit -> t array = "stub_xl_topologyinfo" -end - external send_trigger : domid -> trigger -> int -> unit = "stub_xl_send_trigger" external send_sysrq : domid -> char -> unit = "stub_xl_send_sysrq" external send_debug_keys : domid -> string -> unit = "stub_xl_send_debug_keys" diff --git a/tools/ocaml/libs/xl/xenlight_stubs.c b/tools/ocaml/libs/xl/xenlight_stubs.c index d3e4751a36..38977b5122 100644 --- a/tools/ocaml/libs/xl/xenlight_stubs.c +++ b/tools/ocaml/libs/xl/xenlight_stubs.c @@ -210,28 +210,6 @@ static value Val_hwcap(libxl_hwcap *c_val) #include "_libxl_types.inc" -static value Val_topologyinfo(libxl_topologyinfo *c_val) -{ - CAMLparam0(); - CAMLlocal3(v, topology, topologyinfo); - int i; - - topologyinfo = caml_alloc_tuple(c_val->coremap.entries); - for (i = 0; i < c_val->coremap.entries; i++) { - v = Val_none; - if (c_val->coremap.array[i] != LIBXL_CPUARRAY_INVALID_ENTRY) { - topology = caml_alloc_tuple(3); - Store_field(topology, 0, Val_int(c_val->coremap.array[i])); - Store_field(topology, 1, Val_int(c_val->socketmap.array[i])); - Store_field(topology, 2, Val_int(c_val->nodemap.array[i])); - v = Val_some(topology); - } - Store_field(topologyinfo, i, v); - } - - CAMLreturn(topologyinfo); -} - value stub_xl_device_disk_add(value info, value domid) { CAMLparam2(info, domid); @@ -462,22 +440,33 @@ value stub_xl_physinfo_get(value unit) CAMLreturn(physinfo); } -value stub_xl_topologyinfo(value unit) +value stub_xl_cputopology_get(value unit) { CAMLparam1(unit); - CAMLlocal1(topologyinfo); - libxl_topologyinfo c_topologyinfo; - int ret; + CAMLlocal2(topology, v); + libxl_cputopology *c_topology; + int i, nr, ret; INIT_STRUCT(); INIT_CTX(); - ret = libxl_get_topologyinfo(ctx, &c_topologyinfo); + + c_topology = libxl_get_cpu_topology(ctx, &nr); if (ret != 0) failwith_xl("topologyinfo", &lg); - FREE_CTX(); - topologyinfo = Val_topologyinfo(&c_topologyinfo); - CAMLreturn(topologyinfo); + topology = caml_alloc_tuple(nr); + for (i = 0; i < nr; i++) { + if (c_topology[i].core != LIBXL_CPUTOPOLOGY_INVALID_ENTRY) + v = Val_some(Val_cputopology(&gc, &lg, &c_topology[i])); + else + v = Val_none; + Store_field(topology, i, v); + } + + libxl_cputopology_list_free(c_topology, nr); + + FREE_CTX(); + CAMLreturn(topology); } value stub_xl_sched_credit_domain_get(value domid) -- cgit v1.2.3