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* Clean up MCA MSR virtualization and vMCE injectionKeir Fraser2010-04-191-5/+0
| | | | | | | | | | | | | | | Remove all virtual MCE related work into a seperated file. It also try to do some clean-up on the vMCE, including: a) renmae some function name like mce_init_msr/mce_rdmsr to be vmce_init_msr/vmce_rdmsr to make it more straightforward, b) make the vmca_msrs be a pointer in arch_domain, to decrease arch_domain's size c) extract per-bank MCA MSR access to be seperated function (bank_mce_wrmsr/bank_mce_rdmsr) to make it be a bit cleaner. d) A new file xen/include/asm-x86/mce.h is added for vmce related header. Signed-off-by: Jiang, Yunhong <yunhong.jiang@intel.com>
* x86: fix MCE/NMI injectionKeir Fraser2009-12-011-0/+2
| | | | | | | | | | | | | | | | | | | | This attempts to address all the concerns raised in http://lists.xensource.com/archives/html/xen-devel/2009-11/msg01195.html, but I'm nevertheless still not convinced that all aspects of the injection handling really work reliably. In particular, while the patch here on top of the fixes for the problems menioned in the referenced mail also adds code to keep send_guest_trap() from injecting multiple events at a time, I don't think the is the right mechanism - it should be possible to handle NMI/MCE nested within each other. Another fix on top of the ones for the earlier described problems is that the vCPU affinity restore logic didn't account for software injected NMIs - these never set cpu_affinity_tmp, but due to it most likely being different from cpu_affinity it would have got restored (to a potentially random value) nevertheless. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: cleanup rdmsr/wrmsrKeir Fraser2009-08-141-2/+2
| | | | | | | Use a 64bit value instead of extracting/merging two 32bit values. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: extend some of Intel's recent MCE work to also support AMDKeir Fraser2009-07-151-4/+4
| | | | | | | | | | | | | | | | | At least the MSR handling for guests can easily be made shared between the two vendors; likely a lot of the other code in mce_intel.c could also be made common. The goal here, however, is to eliminate the annoying guest-tried-to-modify-msr messages that result from enabling the MCE code on the Linux side. Additionally (in order for not having to make the same change twice to basically identical code) the patch also merges amd_{fam10,k8}_mcheck_init(), enables the former to also be used for Fam11 (I'd suppose that Fam12 would also need to go here, but I have no data to confirm that), and does some minor (mostly coding style for the code moved around) adjustments. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86 mce: fix and clean up c/s 19423Keir Fraser2009-03-311-0/+5
| | | | | | | | | | - fix inverted return value check for intel_mce_{rd,wr}msr() - fix broken initialization of d->arch.vmca_msrs.mci_ctl - remove pointless (!d || is_idle_domain(d)) checks - eliminate hard-coded limit to 9 banks - avoid redundant gdprintk()s Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86 mcheck: Replace hypervisor MCA telemetry structures with somethingKeir Fraser2009-03-171-1/+1
| | | | | | | | | | more robust and designed to make terminal error telemetry available to the dom0 panic flow for diagnosis on reboot. Use common code for a lot of the AMD and Intel MCE handling code. Signed-off-by: Gavin Maltby <gavin.maltby@sun.com> Signed-off-by: Frank van der Linden <frank.vanderlinden@sun.com>
* x86: MCA support.Keir Fraser2008-07-041-0/+50
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>