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* xen: move for_each_set_bit to xen/bitops.hStefano Stabellini2013-05-081-1/+1
| | | | | | | | Move for_each_set_bit from asm-x86/bitops.h to xen/bitops.h. Replace #include <asm/bitops.h> with #include <xen/bitops.h> everywhere. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Keir Fraser <keir@xen.org>
* x86: fix CMCI injectionJan Beulich2013-02-261-1/+2
| | | | | | | | | | | | | | | | This fixes the wrong use of literal vector 0xF7 with an "int" instruction (invalidated by 25113:14609be41f36) and the fact that doing the injection via a software interrupt was never valid anyway (because cmci_interrupt() acks the LAPIC, which does the wrong thing if the interrupt didn't get delivered though it). In order to do latter, the patch introduces send_IPI_self(), at once removing two opend coded uses of "genapic" in the IRQ handling code. Reported-by: Yongjie Ren <yongjie.ren@intel.com> Signed-off-by: Jan Beulich <jbeulich@suse.com> Tested-by: Yongjie Ren <yongjie.ren@intel.com> Acked-by: Keir Fraser <keir@xen.org>
* x86: make cpu_2_logical_apicid private to x2apic codeJan Beulich2012-11-081-2/+0
| | | | | | | | ... as it in fact is only being used there. While moving it, also make it a per-CPU variable rather than a NR_CPUS-sized array. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* xen: Remove x86_32 build target.Keir Fraser2012-09-121-4/+0
| | | | Signed-off-by: Keir Fraser <keir@xen.org>
* CONFIG: remove CONFIG_SMP #ifdefsAndrew Cooper2012-02-091-8/+0
| | | | | | | | CONFIG_SMP is always enabled and !CONFIG_SMP is not supported. So simplify the code a little by removing all #ifdefs. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Committed-by: Keir Fraser <keir@xen.org>
* allocate CPU sibling and core maps dynamicallyJan Beulich2011-10-211-2/+2
| | | | | | | | | | ... thus reducing the per-CPU data area size back to one page even when building for large NR_CPUS. At once eliminate the old __cpu{mask,list}_scnprintf() helpers. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* kexec: Clean up shutdown logic. Reinstate ACPI DMAR during kexec.Keir Fraser2010-07-291-0/+2
| | | | Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Do not include apic.h/io_apic.h from asm/smp.hKeir Fraser2010-06-111-21/+2
| | | | | | ...and fix up the ensuing fall-out of implicit dependencies Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Streamline the CPU early boot process.Keir Fraser2010-05-191-12/+0
| | | | | | | | | | | | Mainly this involves getting rid of a bunch of cpumasks and replacing with a single 'cpu_state' enumeration to track progress and allow master-slave handshaking. Cleaning this stuff up is a prerequisite for safely handling slave failure (e.g., out of memory, invalid slave CPU capabilities, ...). This will get fixed up in a future patch. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Pull dynamic memory allocation out of do_boot_cpu().Keir Fraser2010-05-181-1/+1
| | | | | | | | | | | | This has two advantages: (a) We can move the allocations to a context where we can handle failure. (b) We can implement matching deallocations on CPU offline. Only the idle vcpu structure is now not freed on CPU offline. This probably does not really matter. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Reindent smpboot.c and clean up a little.Keir Fraser2010-05-171-1/+1
| | | | | | No semantic changes. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* Remove many uses of cpu_possible_map and iterators over NR_CPUS.Keir Fraser2010-05-141-1/+0
| | | | | | | The significant remaining culprits for x86 are credit2, hpet, and percpu-area subsystems. To be dealt with in a separate patch. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* Some cleanups to cpu offline handling.Keir Fraser2010-05-141-2/+0
| | | | Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* Move cpu hotplug routines into common cpu.c file.Keir Fraser2010-05-141-4/+0
| | | | | | | | | Also simplify the locking (reverting to use if spin_trylock, as returning EBUSY/EAGAIN seems unavoidable after all). In particular this should continue to ensure that stop_machine_run() does not have cpu_online_map change under its feet. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Implement cpu hotplug notifiers. Use them.Keir Fraser2010-05-141-3/+0
| | | | Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Remove non-CONFIG_HOTPLUG_CPU code, and general cleanup.Keir Fraser2009-11-121-7/+0
| | | | Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* Support physical CPU hot-add in xen hypervisorKeir Fraser2009-11-121-0/+2
| | | | | | | | | | | | This patch add CPU hot-add in system. a) It mark all CPU as possible when booting, if CONFIG_HOTPLUG_CPU is set. BTW, this will increase per_cpu area. b) When a CPU is added through hypercall, the CPU will be marked as present and offline, and the numa information is setup if numa is supported. The CPU will be brought to online by dom0 online explicitly. Signed-off-by: Jiang, Yunhong <yunhong.jiang@intel.com>
* Hypercall to expose physical CPU information.Keir Fraser2009-11-101-0/+1
| | | | | | | | | | | | It also make some changes to current cpu online/offline logic: 1) Firstly, cpu online/offline will trigger a vIRQ to dom0 for status changes notification. 2) It also add an interface to platform operation to online/offline physical CPU. Currently the cpu online/offline interface is in sysctl, which can't be triggered in kernel. With this change, it is possible to trigger cpu online/offline in dom0 through sysfs interface. Signed-off-by: Jiang, Yunhong <yunhong.jiang@intel.com>
* Scattered code arrangement cleanups.Keir Fraser2009-10-071-2/+1
| | | | | | | | - remove redundant declarations - add/move prototypes to headers - move things where they belong to Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
* vt-d: enhance the support of Interrupt Remapping EIM and x2APICKeir Fraser2009-09-071-0/+1
| | | | | | | | | | | | | | 1) Clear Interrupt Remapping(IR) unit's CFI (Compatibility Format Interrupt) to enhance security; 2) Move the iommu_setup() ahead and put it before we begin to use IOAPIC so we can make sure after we enable Interrupt Remapping, the later IOAPIC (and MSI) initialization would setup IOAPIC RTEs (and MSI) with remappable format; 3) Enable x2APIC only when all VT-d engines support IR with EIM (Extended Interrupt Mode). EIM enables external devices to deliver interrupts to logical processor with >8-bit APIC ID. Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
* x86: Implement per-cpu vector for xen hypervisorKeir Fraser2009-08-191-0/+2
| | | | | | | | | | | | | | | Since Xen and Linux has big differece in code base, it is very hard to port Linux's patch and apply it to Xen directly, so this patch only adopts core logic of Linux, and make it work for Xen. Key changes: 1. vector allocation algorithm 2. all IRQ chips' set_affinity logic 3. IRQ migration when cpu hot remove. 4. Break assumptions which depend on global vector policy. Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
* Move cpu_{sibling,core}_map into per-CPU spaceKeir Fraser2009-07-131-2/+2
| | | | | | | | | | | These cpu maps get read from all CPUs, so apart from addressing the square(nr_cpus) growth of these objects, they also get moved into the previously introduced read-mostly sub-section of the per-CPU section, in order to not need to waste a full cacheline in order to align (and properly pad) them, which would be undue overhead on systems with low NR_CPUS. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* Pass cpumasks by reference always.Keir Fraser2009-05-271-0/+2
| | | | | | | | | | | | | Rather than passing cpumasks by value in all cases (which is problematic for large NR_CPUS configurations), pass them 'by reference' (i.e. through a pointer to a const cpumask). On x86 this changes send_IPI_mask() to always only send IPIs to remote CPUs (meaning any caller needing to handle the current CPU as well has to do so on its own). Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Make the num_siblings CPU parameter per-CPU.Keir Fraser2009-01-221-1/+0
| | | | | | | | | While it is unlikely that a system has a different number of siblings for different physical CPUs, make this parameter per-CPU for consistency, and deal with the (so far theoretical) case that this is different per CPU package. Signed-off-by: Frank van der Linden <Frank.Vanderlinden@Sun.COM>
* x86: Support x2APIC mode.Keir Fraser2008-05-011-2/+2
| | | | Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
* x86: Make apicid 32 bits in preparation for x2APIC support.Keir Fraser2008-05-011-2/+2
| | | | Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
* Rendezvous selected cpus in softirq (stop_machine).Keir Fraser2008-02-111-2/+1
| | | | | | | | | | | | | This is similar to stop_machine_run stub from Linux, to pull selected cpus in rendezvous point and the do some batch work under a safe environment. Current one usage is from S3 path, where individual cpu is pulled down with related online footprints being cleared. It's dangerous to have other cpus checking clobbered data structure in the middle, such as cpu_online_map, cpu_sibling_map, etc. Signed-off-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: allow pv guests to disable TSC for applicationsKeir Fraser2007-10-291-1/+0
| | | | | | | | | | | | | | | | | Linux, under CONFIG_SECCOMP, has been capable of hiding the TSC from processes for quite a while. This patch enables this to actually work for pv kernels, by allowing them to control CR4.TSD (and, as a simple thing to do at the same time, CR4.DE). Applies cleanly only on top of the previously submitted debug register handling patch. Signed-off-by: Jan Beulich <jbeulich@novell.com> Also clean up CR4 and EFER handling, and hack-n-slash header file inclusion madness to get the tree building again. Signed-off-by: Keir Fraser <keir@xensource.com>
* SMP support for Xen PM.kfraser@localhost.localdomain2007-07-191-0/+2
| | | | | | | | | Add SMP sleep support to Xen. One new utility is created to allow vcpu continue previous running after migration to new processor. Signed-off-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Keir Fraser <keir@xensource.com>
* Provide cpu hotplug support to Xen. Note this hotplugkfraser@localhost.localdomain2007-07-111-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | support is specific to PM, instead of for a run-time single CPU hotplug which can be a separate task. See embedded comment: /* * XXX: One important thing missed here is to migrate vcpus * from dead cpu to other online ones and then put whole * system into a stop state. It assures a safe environment * for a cpu hotplug/remove at normal running state. * * However for xen PM case, at this point: * -> All other domains should be notified with PM event, * and then in following states: * * Suspend state, or * * Paused state, which is a force step to all * domains if they do nothing to suspend * -> All vcpus of dom0 (except vcpu0) have already beem * hot removed * with the net effect that all other cpus only have idle vcpu * running. In this special case, we can avoid vcpu migration * then and system can be considered in a stop state. * * So current cpu hotplug is a special version for PM specific * usage, and need more effort later for full cpu hotplug. * (ktian1) */ Signed-off-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Keir Fraser <keir@xensource.com>
* Clean up subarch 'mach-foo' header files. No need forkaf24@firebug.cl.cam.ac.uk2006-04-031-5/+0
| | | | | | | | subarch apicdef.h and ipi.h can be much simplified. Signed-off-by: Keir Fraser <keir@xensource.com>
* Upgrade smpboot.c to linux-2.6.16-rc2 codebase.kaf24@firebug.cl.cam.ac.uk2006-02-161-7/+16
| | | | | | Signed-off-by: Keir Fraser <keir@xensource.com>
* bitkeeper revision 1.1718.1.5 (42b59f7dHnuJ9AFj24zaneKCDkFTCg)kaf24@firebug.cl.cam.ac.uk2005-06-191-0/+2
| | | | | | | | This patch adds dual-core support to xen, and improves HT detection. Adapted from linux 2.6.12. Signed-off-by: Nguyen Anh Quynh <aquynh@gmail.com> Signed-off-by: Keir Fraser <keir@xensource.com>
* bitkeeper revision 1.1653 (429f7931iJ8kgS9qBlBbtyY9irorQA)cl349@firebug.cl.cam.ac.uk2005-06-021-1/+0
| | | | | | | Many files: More include cleanups towards "include where it's used". Signed-off-by: Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
* bitkeeper revision 1.1615.1.1 (429c8530L_ZtVuxsQcKwKB3yPuljog)kaf24@firebug.cl.cam.ac.uk2005-05-311-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Subject: PAE support This patch adds initial support for PAE paging to xen. This patch does: * boot Xen itself with PAE paging enabled. * add PAE support to the dom0 domain builder. Some notes on the design and the changes: * There are two new config options: CONFIG_X86_PAE (boolean, same name Linux uses to simply things) and CONFIG_PAGING_LEVELS (int, possible values are 2,3,4). I've used #if CONFIG_PAGING_LEVELS for stuff which simply depends on the number of paging levels in the code common for x86-32/64, and CONFIG_X86_PAE for special PAE quirks or i386-only stuff. I've tried to avoid ifdefs if possible though, often I rearranged code to make it work in both PAE and non-PAE case instead. * idle_pg_table: 3rd level is statically initialized, 2nd level is contignous in physical and virtual memory, so it can be addressed linear (the dom0 builder uses the same trick to simplify things a bit btw.). There are two new symbols: idle_pg_table_l3 and idle_pg_table_l2 for the two tables. idle_pg_table is aliased to the toplevel page table, i.e. idle_pg_table_l3 in PAE mode and idle_pg_table_l2 in non-pae mode. The idle l3 table is actually never ever touched after boot, the l2 table is accessed via idle_pg_table_l2 and addressed linear in both PAE and non-PAE mode. * I've added a "intpte_t" type and a PRIpte define, modeled after the C99 inttypes.h header, for page table entries. Signed-off-by: Gerd Knorr <kraxel@bytesex.org>
* bitkeeper revision 1.1449.1.1 (428b6f1cotmJt0X1Gu4JjKeAeDY1BQ)kaf24@firebug.cl.cam.ac.uk2005-05-181-1/+2
| | | | | | | | Re-factor current.h. It now requires no sub-architecture portions, and stack offset calculations are cleaned up by introduction of a cpu_info structure. Signed-off-by: Keir Fraser <keir@xensource.com>
* bitkeeper revision 1.1389.10.1 (427fa2d3ZV92f_ErvLuIzWbV1f67QA)kaf24@firebug.cl.cam.ac.uk2005-05-091-48/+44
| | | | | | | Phase 1 of upgrading platform code to be derived from Linux 2.6.11 rather than 2.4.x. Signed-off-by: Keir Fraser <keir@xensource.com>
* bitkeeper revision 1.1159.212.72 (42011b79Y7C9nEKFZ5pdQXwp8jC9hw)kaf24@scramble.cl.cam.ac.uk2005-02-021-5/+0
| | | | | | | More x86/64. Now boot secondary CPUs, but I seem to have problems executing IRET, so interrupts are fatal. Signed-off-by: keir.fraser@cl.cam.ac.uk
* bitkeeper revision 1.1159.51.2 (412cb2dfaIDYjySJYYMTByGbcM77UA)kaf24@labyrinth.cl.cam.ac.uk2004-08-251-19/+0
| | | | | More grant-table code, and some related sundry improvements.
* bitkeeper revision 1.1041.4.1 (40e49f12Fj3pygWG3LxLQ2tcwBx24A)kaf24@scramble.cl.cam.ac.uk2004-07-011-1/+0
| | | | | | Fix common files when compiled without CONFIG_SMP (some x86-specific files still don't work).
* bitkeeper revision 1.955.1.4 (40ca25caD-WBu24eVfed1yswCl7JeQ)kaf24@scramble.cl.cam.ac.uk2004-06-111-2/+2
| | | | | | | | | | | | | | | | | | Many files: More x86_64 stuff. pda.h: Rename: xen/include/asm-x86/x86_64/pda.h -> xen/include/asm-x86/pda.h .del-config.h~ab742eeb14ad808f: Delete: xen/include/asm-x86/x86_64/config.h arch-x86_32.h: Rename: xen/include/hypervisor-ifs/arch_x86_32.h -> xen/include/hypervisor-ifs/arch-x86_32.h arch-x86_64.h: Rename: xen/include/hypervisor-ifs/arch_x86_64.h -> xen/include/hypervisor-ifs/arch-x86_64.h arch_x86_32.h: Rename: xen/include/hypervisor-ifs/arch-x86/hypervisor-if.h -> xen/include/hypervisor-ifs/arch_x86_32.h arch_x86_64.h: Rename: xen/include/hypervisor-ifs/arch-x86_64/hypervisor-if.h -> xen/include/hypervisor-ifs/arch_x86_64.h
* bitkeeper revision 1.952 (40c8935a3XSRdQfnx5RoO7XgaggvOQ)kaf24@scramble.cl.cam.ac.uk2004-06-101-0/+120
Towards x86_64 support. Merged a bunch of the existing x86_64 stuff back into a generic 'x86' architecture. Aim is to share as much as possible between 32- and 64-bit worlds.