aboutsummaryrefslogtreecommitdiffstats
path: root/xen/arch/x86/hvm/vpt.c
Commit message (Collapse)AuthorAgeFilesLines
* x86/vtsc: update vcpu_time in hvm_set_guest_timeRoger Pau Monné2013-06-051-1/+13
| | | | | | | | | | | When using a vtsc, hvm_set_guest_time changes hvm_vcpu.stime_offset, which is used in the vcpu time structure to calculate the tsc_timestamp, so after updating stime_offset we need to propagate the change to vcpu_time in order for the guest to get the right time if using the PV clock. Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> Reviewed-by: George Dunlap <george.dunlap@eu.citrix.com>
* x86/HVM: properly handle RTC periodic timer even when !RTC_PIEJan Beulich2013-05-211-4/+43
| | | | | | | | | Since in that case the processing it pt_intr_post() won't occur, we need to do some additional work in pt_update_irq(). Additionally we must not pay attention to the respective IRQ being masked. Signed-off-by: Jan Beulich <jbeulich@suse.com> Tested-by: Roger Pau Monné <roger.pau@citrix.com> (FreeBSD guest)
* x86/HVM: fix legacy PIC check in pt_update_irq()Jan Beulich2013-05-021-2/+3
| | | | | | | | | | | | | Depending on the IRQ we need to - not look at the PIC at all is this is the LAPIC timer (in that case we're dealing with a vector number rather than an IRQ one), - not look at the PIC for any non-legacy interrupt, - look at the correct PIC for the IRQ (which will always be PIC 2 for the RTC, and possibly also for HPET). Signed-off-by: Jan Beulich <jbeulich@suse.com> Tested-by: Roger Pau Monné <roger.pau@citrix.com> (FreeBSD guest) Reviewed-by: Tim Deegan <tim@xen.org>
* x86/HVM: assorted RTC emulation adjustmentsJan Beulich2013-02-051-2/+5
| | | | | | | | | | | | | - only call check_update_timer() on REG_B writes when SET changes - only call alarm_timer_update() on REG_B writes when relevant bits change - instead properly handle AF and PF when the guest is not also setting AIE/PIE respectively (for UF this was already the case, only a comment was slightly inaccurate), including calling the respective update functions upon REG_C reads Signed-off-by: Jan Beulich <jbeulich@suse.com> Tested-by: Olaf Hering <olaf@aepfle.de>
* xen: enable Virtual-interrupt deliveryJiongxi Li2012-09-171-2/+13
| | | | | | | | | | | | | | | | | | | Virtual interrupt delivery avoids Xen to inject vAPIC interrupts manually, which is fully taken care of by the hardware. This needs some special awareness into existing interrupr injection path: For pending interrupt from vLAPIC, instead of direct injection, we may need update architecture specific indicators before resuming to guest. Before returning to guest, RVI should be updated if any pending IRRs EOI exit bitmap controls whether an EOI write should cause VM-Exit. If set, a trap-like induced EOI VM-Exit is triggered. The approach here is to manipulate EOI exit bitmap based on value of TMR. Level triggered irq requires a hook in vLAPIC EOI write, so that vIOAPIC EOI is triggered and emulated Signed-off-by: Gang Wei <gang.wei@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@intel.com> Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> Committed-by: Keir Fraser <keir@xen.org>
* Revert 25843:51090fe1ab97 (x86/HVM: assorted RTC emulation adjustments)Jan Beulich2012-09-121-5/+2
| | | | This was found to cause RHEL6 HVM guests to hang during shutdown.
* x86/HVM: assorted RTC emulation adjustmentsJan Beulich2012-09-111-2/+5
| | | | | | | | | | | | | | | | | | | | | | - don't look at RTC_PIE in rtc_timer_update(), and hence don't call the function on REG_B writes at all - only call alarm_timer_update() on REG_B writes when relevant bits change - only call check_update_timer() on REG_B writes when SET changes - instead properly handle AF and PF when the guest is not also setting AIE/PIE respectively (for UF this was already the case, only a comment was slightly inaccurate) - raise the RTC IRQ not only when UIE gets set while UF was already set, but generalize this to cover AIE and PIE as well - properly mask off bit 7 when retrieving the hour values in alarm_timer_update(), and properly use RTC_HOURS_ALARM's bit 7 when converting from 12- to 24-hour value - also handle the two other possible clock bases - use RTC_* names in a couple of places where literal numbers were used so far Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* x86: split struct domainJan Beulich2011-04-051-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is accomplished by converting a couple of embedded arrays (in one case a structure containing an array) into separately allocated pointers, and (just as for struct arch_vcpu in a prior patch) overlaying some PV-only fields with HVM-only ones. One particularly noteworthy change in the opposite direction is that of PITState - this field so far lived in the HVM-only portion, but is being used by PV guests too, and hence needed to be moved out of struct hvm_domain. The change to XENMEM_set_memory_map (and hence libxl__build_pre() and the movement of the E820 related pieces to struct pv_domain) are subject to a positive response to a query sent to xen-devel regarding the need for this to happen for HVM guests (see http://lists.xensource.com/archives/html/xen-devel/2011-03/msg01848.html). The protection of arch.hvm_domain.irq.dpci accesses by is_hvm_domain() is subject to confirmation that the field is used for HVM guests only (see http://lists.xensource.com/archives/html/xen-devel/2011-03/msg02004.html). In the absence of any reply to these queries, and given the early state of 4.2 development, I think it should be acceptable to take the risk of having to later undo/redo some of this. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: Do not include apic.h/io_apic.h from asm/smp.hKeir Fraser2010-06-111-0/+1
| | | | | | ...and fix up the ensuing fall-out of implicit dependencies Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86 hvm: implement vector callback for evtchn deliveryKeir Fraser2010-05-251-0/+3
| | | | | | Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: TSC handling cleanups (version 2)Keir Fraser2010-05-221-3/+0
| | | | | | | | | | | | | | | "I am removing the tsc_scaled variable that is never actually used because when tsc needs to be scaled vtsc is 1. I am also making this more explicit in tsc_set_info. I am also removing hvm_domain.gtsc_khz that is a duplicate of d->arch.tsc_khz. I am using scale_delta(delta, &d->arch.ns_to_vtsc) to scale the tsc value before returning it to the guest like in the pv case. I added a feature flag to specify that the pvclock algorithm is safe to be used in an HVM guest so that the guest can now use it without hanging." Version 2 fixes a bug which breaks PV domU time. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
* Revert 21339:804304d4e05d "x86: TSC handling cleanups"Keir Fraser2010-05-211-0/+3
| | | | | | It very much breaks PV domU boot. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: TSC handling cleanupsKeir Fraser2010-05-111-3/+0
| | | | | | | | | | | | | "I am removing the tsc_scaled variable that is never actually used because when tsc needs to be scaled vtsc is 1. I am also making this more explicit in tsc_set_info. I am also removing hvm_domain.gtsc_khz that is a duplicate of d->arch.tsc_khz. I am using scale_delta(delta, &d->arch.ns_to_vtsc) to scale the tsc value before returning it to the guest like in the pv case. I added a feature flag to specify that the pvclock algorithm is safe to be used in an HVM guest so that the guest can now use it without hanging." Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
* x86: Allow TSC mode (emulate vs native) to be configured per domain.Keir Fraser2009-09-281-1/+1
| | | | | | | | The default is to emulate. Old saved images will be restored with legacy behaviour however (native TSC, no emulation). Signed-off-by: Dan Magenheimer <dan.magenheimer@oracle.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86 hvm: *really* fix missing ticks bug of c/s 20218Keir Fraser2009-09-251-17/+13
| | | | | | | | With c/s 20218, timer ticks might be missed when IRQs of a timer are queued. "Next scheduled time" is accumulated wrongly. Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86 hvm: fix missing ticks bug of c/s 20218Keir Fraser2009-09-221-1/+4
| | | | | | | | | | With c/s 20218, timer ticks might be missed when IRQs of a timer are queued. "Next scheduled time" is accumulated wrongly. Thanks to Christoph for the report. Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com> Reported-by: Christoph Egger <Christoph.Egger@amd.com>
* x86 hvm: suspend platform timer emulation while its IRQ is maskedKeir Fraser2009-09-161-7/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch gets rid of a timer which IRQ is masked from vcpu's timer list. It reduces the overhead of VM EXIT and context switch of vm. Also fixes a potential bug. (1) VCPU#0: mask the IRQ of a timer. (ex. vioapic.redir[2].mask=1) (2) VCPU#1: pt_timer_fn() is invoked by expiration of the timer. (3) VCPU#1: pt_update_irq() is called but does nothing by pt_irq_masked()==1. (4) VCPU#1: sleep by halt. (5) VCPU#0: unmask the IRQ of the timer. After that, no one wakes up the VCPU#1. IRQ of ISA is masked by: - PIC's IMR - IOAPIC's redir[0] - IOAPIC's redir[N].mask - LAPIC's LVT0 - LAPIC enabled/disabled IRQ of LAPIC timer is masked by: - LAPIC's LVTT - LAPIC disabled When above stuffs are changed, the corresponding vcpu is kicked and suspended timer emulation is resumed. In addition, a small bug fix in pt_adjust_global_vcpu_target(). Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
* x86 hvm: don't set periodical timer again until its IRQ is delivered.Keir Fraser2009-09-161-11/+12
| | | | | | | | | | | | | | | | Modern Windows OS (ex XP,2003,2008) never use the PIT timer, and neither cpu#0's LAPIC timer after boot. Despite that, xen emulates them busily. It's inefficient. With this patch, setting a timer is defered while its IRQ is masked. The reasons why pt_timer_fn() simply calls vcpu_kick() are: - checking by pt_irq_masked() is duplicated. pt_update_irq() also does. - pt_timer_fn() is likely called on the same processor as pt->vcpu->processor. Hence vcpu_kick() hardly send IPI. Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
* x86 vpt: Small performance fixes.Keir Fraser2009-09-031-1/+2
| | | | | | | 1. once one-shot timer is fired, IRQ is raised repeatedly forever. 2. Test pending_intr_nr before pt_irq_masked(), as it is cheaper. Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
* x86: rdtsc emulation (PV and HVM) must be monotonically increasingKeir Fraser2009-09-021-2/+2
| | | | | | | | | | The Intel SDM (section 18.10) clearly states that rdtsc returns a "monotonically increasing unique value". Current emulation code for rdtsc (both PV and HVM) returns only a monotonically-non-decreasing (non-unique) value, so ensure stale value is always incremented. Signed-off-by: Dan Magenheimer <dan.magenheimer@oracle.com>
* x86 hvm: remove pt_reset()Keir Fraser2009-09-011-18/+0
| | | | | | | Virtual platform timers are not sync'ed with guest's TSC any more since c/s 17716. Thus pt_reset is now useless. Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
* x86,hvm: clean up vpt's period_cycles fieldKeir Fraser2009-07-281-4/+3
| | | | | | | In struct periodic_time, pt->period_cycles is not cpu cycles since c/s 17716 and its value is always the same as pt->period. Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
* x86,hvm: Allow delivery of timer interrupts to VCPUs != 0Keir Fraser2009-07-071-0/+50
| | | | | | | This patch is needed for kexec/kdump since VCPU#0 is halted. Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* Scaling guest's TSC when the target machine's frequency is differentKeir Fraser2009-06-241-1/+2
| | | | | | | | | with its requirement. Using trap&emulate for guest's each rdtsc instruction first, maybe it can be optimized later. Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
* save/restore : Save guest's preferred TSC frequency in imageKeir Fraser2009-06-241-0/+2
| | | | | | | | For save/restore or live migration between two different frequency platforms, guest's preferred TSC frequency is required to caculate guest's TSC after resotre, so save it in the image header. Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
* hvm/vpt: Check that an irq is not blocked before waking the vcpuKeir Fraser2009-03-091-1/+2
| | | | | | | | | Currently, when a timer fires for a vpt interrupt, the interrupt handler calls vcpu_kick() without checking to see if the IRQ is blocked. This causes the vcpu to wake up out of a halt when it shouldn't. Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
* x86: Clean up vpt-align patch.Keir Fraser2009-02-131-5/+11
| | | | | | | Also disable by default if not specified in domain config. Otherwise the feature would be incorrectly enabled for old saved domain images. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* hvm: Align periodic vpts.Keir Fraser2009-02-131-2/+8
| | | | | | | Aligned periodic vpts can improve the HVM guest power consumption a lot, especially while the guest using high HZ such as 1000HZ. Signed-off-by: Wei Gang <gang.wei@intel.com>
* hvm: Do not mess with APIC timer deadline if in one-shot mode.Keir Fraser2008-10-281-1/+1
| | | | Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86, hvm: Allow 100us periodic virtual timersKeir Fraser2008-10-221-3/+3
| | | | | | | Adjust vpt and hpet minimum period (for timers) from 900us to 100us to be able to pass Windows 2008 compatibility tests. Signed-off-by: Peter Johnston <peter.johnston@citrix.com>
* Port HPET device model to vpt timer subsystemKeir Fraser2008-10-221-6/+6
| | | | | | | | | | | | | | | | | | | | | The current hpet implementation runs a one-shot xen timer for each hpet timer whenever the main counter is enabled regardless of whether or not the individual hpet timers are enabled. When the timer fires, if it is enabled the interrupt is routed to the guest. If the hpet timer is periodic, a new one-shot timer is set, for NOW()+period. There are a number of problems with this the most significant is guest time drift. Windows does not read the hardware clock to verify time, it depends on timer interrupts firing at the expected interval. The existing implementation queues a new one-shot timer each time it fires and does not allow for a difference between NOW() and the time the timer was expected to fire, causing drift. Also there is no allowance for lost ticks. This modification changes HPET to use the Virtual Platform Timer (VPT) and, for periodic timers, to use periodic timers. The VPT ensures an interrupt is delivered to the guest for each period that elapses, plus, its use of xen periodic timers ensures no drift. Signed-off-by: Peter Johnston <peter.johnston@citrix.com>
* x86: i8254 device model is shared between PV and HVM guests, so mustKeir Fraser2008-05-301-0/+3
| | | | | | take care not to run hvm_get_guest_time() on a PV VCPU. The spinlock is not initialised and spin_lock() can thus spin forever. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* hvm: Build guest timers on monotonic system time.Keir Fraser2008-05-241-1/+31
| | | | | | | | | | Move hvm platform timers from underlying physical CPU TSC to Xen system time and ensure domain-wide monotonicity. TSC on many systems may skew between processors leading to 'time going backwards' messages from some guests. Signed-off-by: Dan Magenheimer <dan.magenheimer@oracle.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86 hvm: Warn only once per time source when the periodic tiemout isKeir Fraser2008-05-061-3/+3
| | | | | set 'too small'. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* hvm: time: Fixes to 'SYNC' (no_missed_ticks_pending) timer handling.Keir Fraser2008-01-081-2/+3
| | | | | Based on a patch by Dave Winchell <dwinchell@virtualiron.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* hvm: Fix mistake in timer cleanup.Keir Fraser2007-12-131-2/+2
| | | | | Spotted by Dexuan Cui <dexuan.cui@intel.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* hvm: Reduce vpt.c dependencies on external timer details.Keir Fraser2007-12-121-27/+63
| | | | Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* hvm: Fix destroy_periodic_time() to not race destruction of one-shot timers.Keir Fraser2007-12-121-6/+9
| | | | | | This bug was tracked down by Dexuan Cui <dexuan.cui@intel.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* hvm: Split no_missed_tick_accounting into two modes:Keir Fraser2007-12-061-3/+10
| | | | | | | | | * no_missed_ticks_pending ('SYNC') * one_missed_tick_pending ('MIXED') This is based on a patch by Dave Winchell <dwinchell@virtualiron.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86, hvm: Clean up periodic timer code a little. This leads naturallyKeir Fraser2007-11-081-16/+10
| | | | | | | to a no-missed-tick-accounting mode which is a combination of ticks delivered 'off beat' immediately upon re-scheduling when ticks are missed, then reverting to delivering ticks 'on beat' as usual. Signed-off-by: Keir Fraser <keir@xensource.com>
* x86, hvm: Fix typo in no-missed-tick-accounting timer mode.Keir Fraser2007-11-071-1/+1
| | | | | From: Dave Winchell <dwinchell@virtualiron.com> Signed-off-by: Keir Fraser <keir@xensource.com>
* x86, hvm: More fixes to no-missed-tick-accounting mode.Keir Fraser2007-11-051-8/+13
| | | | Signed-off-by: Keir Fraser <keir@xensource.com>
* hvm: Timer fixes:Keir Fraser2007-11-021-22/+10
| | | | | | | | | | | | 1. Do not record more than one pending interrupt in no-missed-tick-accounting mode. We do not stack up missed interrupts in this timer mode. 2. Always record all missed ticks when we are in a missed-tick-accounting mode. Do not have a ceiling for this as it simply causes guests to lose track of wall time. 3. General bits of cleanup and simplification. From: Dave Winchell <dwinchell@virtualiron.com> Signed-off-by: Keir Fraser <keir@xensource.com>
* x86, hvm: Fix 'no_missed_tick_accoutning' timer mode.Keir Fraser2007-10-311-7/+7
| | | | | From: Haitao Shan <haitao.shan@intel.com> Signed-off-by: Keir Fraser <keir@xensource.com>
* x86, hvm: New timer mode 'no missed-tick accounting'.Keir Fraser2007-10-301-25/+38
| | | | | From: Haitao Shan <haitao.shan@intel.com> Signed-off-by: Keir Fraser <keir@xensource.com>
* LAPIC timer accounting fixKeir Fraser2007-10-261-0/+7
| | | | | | | | | | Offset emulated local APIC timer so it doesn't tick during guest's timer related processing. Otherwise, guests using the local APIC for process accounting can see long sequences of process ticks incorrectly charged to interrupt processing. Signed-off-by: Ben Guthro <bguthro@virtualron.com> Signed-off-by: Gary Grebus <ggrebus@virtualiron.com>
* hvm, x86: Allow virtual timer mode to be specified.Keir Fraser2007-10-261-14/+33
| | | | | | | | | | | In HVM config file: timer_mode=0 # Default: virtual time is delayed when timer ticks are # missed dur to preemption timer_mode=1 # Virtual time always equals wall time, even while missed # ticks are pending From: Haitao Shan <haitao.shan@intel.com> Signed-off-by: Keir Fraser <keir@xensource.com>
* hvm: Fix one-shot timers. Do not disable until the interrupt has beenKeir Fraser2007-10-171-11/+12
| | | | | latched by the target VCPU. Signed-off-by: Keir Fraser <keir@xensource.com>
* hvm: Re-jig event delivery logic to better integrate TPR management.Keir Fraser2007-10-011-7/+8
| | | | Signed-off-by: Keir Fraser <keir@xensource.com>
* [HVM] Don't count "missed ticks" on one-shot timers.Tim Deegan2007-09-241-4/+13
| | | | | It's not clear what it would mean, and it leads to division by zero. Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-21 01:38:55 +0000