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* x86/hvm: constify static data where possibleJan Beulich2012-09-141-2/+2
| | | | | | | | In a few cases this also extends to making them static in the first place. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* Fix save/restore of guest PAT table in HAP paging mode.Gianluca Guida2012-04-171-22/+2
| | | | | | | | | | | | | | HAP paging mode guests use direct MSR read/write into the VMCS/VMCB for the guest PAT table, while the current save/restore code was accessing only the pat_cr field in hvm_vcpu, used when intercepting the MSR mostly in shadow mode (the Intel scenario is a bit more complicated). This patch fixes this issue creating a new couple of hvm_funcs, get/set_guest_pat, that access the right PAT table based on the paging mode and guest configuration. Signed-off-by: Gianluca Guida <gianluca.guida@citrix.com> Acked-by: Tim Deegan <tim@xen.org> Committed-by: Keir Fraser <keir@xen.org>
* replace bogus gdprintk() uses with {,d}printk()Jan Beulich2012-02-161-1/+2
| | | | | | | | | | | When the subject domain is not the current one (e.g. during domctl or HVM save/restore handling), use of gdprintk() is questionable at best, as it won't give the intended information on what domain is affected. Use plain printk() or dprintk() instead, but keep things (mostly) as guest messages by using XENLOG_G_*. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* Modify naming of queries into the p2mAndres Lagar-Cavilla2011-11-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | Callers of lookups into the p2m code are now variants of get_gfn. All callers need to call put_gfn. The code behind it is a no-op at the moment, but will change to proper locking in a later patch. This patch does not change functionality. Only naming, and adds put_gfn's. set_p2m_entry retains its name because it is always called with p2m_lock held. This patch is humongous, unfortunately, given the dozens of call sites involved. After this patch, anyone using old style gfn_to_mfn will not succeed in compiling their code. This is on purpose: adapt to the new API. Signed-off-by: Andres Lagar-Cavilla <andres@lagarcavilla.org> Acked-by: Tim Deegan <tim@xen.org> Committed-by: Keir Fraser <keir@xen.org>
* use xzalloc in x86 codeJan Beulich2011-10-041-5/+2
| | | | | | | This includes the removal of a redundant memset() from microcode_amd.c. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* x86/mm/p2m: Fix locking discipline around p2m lookups.Tim Deegan2011-06-021-1/+1
| | | | | | | | | | All gfn_to_mfn* functions except _query() might take the p2m lock, so can't be called with a p2m, shadow, hap or log_dirty lock held. The remaining offender is the memory sharing code, which calls _unshare() from inside the pagetable walker! Fixing that is too big for a cleanup patch like this one. Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
* x86/mm/p2m: Make p2m interfaces take struct domain arguments.Tim Deegan2011-06-021-1/+1
| | | | | | | | | | | | | | | | | As part of the nested HVM patch series, many p2m functions were changed to take pointers to p2m tables rather than to domains. This patch reverses that for almost all of them, which: - gets rid of a lot of "p2m_get_hostp2m(d)" in code which really shouldn't have to know anything about how gfns become mfns. - ties sharing and paging interfaces to a domain, which is what they actually act on, rather than a particular p2m table. In developing this patch it became clear that memory-sharing and nested HVM are unlikely to work well together. I haven't tried to fix that here beyond adding some assertions around suspect paths (as this patch is big enough with just the interface changes) Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
* xen: remove more declarations from C files.Tim Deegan2011-05-271-2/+0
| | | | | | | | | | This patch moves some more, mostly data, extern declarations into header files. I haven't been as strict as I was with functions; in particular there are a number of declarations of assembler labels that are only used in one place. I've also left a few compat-mode tricks, and all the magic in symbols.c Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
* x86 hvm: Fix MTRR physaddr-width check.Keir Fraser2010-11-091-29/+27
| | | | | | | Should be checking against physaddr width presented to teh guest, rather than the host physaddr width. Signed-off-by: Keir Fraser <keir@xen.org>
* Nested Virtualization: p2m infrastructureKeir Fraser2010-08-091-1/+1
| | | | | | | | Change p2m infrastructure to operate on per-p2m instead of per-domain. This allows us to use multiple p2m tables per-domain. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> Acked-by: Tim Deegan <Tim.Deegan@citrix.com>
* VMX: cleanup ept_set_entry:Keir Fraser2010-07-021-1/+1
| | | | | | | | | 1) more strict input parameters checking; 2) better comments; 3) fewer variable; 4) change direct_mmio type to bool_t. Signed-off-by: Xin Li <xin.li@intel.com>
* x86: Intel EPT entry structure changes.Keir Fraser2010-02-041-4/+4
| | | | | | | | | - Intel SDM defines bit6 in EPT page table entry as "Ignore PAT memory type", so change the abbreviation from "igmt" to "ipat". - Change the mfn and avail2 fields according to SDM definition. Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
* Scattered code arrangement cleanups.Keir Fraser2009-10-071-5/+0
| | | | | | | | - remove redundant declarations - add/move prototypes to headers - move things where they belong to Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
* ept: code clean up and formatting.Keir Fraser2009-08-061-3/+2
| | | | | | | Fix alignment and comments and add and remove spaces and lines where appropriate. Signed-off-by: Patrick Colp <Patrick.Colp@citrix.com>
* ept mtrr: replace unsigned long with mfn_t for mfns.Keir Fraser2009-08-061-3/+4
| | | | Signed-off-by: Patrick Colp <Patrick.Colp@citrix.com>
* x86_64: allow more vCPU-s per guestKeir Fraser2009-06-181-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Since the shared info layout is fixed, guests are required to use VCPUOP_register_vcpu_info prior to booting any vCPU beyond the traditional limit of 32. MAX_VIRT_CPUS, being an implemetation detail of the hypervisor, is no longer being exposed in the public headers. The tools changes are clearly incomplete (and done only so things would build again), and the current state of the tools (using scalar variables all over the place to represent vCPU bitmaps) very likely doesn't permit booting DomU-s with more than the traditional number of vCPU-s. Testing of the extended functionality was done with Dom0 (96 vCPU-s, as well as 128 vCPU-s out of which the kernel elected - by way of a simple kernel side patch - to use only some, resulting in a sparse bitmap). ia64 changes only to make things build, and build-tested only (and the tools part only as far as the build would go without encountering unrelated problems in the blktap code). Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86/hvm: fix off-by-one errors in vcpuid range checksKeir Fraser2009-05-271-1/+1
| | | | Signed-off-by: Jan Beulich <jbeulich@novell.com>
* [VTD] Utilise the snoop control capability in shadow with VT-d codeKeir Fraser2009-02-201-5/+14
| | | | | | | | | | | | | We compute the shadow PAT index in leaf page entries now as: 1) No VT-d assigned: let shadow PAT index as WB, handled already in shadow code before. 2) direct assigned MMIO area: let shadow code compute the shadow PAT with gMTRR=UC and gPAT value. 3) Snoop control enable: let shadow PAT index as WB. 4) Snoop control disable: let shadow code compute the shadow PAT with gMTRR and gPAT, handled already in shadow code before Signed-off-by: Xin, Xiaohui <xiaohui.xin@intel.com>
* EPT/VT-d: Enhance MTRR/PAT virtualization when EPT/VT-d both enabledKeir Fraser2009-01-231-1/+19
| | | | | | | | Set effective memory type for EPT according to the VT-d snoop control capability, and also includes some cleanups for EPT & VT-d both enabled. Signed-off-by: Edwin Zhai <Edwin.Zhai@intel.com> Signed-off-by: Xiaohui Xin <xiaohui.xin@intel.com>
* x86, hvm: Better MTRR type check.Keir Fraser2008-11-061-1/+4
| | | | | From: Disheng Su <disheng.su@intel.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86, hvm: Only warn on memory attribute conflicts for real RAM.Keir Fraser2008-11-051-6/+7
| | | | | From: Disheng Su <disheng.su@intel.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* MTRR virtualization for Intel EPTKeir Fraser2008-07-071-0/+27
| | | | Signed-off-by: Xiaohui Xin <xiaohui.xin@intel.com>
* x86, hvm: Lots of MTRR/PAT emulation cleanup.Keir Fraser2008-04-161-226/+60
| | | | | | | | | | - Move MTRR MSR initialisation into hvmloader. - Simplify initialisation logic by overlaying UC on default WB rather than vice versa. - Clean up hypervisor HVM MTRR/PAE code's interface with rest of hypervisor. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86, hvm: Fix up MTRR setup for extra magic page (IDENT_PT).Keir Fraser2008-04-101-1/+1
| | | | Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86, hvm: MTRR can't cover all the memery rangesKeir Fraser2008-01-241-1/+14
| | | | | | MTRR can't cover all the memery ranges, due to guest E820 is changed by CS:16728 with current method. Signed-off-by: Disheng Su <disheng.su@intel.com>
* hvm: MTRR MSRs save/restore support.Keir Fraser2007-12-121-0/+80
| | | | Signed-off-by: Disheng Su <disheng.su@intel.com>
* x86: Fix MTRR/PAT virtualisation on PAEKeir Fraser2007-10-261-114/+118
| | | | | | Various 'long's should be 'u64's. Signed-off-by: Disheng Su <disheng.su@intel.com>
* x86: Remove dependency on stdbool.h.Keir Fraser2007-10-241-8/+7
| | | | Signed-off-by: Keir Fraser <keir@xensource.com>
* hvm, vt-d: Add memory cache-attribute pinning domctl for HVMKeir Fraser2007-10-231-0/+81
| | | | | | guests. Use this to pin virtual framebuffer VRAM as attribute WB, even if guest tries to map with other attributes. Signed-off-by: Disheng Su <disheng.su@intel.com>
* hvm/x86: MTRR/PAT virtualisation.Keir Fraser2007-10-221-0/+687
Signed-off-by: Disheng Su <disheng.su@intel.com>
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