| Commit message (Collapse) | Author | Age | Files | Lines |
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This is accomplished by converting a couple of embedded arrays (in one
case a structure containing an array) into separately allocated
pointers, and (just as for struct arch_vcpu in a prior patch)
overlaying some PV-only fields with HVM-only ones.
One particularly noteworthy change in the opposite direction is that
of PITState - this field so far lived in the HVM-only portion, but is
being used by PV guests too, and hence needed to be moved out of
struct hvm_domain.
The change to XENMEM_set_memory_map (and hence libxl__build_pre() and
the movement of the E820 related pieces to struct pv_domain) are
subject to a positive response to a query sent to xen-devel regarding
the need for this to happen for HVM guests (see
http://lists.xensource.com/archives/html/xen-devel/2011-03/msg01848.html).
The protection of arch.hvm_domain.irq.dpci accesses by is_hvm_domain()
is subject to confirmation that the field is used for HVM guests only
(see
http://lists.xensource.com/archives/html/xen-devel/2011-03/msg02004.html).
In the absence of any reply to these queries, and given the early
state of 4.2 development, I think it should be acceptable to take the
risk of having to later undo/redo some of this.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
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Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
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{vcpu,domain} and {vlapic,vpic,vrtc,hpet}. Completely avoids
accidental aliasing.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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This patch is needed for kexec/kdump since VCPU#0 is halted.
Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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muldiv64 is used to caculate u64*u32/u32, and we
will use it for TSC scaling.
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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For save/restore or live migration between two different frequency
platforms, guest's preferred TSC frequency is required to caculate
guest's TSC after resotre, so save it in the image header.
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
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The current hpet implementation runs a one-shot xen timer for each
hpet timer whenever the main counter is enabled regardless of whether
or not the individual hpet timers are enabled. When the timer fires,
if it is enabled the interrupt is routed to the guest. If the hpet
timer is periodic, a new one-shot timer is set, for NOW()+period.
There are a number of problems with this the most significant is guest
time drift. Windows does not read the hardware clock to verify time,
it depends on timer interrupts firing at the expected interval. The
existing implementation queues a new one-shot timer each time it fires
and does not allow for a difference between NOW() and the time the
timer was expected to fire, causing drift. Also there is
no allowance for lost ticks. This modification changes HPET to use the
Virtual Platform Timer (VPT) and, for periodic timers, to use periodic
timers. The VPT ensures an interrupt is delivered to the guest for
each period that elapses, plus, its use of xen periodic timers ensures
no drift.
Signed-off-by: Peter Johnston <peter.johnston@citrix.com>
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take care not to run hvm_get_guest_time() on a PV VCPU. The spinlock
is not initialised and spin_lock() can thus spin forever.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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Move hvm platform timers from underlying physical CPU TSC to Xen
system time and ensure domain-wide monotonicity. TSC on many systems
may skew between processors leading to 'time going backwards' messages
from some guests.
Signed-off-by: Dan Magenheimer <dan.magenheimer@oracle.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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Signed-off-by: Tian Kevin <kevin.tian@intel.com>
Signed-off-by: Yu Ke <ke.yu@intel.com>
Signed-off-by: Ke Liping <liping.ke@intel.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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instructions.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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It is now smaller than a page (4kB) on x86/32 and x86/64.
Signed-off-by: Keir Fraser <keir@xensource.com>
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as long as Xen doesn't itself make use of PIT channel 2.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Keir Fraser <keir@xensource.com>
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Handy for correctness.
Signed-off-by: Keir Fraser <keir@xensource.com>
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models. These timers are always bound to vcpu0, where a specific vcpu
matters.
Signed-off-by: Keir Fraser <keir@xensource.com>
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Signed-off-by: Keir Fraser <keir@xensource.com>
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Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
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- Don't save PIT's last-load-time or CPU's vmx-assist bits
- Reorder save as cpu, PICs, irqs, timers
- Save the correct value in the HPET's counter.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
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- All entries are now defined as structs and saved/restored
in self-contained operations.
- Save/restore operations are type-safe, to tie each entry's
typecode to a particular struct and its length.
- Save/restore handlers are registered once per host instead of
per domain.
- Detect buffer overrun before it happens and abort.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
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This fixes some time-speedup after restore in guests that use the PIT.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
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Define public structure for the saved PIT data and use it instead
of a series of explicit loads and stores.
Don't save ephemeral Xen timer structs; rebuild them instead.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
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Signed-off-by: Zhai Edwin <edwin.zhai@intel.com>
save/restore all dev state in HV such as PIT/PIC/APIC
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The function pit_load_count incorrectly references current for
determining whether the channel number is zero. This breaks
when starting a new guest because current points to dom0.
The fix is to explicitly pass the address for verification.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Xiaowei Yang <xiaowei.yang@intel.com>
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programmed as periodic timer and adds them to abstract layer, which
keeps track of pending_intr_nr to avoid time interrupt lost and
sync'ed timer with TSC.
It also makes some cleanup to the time related code.
Signed-off-by: Xiaowei Yang <xiaowei.yang@intel.com>
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
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This is needed for some video-controller BIOSes which use PIT channel
2 for delay loops.
Signed-off-by: Xiaowei Yang <xiaowei.yang@intel.com>
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and extra code in hvm_vcpu_initialise(). Remove 'apic' config
option -- HVM CPUs will always have an APIC (which should be
set up in virtual wire mode for backward compatibility, just as
in a real system).
Signed-off-by: Keir Fraser <keir@xensource.com>
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Guest physical addresses are not guaranteed to fit in either a pointer
or an unsigned long int; use paddr_t for them.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
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We found Vista polls ACPI timer very frequently (about 15 times
averagely) when handling timer (RTC @ 64HZ) interrupt routine. Though
the exact reason is known, it should be related to system time
adjustment. When it's in Qemu, the overhead is big. After moving,
Vista's idle overhead decreases dramatically from ~10% to 0.9%.=20
Another benefit is that Vista can only pass Performance rating with
this patch. The root cause is that ACPI timer in Qemu isn't
synchronous with other platform timer in HV, which results in Vista
complains "can't measure TSC frequency".
This patch changes vpit.h to vpt.h, for it not only has pit structure
in it, but other platform timer's structure. Another change is moving
ACPI timer and related address from acpi.h to ioreq.h, which can be shared
by HV and ACPI firmware.
Signed-off-by: Xiaowei Yang <xiaowei.yang@intel.com>
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Signed-off-by: Xiaowei Yang <xiaowei.yang@intel.com>
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Signed-off-by: Steven Hand <steven@xensource.com>
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Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Xiaowei Yang <xiaowei.yang@intel.com>
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1: Adopt an abstract layer for periodic time on top of different
HV time device models like PIT, RTC and ACPI time.
2: Extract VMM knowledge from PIT DM code and keep close with
qemu for easy maintain in future.
3: Use guest time (TSC) to drive PIT CLK that helps us to remove
a lot of extra logic previously introduced to convert from host time to
guest time.
4: Some cleanup for SMP code like move cache_tsc_offset to per VP.
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
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Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
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This is rebased to the new PIT code now. It has the same logic as
earlier. PIT tries to catch up the missed timer ticks by injected all
the ticks one by one so that Guest time stays close to the wall clock.
But while debugging a hvm guest if you stop the guest by debugger and
then continue, the guest sees flood of interrupts compensating the
missed ticks for the stopped time. This patch just check if the guest is
being debugged, if yes then it does not try to catch up with the missed
ticks.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@.intel.com>
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Signed-off-by: Keir Fraser <keir@xensource.com>
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Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
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