1 files changed, 31 insertions, 31 deletions

diff --git a/xen/arch/ia64/regionreg.c b/xen/arch/ia64/regionreg.c
index bed58aec66..6742d4f602 100644
--- a/xen/arch/ia64/regionreg.c
+++ b/xen/arch/ia64/regionreg.c
@@ -251,7 +251,7 @@ static inline int validate_page_size(unsigned long ps)
 // NOTE: DOES NOT SET VCPU's rrs[x] value!!
 int set_one_rr(unsigned long rr, unsigned long val)
 {
-	struct exec_domain *ed = current;
+	struct vcpu *v = current;
 	unsigned long rreg = REGION_NUMBER(rr);
 	ia64_rr rrv, newrrv, memrrv;
 	unsigned long newrid;
@@ -260,12 +260,12 @@ int set_one_rr(unsigned long rr, unsigned long val)
 
 	rrv.rrval = val;
 	newrrv.rrval = 0;
-	newrid = ed->domain->starting_rid + rrv.rid;
+	newrid = v->domain->starting_rid + rrv.rid;
 
-	if (newrid > ed->domain->ending_rid) {
+	if (newrid > v->domain->ending_rid) {
 		printk("can't set rr%d to %lx, starting_rid=%lx,"
 			"ending_rid=%lx, val=%lx\n", rreg, newrid,
-			ed->domain->starting_rid,ed->domain->ending_rid,val);
+			v->domain->starting_rid,v->domain->ending_rid,val);
 		return 0;
 	}
 
@@ -274,7 +274,7 @@ int set_one_rr(unsigned long rr, unsigned long val)
 		newrrv.rid = newrid;
 		newrrv.ve = VHPT_ENABLED_REGION_7;
 		newrrv.ps = IA64_GRANULE_SHIFT;
-		ia64_new_rr7(vmMangleRID(newrrv.rrval),ed->vcpu_info);
+		ia64_new_rr7(vmMangleRID(newrrv.rrval),v->vcpu_info);
 	}
 	else {
 		newrrv.rid = newrid;
@@ -317,45 +317,45 @@ int set_all_rr( u64 rr0, u64 rr1, u64 rr2, u64 rr3,
 	return 1;
 }
 
-void init_all_rr(struct exec_domain *ed)
+void init_all_rr(struct vcpu *v)
 {
 	ia64_rr rrv;
 
 	rrv.rrval = 0;
-	rrv.rid = ed->domain->metaphysical_rid;
+	rrv.rid = v->domain->metaphysical_rid;
 	rrv.ps = PAGE_SHIFT;
 	rrv.ve = 1;
-if (!ed->vcpu_info) { printf("Stopping in init_all_rr\n"); dummy(); }
-	ed->vcpu_info->arch.rrs[0] = -1;
-	ed->vcpu_info->arch.rrs[1] = rrv.rrval;
-	ed->vcpu_info->arch.rrs[2] = rrv.rrval;
-	ed->vcpu_info->arch.rrs[3] = rrv.rrval;
-	ed->vcpu_info->arch.rrs[4] = rrv.rrval;
-	ed->vcpu_info->arch.rrs[5] = rrv.rrval;
+if (!v->vcpu_info) { printf("Stopping in init_all_rr\n"); dummy(); }
+	v->vcpu_info->arch.rrs[0] = -1;
+	v->vcpu_info->arch.rrs[1] = rrv.rrval;
+	v->vcpu_info->arch.rrs[2] = rrv.rrval;
+	v->vcpu_info->arch.rrs[3] = rrv.rrval;
+	v->vcpu_info->arch.rrs[4] = rrv.rrval;
+	v->vcpu_info->arch.rrs[5] = rrv.rrval;
 	rrv.ve = 0; 
-	ed->vcpu_info->arch.rrs[6] = rrv.rrval;
-//	ed->shared_info->arch.rrs[7] = rrv.rrval;
+	v->vcpu_info->arch.rrs[6] = rrv.rrval;
+//	v->shared_info->arch.rrs[7] = rrv.rrval;
 }
 
 
 /* XEN/ia64 INTERNAL ROUTINES */
 
-unsigned long physicalize_rid(struct exec_domain *ed, unsigned long rrval)
+unsigned long physicalize_rid(struct vcpu *v, unsigned long rrval)
 {
 	ia64_rr rrv;
 	    
 	rrv.rrval = rrval;
-	rrv.rid += ed->domain->starting_rid;
+	rrv.rid += v->domain->starting_rid;
 	return rrv.rrval;
 }
 
 unsigned long
-virtualize_rid(struct exec_domain *ed, unsigned long rrval)
+virtualize_rid(struct vcpu *v, unsigned long rrval)
 {
 	ia64_rr rrv;
 	    
 	rrv.rrval = rrval;
-	rrv.rid -= ed->domain->starting_rid;
+	rrv.rid -= v->domain->starting_rid;
 	return rrv.rrval;
 }
 
@@ -366,17 +366,17 @@ virtualize_rid(struct exec_domain *ed, unsigned long rrval)
 // rr7 (because we have to to assembly and physical mode
 // to change rr7).  If no change to rr7 is required, returns 0.
 //
-unsigned long load_region_regs(struct exec_domain *ed)
+unsigned long load_region_regs(struct vcpu *v)
 {
 	unsigned long rr0, rr1,rr2, rr3, rr4, rr5, rr6, rr7;
 	// TODO: These probably should be validated
 	unsigned long bad = 0;
 
-	if (ed->vcpu_info->arch.metaphysical_mode) {
+	if (v->vcpu_info->arch.metaphysical_mode) {
 		ia64_rr rrv;
 
 		rrv.rrval = 0;
-		rrv.rid = ed->domain->metaphysical_rid;
+		rrv.rid = v->domain->metaphysical_rid;
 		rrv.ps = PAGE_SHIFT;
 		rrv.ve = 1;
 		rr0 = rrv.rrval;
@@ -384,16 +384,16 @@ unsigned long load_region_regs(struct exec_domain *ed)
 		ia64_srlz_d();
 	}
 	else {
-		rr0 =  ed->vcpu_info->arch.rrs[0];
+		rr0 =  v->vcpu_info->arch.rrs[0];
 		if (!set_one_rr(0x0000000000000000L, rr0)) bad |= 1;
 	}
-	rr1 =  ed->vcpu_info->arch.rrs[1];
-	rr2 =  ed->vcpu_info->arch.rrs[2];
-	rr3 =  ed->vcpu_info->arch.rrs[3];
-	rr4 =  ed->vcpu_info->arch.rrs[4];
-	rr5 =  ed->vcpu_info->arch.rrs[5];
-	rr6 =  ed->vcpu_info->arch.rrs[6];
-	rr7 =  ed->vcpu_info->arch.rrs[7];
+	rr1 =  v->vcpu_info->arch.rrs[1];
+	rr2 =  v->vcpu_info->arch.rrs[2];
+	rr3 =  v->vcpu_info->arch.rrs[3];
+	rr4 =  v->vcpu_info->arch.rrs[4];
+	rr5 =  v->vcpu_info->arch.rrs[5];
+	rr6 =  v->vcpu_info->arch.rrs[6];
+	rr7 =  v->vcpu_info->arch.rrs[7];
 	if (!set_one_rr(0x2000000000000000L, rr1)) bad |= 2;
 	if (!set_one_rr(0x4000000000000000L, rr2)) bad |= 4;
 	if (!set_one_rr(0x6000000000000000L, rr3)) bad |= 8;