diff options
| -rw-r--r-- | xen/arch/x86/cpu/amd.c | 8 | ||||
| -rw-r--r-- | xen/include/asm-x86/amd.h | 3 |
2 files changed, 11 insertions, 0 deletions
diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index d1cb546543..a3876e37d8 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -41,6 +41,9 @@ static unsigned int opt_cpuid_mask_ext_ecx, opt_cpuid_mask_ext_edx; integer_param("cpuid_mask_ext_ecx", opt_cpuid_mask_ext_ecx); integer_param("cpuid_mask_ext_edx", opt_cpuid_mask_ext_edx); +static int opt_allow_unsafe; +boolean_param("allow_unsafe", opt_allow_unsafe); + static inline void wrmsr_amd(unsigned int index, unsigned int lo, unsigned int hi) { @@ -640,6 +643,11 @@ static void __devinit init_amd(struct cpuinfo_x86 *c) clear_bit(X86_FEATURE_MCE, c->x86_capability); #ifdef __x86_64__ + if (cpu_has_amd_erratum(c, AMD_ERRATUM_121) && !opt_allow_unsafe) + panic("Xen will not boot on this CPU for security reasons.\n" + "Pass \"allow_unsafe\" if you're trusting all your" + " (PV) guest kernels.\n"); + /* AMD CPUs do not support SYSENTER outside of legacy mode. */ clear_bit(X86_FEATURE_SEP, c->x86_capability); #endif diff --git a/xen/include/asm-x86/amd.h b/xen/include/asm-x86/amd.h index 3cdd9df858..c90906e4c9 100644 --- a/xen/include/asm-x86/amd.h +++ b/xen/include/asm-x86/amd.h @@ -127,6 +127,9 @@ #define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) #define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) +#define AMD_ERRATUM_121 \ + AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x0f, 0x0, 0x0, 0x3f, 0xf)) + #define AMD_ERRATUM_170 \ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x0f, 0x0, 0x0, 0x67, 0xf)) |