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authorKeir Fraser <keir.fraser@citrix.com>2008-04-09 11:30:32 +0100
committerKeir Fraser <keir.fraser@citrix.com>2008-04-09 11:30:32 +0100
commite90bc46da35791b3bcea890b64fc2eaec74f05be (patch)
tree319a58ce4fe6f5e7d9441ea1da222238cf78f051 /xen/include/asm-x86/paging.h
parente5523678d7c8a9444069df7609c1f4a47f7a30f5 (diff)
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x86, vmx: Enable EPT (Extended PageTable) support on new Intel processors.
We use the EPT page table as P2M (guest physical to machine mapping), removing the linear page table when EPT is used for the domain (see the new file p2m-ept.c). We did this by adding three operations in the p2m_domain. If VT-d is enabled, the EPT page table will be used as the VT-d page table as well (i.e. shared). Signed-off-by: Xin Li <xin.b.li@intel.com> Signed-off-by: Jun Nakajima <jun.nakajima@intel.com> Signed-off-by: Xiaohui Xin <Xiaohui.xin@intel.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
Diffstat (limited to 'xen/include/asm-x86/paging.h')
-rw-r--r--xen/include/asm-x86/paging.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/xen/include/asm-x86/paging.h b/xen/include/asm-x86/paging.h
index 4c7e6f1327..f7512a7b26 100644
--- a/xen/include/asm-x86/paging.h
+++ b/xen/include/asm-x86/paging.h
@@ -183,7 +183,7 @@ void paging_vcpu_init(struct vcpu *v);
/* Set up the paging-assistance-specific parts of a domain struct at
* start of day. Called for every domain from arch_domain_create() */
-void paging_domain_init(struct domain *d);
+int paging_domain_init(struct domain *d);
/* Handler for paging-control ops: operations from user-space to enable
* and disable ephemeral shadow modes (test mode and log-dirty mode) and