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author | Bamvor Jian Zhang <bjzhang@suse.com> | 2013-07-15 16:45:33 +0800 |
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committer | Ian Campbell <ian.campbell@citrix.com> | 2013-07-17 10:34:29 +0100 |
commit | 75beb8e45133acb8795024fc6114ff557ce1c27f (patch) | |
tree | dc74bac1c813de0108e552a6748ec8b3a2083739 /xen/arch/arm/arm32/proc-v7.S | |
parent | 68caac7f6f4687241a24e804a9fca19aa26fe183 (diff) | |
download | xen-75beb8e45133acb8795024fc6114ff557ce1c27f.tar.gz xen-75beb8e45133acb8795024fc6114ff557ce1c27f.tar.bz2 xen-75beb8e45133acb8795024fc6114ff557ce1c27f.zip |
xen: arm: introduce Cortex-A7 support
Introduce Cortex-A7 with a scalable proc_info_list which including cpu id
and cpu initialize function.
In head.S, search cpu specific MIDR in procinfo and call such initialize
function. Currently, support Cortex-A7 and Cortex-A15.
Signed-off-by: Bamvor Jian Zhang <bjzhang@suse.com>
Acked-by: Tim Deegan <tim@xen.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Diffstat (limited to 'xen/arch/arm/arm32/proc-v7.S')
-rw-r--r-- | xen/arch/arm/arm32/proc-v7.S | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/xen/arch/arm/arm32/proc-v7.S b/xen/arch/arm/arm32/proc-v7.S new file mode 100644 index 0000000000..0ab3845a73 --- /dev/null +++ b/xen/arch/arm/arm32/proc-v7.S @@ -0,0 +1,52 @@ +/* + * xen/arch/arm/proc-v7.S + * + * rename from xen/arch/arm/proc-ca15.S + * arm v7 specific initializations + * + * Copyright (c) 2011 Citrix Systems. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <asm/asm_defns.h> +#include <asm/arm32/processor.h> + +.globl v7_init +v7_init: + /* Set up the SMP bit in ACTLR */ + mrc CP32(r0, ACTLR) + orr r0, r0, #(ACTLR_V7_SMP) /* enable SMP bit */ + mcr CP32(r0, ACTLR) + mov pc, lr + + .section ".init.proc.info", #alloc, #execinstr + .type __v7_ca15mp_proc_info, #object +__v7_ca15mp_proc_info: + .long 0x410FC0F0 /* Cortex-A15 */ + .long 0xFF0FFFF0 /* Mask */ + .long v7_init + .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info + + .section ".init.proc.info", #alloc, #execinstr + .type __v7_ca7mp_proc_info, #object +__v7_ca7mp_proc_info: + .long 0x410FC070 /* Cortex-A7 */ + .long 0xFF0FFFF0 /* Mask */ + .long v7_init + .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info + +/* + * Local variables: + * mode: ASM + * indent-tabs-mode: nil + * End: + */ |