x86/HVM: fix x2APIC APIC_ID read emulation

APIC and x2APIC have different format for APIC_ID register. Need
translation.

Signed-off-by: Zhenguo Wang <wangzhenguo@huawei.com>
Signed-off-by: Xiaowei Yang <xiaowei.yang@huawei.com>

Convert code to use switch(), fixing coding style issue at once, and
use GET_xAPIC_ID() on the value read instead of VLAPIC_ID() (reading
the field again).

In the course of this also properly reject both read and writes on the
non-existing MSR corresponding to APIC_ICR2.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>
master commit: 6859874b61d5ddaf5289e72ed2b2157739b72ca5
master date: 2013-06-11 09:45:55 +0200

1 files changed, 20 insertions, 3 deletions

diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index a2ec9aedac..1ed0d43b68 100644
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -574,8 +574,19 @@ int hvm_x2apic_msr_read(struct vcpu *v, unsigned int msr, uint64_t *msr_content)
         return 1;
 
     vlapic_read_aligned(vlapic, offset, &low);
-    if ( offset == APIC_ICR )
+    switch ( offset )
+    {
+    case APIC_ID:
+        low = GET_xAPIC_ID(low);
+        break;
+
+    case APIC_ICR:
         vlapic_read_aligned(vlapic, APIC_ICR2, &high);
+        break;
+
+    case APIC_ICR2:
+        return 1;
+    }
 
     *msr_content = (((uint64_t)high) << 32) | low;
     return 0;
@@ -824,11 +835,17 @@ int hvm_x2apic_msr_write(struct vcpu *v, unsigned int msr, uint64_t msr_content)
     if ( !vlapic_x2apic_mode(vlapic) )
         return X86EMUL_UNHANDLEABLE;
 
-    if ( offset == APIC_ICR )
+    switch ( offset )
     {
-        int rc = vlapic_reg_write(v, APIC_ICR2, (uint32_t)(msr_content >> 32));
+        int rc;
+
+    case APIC_ICR:
+        rc = vlapic_reg_write(v, APIC_ICR2, (uint32_t)(msr_content >> 32));
         if ( rc )
             return rc;
+
+    case APIC_ICR2:
+        return X86EMUL_UNHANDLEABLE;
     }
 
     return vlapic_reg_write(v, offset, (uint32_t)msr_content);