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authorLiu, Jinsong <jinsong.liu@intel.com>2011-12-06 11:28:04 +0000
committerLiu, Jinsong <jinsong.liu@intel.com>2011-12-06 11:28:04 +0000
commit7de3c6981cd882df78ced5b1542889c78e3a5b53 (patch)
tree3ef4dfc28da972254c5518ab5a209f3010b85735
parent25050f53be29518a3c9bdd0628333cd3121d2750 (diff)
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X86: Disable PCID/INVPCID for pv
This patch disable PCID/INVPCID for pv. Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> Committed-by: Keir Fraser <keir@xen.org>
-rw-r--r--tools/libxc/xc_cpufeature.h2
-rw-r--r--tools/libxc/xc_cpuid_x86.c1
2 files changed, 3 insertions, 0 deletions
diff --git a/tools/libxc/xc_cpufeature.h b/tools/libxc/xc_cpufeature.h
index 01a378a741..ff7c3d0042 100644
--- a/tools/libxc/xc_cpufeature.h
+++ b/tools/libxc/xc_cpufeature.h
@@ -78,6 +78,7 @@
#define X86_FEATURE_CX16 13 /* CMPXCHG16B */
#define X86_FEATURE_XTPR 14 /* Send Task Priority Messages */
#define X86_FEATURE_PDCM 15 /* Perf/Debug Capability MSR */
+#define X86_FEATURE_PCID 17 /* Process Context ID */
#define X86_FEATURE_DCA 18 /* Direct Cache Access */
#define X86_FEATURE_SSE4_1 19 /* Streaming SIMD Extensions 4.1 */
#define X86_FEATURE_SSE4_2 20 /* Streaming SIMD Extensions 4.2 */
@@ -132,5 +133,6 @@
#define X86_FEATURE_SMEP 7 /* Supervisor Mode Execution Protection */
#define X86_FEATURE_BMI2 8 /* 2nd group bit manipulation extensions */
#define X86_FEATURE_ERMS 9 /* Enhanced REP MOVSB/STOSB */
+#define X86_FEATURE_INVPCID 10 /* Invalidate Process Context ID */
#endif /* __LIBXC_CPUFEATURE_H */
diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index ccd73501ea..7b6b439e3b 100644
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -485,6 +485,7 @@ static void xc_cpuid_pv_policy(
}
clear_bit(X86_FEATURE_XTPR, regs[2]);
clear_bit(X86_FEATURE_PDCM, regs[2]);
+ clear_bit(X86_FEATURE_PCID, regs[2]);
clear_bit(X86_FEATURE_DCA, regs[2]);
set_bit(X86_FEATURE_HYPERVISOR, regs[2]);
break;