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authoradsharma@los-vmm.sc.intel.com <adsharma@los-vmm.sc.intel.com>2005-08-15 12:50:38 -0800
committeradsharma@los-vmm.sc.intel.com <adsharma@los-vmm.sc.intel.com>2005-08-15 12:50:38 -0800
commitf04c4b32acf1d249113cc9e38606089000e22a55 (patch)
tree83b183d099973b382c17370945c34bfdc65b40f5
parentc004ce577213e5ba00d8d6ec9573bb9200207dcc (diff)
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Enable multi-word DMA mode 2 for the PIIX3 chipset
Without this patch, Linux PIIX3 driver would see ultra DMA and get confused and ended up disabling DMA. With the patch, we're able to see 3x increase in disk read throughput. Signed-off-by: Winston Wang <winston.l.wang@intel.com> Signed-off-by: Arun Sharma <arun.sharma@intel.com>
-rw-r--r--tools/ioemu/hw/ide.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/tools/ioemu/hw/ide.c b/tools/ioemu/hw/ide.c
index 5e5610e136..c0228cbd9e 100644
--- a/tools/ioemu/hw/ide.c
+++ b/tools/ioemu/hw/ide.c
@@ -430,6 +430,7 @@ static void ide_identify(IDEState *s)
put_le16(p + 59, 0x100 | s->mult_sectors);
put_le16(p + 60, s->nb_sectors);
put_le16(p + 61, s->nb_sectors >> 16);
+ put_le16(p + 63, 0x07);
put_le16(p + 80, (1 << 1) | (1 << 2));
put_le16(p + 82, (1 << 14));
put_le16(p + 83, (1 << 14));
@@ -460,7 +461,7 @@ static void ide_atapi_identify(IDEState *s)
put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
- put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
+ put_le16(p + 63, 0x07); /* Multi-word DMA mode 2 */
put_le16(p + 64, 1); /* PIO modes */
put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */