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authorJulien Grall <julien.grall@linaro.org>2013-04-28 21:14:21 +0100
committerIan Campbell <ian.campbell@citrix.com>2013-05-13 12:00:02 +0100
commitd0d7f4de85e70595b5b6a77a1f0105b930ca82bd (patch)
treec24b175e3b5dd985cea62d22684a4e2384ab00f2
parentbd74772eb65f6624437f789c1e6884e073a03fcc (diff)
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xen/arm64: Remove hardcoded value for gic in assembly code
- arm64: use V2M_GIC_BASE_ADDRESS - only expose GIC_*_ADDRESS to assembly. The C code uses base addresses provide by the device tree Signed-off-by: Julien Grall <julien.grall@linaro.org> Acked-by: Ian Campbell <ian.campbell@citrix.com>
-rw-r--r--xen/arch/arm/arm64/mode_switch.S7
-rw-r--r--xen/include/asm-arm/config.h8
2 files changed, 10 insertions, 5 deletions
diff --git a/xen/arch/arm/arm64/mode_switch.S b/xen/arch/arm/arm64/mode_switch.S
index 4c381812bf..d1157065e5 100644
--- a/xen/arch/arm/arm64/mode_switch.S
+++ b/xen/arch/arm/arm64/mode_switch.S
@@ -21,6 +21,7 @@
#include <asm/config.h>
#include <asm/page.h>
#include <asm/asm_defns.h>
+#include <asm/platforms/vexpress.h>
/* Get up a CPU into EL2. Clobbers x0-x3.
*
@@ -53,18 +54,18 @@ enter_el2_mode:
*/
cbnz x22, 1f
- ldr x1, =(GIC_BASE_ADDRESS+GIC_DR_OFFSET) // GICD_CTLR
+ ldr x1, =(V2M_GIC_BASE_ADDRESS+GIC_DR_OFFSET) // GICD_CTLR
mov w0, #3 // EnableGrp0 | EnableGrp1
str w0, [x1]
-1: ldr x1, =(GIC_BASE_ADDRESS+GIC_DR_OFFSET+0x80) // GICD_IGROUPR
+1: ldr x1, =(V2M_GIC_BASE_ADDRESS+GIC_DR_OFFSET+0x80) // GICD_IGROUPR
mov w0, #~0 // Grp1 interrupts
str w0, [x1], #4
b.ne 2f // Only local interrupts for secondary CPUs
str w0, [x1], #4
str w0, [x1], #4
-2: ldr x1, =(GIC_BASE_ADDRESS+GIC_CR_OFFSET) // GICC_CTLR
+2: ldr x1, =(V2M_GIC_BASE_ADDRESS+GIC_CR_OFFSET) // GICC_CTLR
ldr w0, [x1]
mov w0, #3 // EnableGrp0 | EnableGrp1
str w0, [x1]
diff --git a/xen/include/asm-arm/config.h b/xen/include/asm-arm/config.h
index 6414c895b7..e3cfaf1cf4 100644
--- a/xen/include/asm-arm/config.h
+++ b/xen/include/asm-arm/config.h
@@ -141,12 +141,16 @@ extern unsigned long frametable_virt_end;
#define watchdog_disable() ((void)0)
#define watchdog_enable() ((void)0)
-/* Board-specific: base address of GIC + its regs */
-#define GIC_BASE_ADDRESS 0x2c000000
+#ifdef __ASSEMBLY__
+/* Board-specific: regs base address for the GIC
+ * Theses constants are only intend to be used in assembly file
+ * because the DT is not yet parsed.
+ */
#define GIC_DR_OFFSET 0x1000
#define GIC_CR_OFFSET 0x2000
#define GIC_HR_OFFSET 0x4000 /* Guess work http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/064219.html */
#define GIC_VR_OFFSET 0x6000 /* Virtual Machine CPU interface) */
+#endif /* __ASSEMBLY__ */
#endif /* __ARM_CONFIG_H__ */
/*