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| author | Zhang Xiantao <xiantao.zhang@intel.com> | 2012-08-24 09:49:14 +0100 |
|---|---|---|
| committer | Zhang Xiantao <xiantao.zhang@intel.com> | 2012-08-24 09:49:14 +0100 |
| commit | 4875b06f1a162c3ee0aacc17a80801603a1c5d24 (patch) | |
| tree | 93fed3983ad470d6b1ab0948d0893a513b65d389 | |
| parent | ac963eb7895b8351017bb6005505c2b176202f0e (diff) | |
| download | xen-4875b06f1a162c3ee0aacc17a80801603a1c5d24.tar.gz xen-4875b06f1a162c3ee0aacc17a80801603a1c5d24.tar.bz2 xen-4875b06f1a162c3ee0aacc17a80801603a1c5d24.zip | |
nested vmx: VM_ENTRY_IA32E_MODE shouldn't be in default1 class
for IA32_VM_ENTRY_CTLS_MSR.
If set to 1, L2 guest's paging mode maybe mis-judged
and mis-set.
Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
Committed-by: Keir Fraser <keir@xen.org>
| -rw-r--r-- | xen/arch/x86/hvm/vmx/vvmx.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index fc733a9dbb..2e0b79dc2d 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1334,7 +1334,6 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) case MSR_IA32_VMX_ENTRY_CTLS: /* bit 0-8, and 12 must be 1 (refer G5 of SDM) */ data = 0x11ff; - data |= VM_ENTRY_IA32E_MODE; data = (data << 32) | data; break; |