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| author | Jan Beulich <jbeulich@suse.com> | 2013-01-08 10:22:32 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2013-01-08 10:22:32 +0100 |
| commit | 89ca76c799accba866a2597499b5fedf220ba843 (patch) | |
| tree | e0c24c44abb5e72095f5963a634a5380a5310de2 | |
| parent | e4668268816d9f58b10fe9bf0111120e64c0ad32 (diff) | |
| download | xen-89ca76c799accba866a2597499b5fedf220ba843.tar.gz xen-89ca76c799accba866a2597499b5fedf220ba843.tar.bz2 xen-89ca76c799accba866a2597499b5fedf220ba843.zip | |
IOMMU/ATS: fix maximum queue depth calculation
The capabilities register field is a 5-bit value, and the 5 bits all
being zero actually means 32 entries.
Under the assumption that amd_iommu_flush_iotlb() really just tried
to correct for the miscalculation above when adding 32 to the value,
that adjustment is also being removed.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by Xiantao Zhang <xiantao.zhang@intel.com>
Acked-by: Wei Huang <wei.huang2@amd.com>
xen-unstable changeset: 26235:670b07e8d738
xen-unstable date: Wed Dec 5 08:52:14 UTC 2012
| -rw-r--r-- | xen/drivers/passthrough/vtd/x86/ats.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/xen/drivers/passthrough/vtd/x86/ats.c b/xen/drivers/passthrough/vtd/x86/ats.c index 862fd92124..c60b9928fb 100644 --- a/xen/drivers/passthrough/vtd/x86/ats.c +++ b/xen/drivers/passthrough/vtd/x86/ats.c @@ -32,7 +32,7 @@ static LIST_HEAD(ats_dev_drhd_units); #define ATS_REG_CAP 4 #define ATS_REG_CTL 6 -#define ATS_QUEUE_DEPTH_MASK 0xF +#define ATS_QUEUE_DEPTH_MASK 0x1f #define ATS_ENABLE (1<<15) struct pci_ats_dev { @@ -178,7 +178,8 @@ int enable_ats_device(int seg, int bus, int devfn) pdev->devfn = devfn; value = pci_conf_read16(bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos + ATS_REG_CAP); - pdev->ats_queue_depth = value & ATS_QUEUE_DEPTH_MASK; + pdev->ats_queue_depth = value & ATS_QUEUE_DEPTH_MASK ?: + ATS_QUEUE_DEPTH_MASK + 1; list_add(&pdev->list, &ats_devices); } |