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authorKeir Fraser <keir.fraser@citrix.com>2010-08-13 08:59:52 +0100
committerKeir Fraser <keir.fraser@citrix.com>2010-08-13 08:59:52 +0100
commitaeaef912f86154a70f502a581928f7116e4c0af3 (patch)
treef8edc5e2569ea4d4b8e1a0b924551c9c3ac052a1
parent847c5ecffed4c48a2b8fbef6dfb999a474dda5b3 (diff)
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x86: Allow dom0 pstate control to access APERF/MPERF/HWCR MSRs
The current version of the powernow driver uses the APERF/MPEF and the HWCR MSRs. Add cases in traps.c to let dom0 access those MSRs. Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com> xen-unstable changeset: 6471b8b71401 xen-unstable date: Fri Aug 13 08:38:35 2010 +0100
-rw-r--r--xen/arch/x86/traps.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 1834314f3d..d9a8a52f28 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -2220,6 +2220,7 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
case MSR_K8_PSTATE5:
case MSR_K8_PSTATE6:
case MSR_K8_PSTATE7:
+ case MSR_K8_HWCR:
if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD )
goto fail;
if ( !is_cpufreq_controller(v->domain) )
@@ -2259,6 +2260,14 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
break;
case MSR_IA32_MPERF:
case MSR_IA32_APERF:
+ if (( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ) &&
+ ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ) )
+ goto fail;
+ if ( !is_cpufreq_controller(v->domain) )
+ break;
+ if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
+ goto fail;
+ break;
case MSR_IA32_PERF_CTL:
if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
goto fail;