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author | Keir Fraser <keir.fraser@citrix.com> | 2010-05-15 08:38:39 +0100 |
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committer | Keir Fraser <keir.fraser@citrix.com> | 2010-05-15 08:38:39 +0100 |
commit | 3983c79424ad8e76e9c4d0d3e586f9b749d17daa (patch) | |
tree | 4b6f522c671f07e25ffd079a8a7897557f96f8c3 | |
parent | 671dc491698bb6bac6bf85cb696452424446d698 (diff) | |
download | xen-3983c79424ad8e76e9c4d0d3e586f9b749d17daa.tar.gz xen-3983c79424ad8e76e9c4d0d3e586f9b749d17daa.tar.bz2 xen-3983c79424ad8e76e9c4d0d3e586f9b749d17daa.zip |
Add MSR support for various feature AMD processor families.
Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>
xen-unstable changeset: 21393:3dfc577c8b9e
xen-unstable date: Sat May 15 08:29:59 2010 +0100
-rw-r--r-- | xen/arch/x86/apic.c | 2 | ||||
-rw-r--r-- | xen/arch/x86/cpu/amd.c | 7 | ||||
-rw-r--r-- | xen/arch/x86/cpu/mcheck/mce.c | 3 | ||||
-rw-r--r-- | xen/arch/x86/nmi.c | 2 | ||||
-rw-r--r-- | xen/arch/x86/oprofile/nmi_int.c | 12 | ||||
-rw-r--r-- | xen/arch/x86/traps.c | 7 |
6 files changed, 21 insertions, 12 deletions
diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c index 4c4a3de0d4..51ba81dce9 100644 --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -823,7 +823,7 @@ static int __init detect_init_APIC (void) switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: if ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model > 1) || - (boot_cpu_data.x86 >= 15 && boot_cpu_data.x86 <= 17)) + (boot_cpu_data.x86 >= 0xf && boot_cpu_data.x86 <= 0x17)) break; goto no_apic; case X86_VENDOR_INTEL: diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 2f959c05d6..67a3352dbb 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -433,10 +433,9 @@ static void __devinit init_amd(struct cpuinfo_x86 *c) } switch (c->x86) { - case 15: + case 0xf: /* Use K8 tuning for Fam10h and Fam11h */ - case 0x10: - case 0x11: + case 0x10 ... 0x17: set_bit(X86_FEATURE_K8, c->x86_capability); disable_c1e(NULL); if (acpi_smi_cmd && (acpi_enable_value | acpi_disable_value)) @@ -500,7 +499,7 @@ static void __devinit init_amd(struct cpuinfo_x86 *c) #endif /* Pointless to use MWAIT on Family10 as it does not deep sleep. */ - if (c->x86 == 0x10 && !force_mwait) + if (c->x86 >= 0x10 && !force_mwait) clear_bit(X86_FEATURE_MWAIT, c->x86_capability); /* K6s reports MCEs but don't actually have all the MSRs */ diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index ed8195598b..b63f7ee5c4 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -578,8 +578,7 @@ static enum mcheck_type amd_mcheck_init(struct cpuinfo_x86 *ci) rc = amd_k8_mcheck_init(ci); break; - case 0x10: - case 0x11: + case 0x10 ... 0x17: rc = amd_f10_mcheck_init(ci); break; } diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c index 759c0f6c77..77447107a0 100644 --- a/xen/arch/x86/nmi.c +++ b/xen/arch/x86/nmi.c @@ -323,7 +323,7 @@ void __pminit setup_apic_nmi_watchdog(void) case X86_VENDOR_AMD: switch (boot_cpu_data.x86) { case 6: - case 15 ... 17: + case 0xf ... 0x17: setup_k7_watchdog(); break; default: diff --git a/xen/arch/x86/oprofile/nmi_int.c b/xen/arch/x86/oprofile/nmi_int.c index 98f66f66c5..a07b924fb0 100644 --- a/xen/arch/x86/oprofile/nmi_int.c +++ b/xen/arch/x86/oprofile/nmi_int.c @@ -451,6 +451,18 @@ static int __init nmi_init(void) model = &op_athlon_spec; cpu_type = "x86-64/family11"; break; + case 0x12: + model = &op_athlon_spec; + cpu_type = "x86-64/family12"; + break; + case 0x14: + model = &op_athlon_spec; + cpu_type = "x86-64/family14"; + break; + case 0x15: + model = &op_athlon_spec; + cpu_type = "x86-64/family15"; + break; } break; diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 1238e9cb96..1158f5ddbd 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -2245,7 +2245,7 @@ static int emulate_privileged_op(struct cpu_user_regs *regs) break; case MSR_AMD64_NB_CFG: if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD || - boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 > 0x11 ) + boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 > 0x17 ) goto fail; if ( !IS_PRIV(v->domain) ) break; @@ -2258,7 +2258,7 @@ static int emulate_privileged_op(struct cpu_user_regs *regs) break; case MSR_FAM10H_MMIO_CONF_BASE: if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD || - boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 > 0x11 ) + boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 > 0x17 ) goto fail; if ( !IS_PRIV(v->domain) ) break; @@ -3246,8 +3246,7 @@ void __devinit percpu_traps_init(void) switch ( boot_cpu_data.x86 ) { case 6: - case 15: - case 16: + case 0xf ... 0x17: this_cpu(ler_msr) = MSR_IA32_LASTINTFROMIP; break; } |