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authorKeir Fraser <keir.fraser@citrix.com>2010-03-23 09:35:31 +0000
committerKeir Fraser <keir.fraser@citrix.com>2010-03-23 09:35:31 +0000
commit04fafd58b54a2e9c61527f2c0f65a46e2f17fd44 (patch)
treec30be1066bc62fafc14a04fe0f2e8c91fe1cf764
parent596fd1fc3ef41c719d521c66b017ca9f89098dde (diff)
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x86: s3: ensure CR4.MCE is enabled after mcheck_init()4.0.0-rc7
Changeset 21045: 7751288b1386 introduces a potential issue: CR4.MCE is enabled before mcheck_init() -- thought looks I don't meet with an actual issue with this, we'd better fix it. Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
-rw-r--r--xen/arch/x86/acpi/power.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/xen/arch/x86/acpi/power.c b/xen/arch/x86/acpi/power.c
index dfe35468ac..e6847b3e4f 100644
--- a/xen/arch/x86/acpi/power.c
+++ b/xen/arch/x86/acpi/power.c
@@ -147,6 +147,7 @@ static int enter_state(u32 state)
{
unsigned long flags;
int error;
+ unsigned long cr4;
if ( (state <= ACPI_STATE_S0) || (state > ACPI_S_STATES_MAX) )
return -EINVAL;
@@ -201,13 +202,15 @@ static int enter_state(u32 state)
}
/* Restore CR4 and EFER from cached values. */
- write_cr4(read_cr4());
+ cr4 = read_cr4();
+ write_cr4(cr4 & ~X86_CR4_MCE);
if ( cpu_has_efer )
write_efer(read_efer());
device_power_up();
mcheck_init(&boot_cpu_data);
+ write_cr4(cr4);
printk(XENLOG_INFO "Finishing wakeup from ACPI S%d state.\n", state);