From 3f2546b2ef55b661fd8dd69682b38992225e86f6 Mon Sep 17 00:00:00 2001 From: fishsoupisgood Date: Mon, 29 Apr 2019 01:17:54 +0100 Subject: Initial import of qemu-2.4.1 --- roms/u-boot/board/freescale/mpc8560ads/ddr.c | 46 ++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 roms/u-boot/board/freescale/mpc8560ads/ddr.c (limited to 'roms/u-boot/board/freescale/mpc8560ads/ddr.c') diff --git a/roms/u-boot/board/freescale/mpc8560ads/ddr.c b/roms/u-boot/board/freescale/mpc8560ads/ddr.c new file mode 100644 index 00000000..41d4cfe7 --- /dev/null +++ b/roms/u-boot/board/freescale/mpc8560ads/ddr.c @@ -0,0 +1,46 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include + +#include +#include + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + /* + * Factors to consider for CPO: + * - frequency + * - ddr1 vs. ddr2 + */ + popts->cpo_override = 0; + + /* + * Factors to consider for write data delay: + * - number of DIMMs + * + * 1 = 1/4 clock delay + * 2 = 1/2 clock delay + * 3 = 3/4 clock delay + * 4 = 1 clock delay + * 5 = 5/4 clock delay + * 6 = 3/2 clock delay + */ + popts->write_data_delay = 3; + + /* 2T timing enable */ + popts->twot_en = 1; + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 0; +} -- cgit v1.2.3