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diff --git a/doc_DE/pscpu.tex b/doc_DE/pscpu.tex new file mode 100644 index 0000000..05bf628 --- /dev/null +++ b/doc_DE/pscpu.tex @@ -0,0 +1,420 @@ +\subsubsection{Motorola 680x0} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DC[.$<$size$>$]\> DS[.$<$size$>$] \> FULLPMMU \> FPU \> PADDING \\ +PMMU \> SUPMODE \\ +\end{tabbing}} + +\subsubsection{Motorola 56xxx} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DC \> DS \> XSFR \> YSFR \\ +\end{tabbing}} + +\subsubsection{PowerPC} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +BIGENDIAN \> DB \> DD \> DQ \> DS \\ +DT \> DW \> REG \> SUPMODE \\ +\end{tabbing}} + +\subsubsection{Motorola M-Core} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DC[.$<$size$>$] \> DS[.$<$size$>$] \> REG \> SUPMODE \\ +\end{tabbing}} + +\subsubsection{Motorola 68xx/Hitachi 6309} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ADR \> BYT \> DC[.$<$size$>$] \> DFS \> DS[.$<$size$>$] \\ +FCB \> FCC \> FDB \> PADDING \> RMB \\ +\end{tabbing}} + +\subsubsection{Motorola 6805/68HC08} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ADR \> BYT \> DFS \> FCB \> FCC \\ +FDB \> RMB \\ +\end{tabbing}} + +\subsubsection{Motorola 6809/Hitachi 6309} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ADR \> ASSUME \> BYT \> DFS \> FCB \\ +FCC \> FDB \> RMB \\ +\end{tabbing}} + +\subsubsection{Motorola 68HC12} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ADR \> BYT \> DC[.$<$size$>$] \> DFS \> DS[.$<$size$>$] \\ +FCB \> FCC \> FDB \> PADDING \> RMB \\ +\end{tabbing}} + +\subsubsection{Motorola 68HC16} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ADR \> ASSUME \> BYT \> DFS \> FCB \\ +FCC \> FDB \> RMB \\ +\end{tabbing}} + +\subsubsection{Hitachi H8/300(L/H)} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DC[.$<$size$>$] \> DS[.$<$size$>$] \> MAXMODE \> PADDING \\ +\end{tabbing}} + +\subsubsection{Hitachi H8/500} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> DC[.$<$size$>$] \> DS[.$<$size$>$] \> MAXMODE \> PADDING \\ +\end{tabbing}} + +\subsubsection{Hitachi SH7x00} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +COMPLITERALS \> DC[.$<$size$>$] \> DS[.$<$size$>$] \> LTORG \> PADDING \\ +SUPMODE \\ +\end{tabbing}} + +\subsubsection{65xx/MELPS-740} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ADR \> ASSUME \> BYT \> DFS \> FCB \\ +FCC \> FDB \> RMB \\ +\end{tabbing}} + +\subsubsection{65816/MELPS-7700} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ADR \> ASSUME \> BYT \> DB \> DD \\ +DQ \> DS \> DT \> DW \> DFS \\ +FCB \> FCC \> FDB \> RMB \\ +\end{tabbing}} + +\subsubsection{Mitsubishi MELPS-4500} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DATA \> RES \> SFR \\ +\end{tabbing}} + +\subsubsection{Mitsubishi M16} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{Mitsubishi M16C} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{Intel 4004} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DATA \> DS \> REG \\ +\end{tabbing}} + +\subsubsection{Intel MCS-48} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{Intel MCS-(2)51} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +BIGENDIAN \> BIT \> DB \> DD \> DQ \\ +DS \> DT \> DW \> PORT \> SFR \\ +SFRB \> SRCMODE \\ +\end{tabbing}} + +\subsubsection{Intel MCS-96} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> DB \> DD \> DQ \> DS \\ +DT \> DW \\ +\end{tabbing}} + +\subsubsection{Intel 8080/8085} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DATA \> DS \\ +\end{tabbing}} + +\subsubsection{Intel 8080/8085} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \> PORT \\ +\end{tabbing}} + +\subsubsection{Intel i960} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \> \> FPU \> SPACE \> SUPMODE \\ +WORD \\ +\end{tabbing}} + +\subsubsection{Signetics 8X30x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +LIV \> RIV \\ +\end{tabbing}} + +\subsubsection{Philips XA} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> BIT \> DB \> DC[.$<$size$>$] \> DD \\ +DQ \> DS[.$<$size$>$] \> DT \> DW \> PADDING \\ +PORT \> SUPMODE \\ +\end{tabbing}} + +\subsubsection{Atmel AVR} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DATA \> PORT \> REG \> RES \\ +\end{tabbing}} + +\subsubsection{AMD 29K} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> DB \> DD \> DQ \> DS \\ +DT \> DW \> EMULATED \> SUPMODE \\ +\end{tabbing}} + +\subsubsection{Siemens 80C166/167} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> BIT \> DB \> DD \> DQ \\ +DS \> DT \> DW \> REG \\ +\end{tabbing}} + +\subsubsection{Zilog Zx80} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DEFB \> DEFW \> DQ \\ +DS \> DT \> DW \> EXTMODE \> LWORDMODE \\ +\end{tabbing}} + +\subsubsection{Zilog Z8} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \> SFR \\ +\end{tabbing}} + +\subsubsection{Toshiba TLCS-900} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \> MAXIMUM \> SUPMODE \\ +\end{tabbing}} + +\subsubsection{Toshiba TLCS-90} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{Toshiba TLCS-870} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{Toshiba TLCS-47(0(A))} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> DB \> DD \> DQ \> DS \\ +DT \> DW \> PORT \\ +\end{tabbing}} + +\subsubsection{Toshiba TLCS-9000} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{Microchip PIC16C5x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DATA \> RES \> SFR \> ZERO \\ +\end{tabbing}} + +\subsubsection{Microchip PIC16C8x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DATA \> RES \> SFR \> ZERO \\ +\end{tabbing}} + +\subsubsection{Microchip PIC17C42} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DATA \> RES \> SFR \> ZERO \\ +\end{tabbing}} + +\subsubsection{SGS-Thomson ST6} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASCII \> ASCIZ \> ASSUME \> BYTE \> BLOCK \\ +SFR \> WORD \\ +\end{tabbing}} + +\subsubsection{SGS-Thomson ST7} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DC[.$<$size$>$] \> DS[.$<$size$>$] \> PADDING \\ +\end{tabbing}} + +\subsubsection{SGS-Thomson ST9} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> BIT \> DB \> DD \> DQ \\ +DS \> DT \> DW \> REG \\ +\end{tabbing}} + +\subsubsection{6804} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ADR \> BYT \> DFS \> FCB \> FCC \\ +FDB \> RMB \> SFR \\ +\end{tabbing}} + +\subsubsection{Texas TM3201x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DATA \> PORT \> RES \\ +\end{tabbing}} + +\subsubsection{Texas TM32C02x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +BFLOAT \> BSS \> BYTE \> DATA \> DOUBLE \\ +EFLOAT \> TFLOAT \> LONG \> LQxx \> PORT \\ +Qxx \> RES \> RSTRING \> STRING \> WORD \\ +\end{tabbing}} + +\subsubsection{Texas TMS320C3x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> BSS \> DATA \> EXTENDED \> SINGLE \\ +WORD \\ +\end{tabbing}} + +\subsubsection{Texas TM32C020x/TM32C05x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +BFLOAT \> BSS \> BYTE \> DATA \> DOUBLE \\ +EFLOAT \> TFLOAT \> LONG \> LQxx \> PORT \\ +Qxx \> RES \> RSTRING \> STRING \> WORD \\ +\end{tabbing}} + +\subsubsection{Texas TMS9900} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +BSS \> BYTE \> PADDING \> WORD \\ +\end{tabbing}} + +\subsubsection{Texas TMS70Cxx} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{Texas TMS370} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DBIT \> DD \> DQ \> DS \\ +DT \> DW \\ +\end{tabbing}} + +\subsubsection{Texas MSP430} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +BSS \> BYTE \> PADDING \> WORD \\ +\end{tabbing}} + +\subsubsection{National SC/MP} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{National COP8} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ADDR \> ADDRW \> BYTE \> DB \> DD \\ +DQ \> DS \> DSB \> DSW \> DT \\ +FB \> FW \> SFR \> WORD \\ +\end{tabbing}} + +\subsubsection{National COP8} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DC \> DC8 \> DS \> DS8 \> DS16 \\ +DW \> DW16 \\ +\end{tabbing}} + + +\subsubsection{Fairchild ACE} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{NEC $\mu$PD78(C)1x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> DB \> DD \> DQ \> DS \\ +DT \> DW \\ +\end{tabbing}} + +\subsubsection{NEC 75K0} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +ASSUME \> BIT \> DB \> DD \> DQ \\ +DS \> DT \> DW \> SFR \\ +\end{tabbing}} + +\subsubsection{NEC 78K0} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} + +\subsubsection{NEC $\mu$PD772x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DATA \> RES \\ +\end{tabbing}} + +\subsubsection{NEC $\mu$PD772x} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DS \> DW \\ +\end{tabbing}} + +\subsubsection{Symbios Logic SYM53C8xx} +{\tt\begin{tabbing} +\end{tabbing}} + +\subsubsection{Fujitsu F$^{2}$MC8L} +{\tt\begin{tabbing} +\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill +DB \> DD \> DQ \> DS \> DT \\ +DW \\ +\end{tabbing}} |