From 5dac14974c9b2d00431430e9f24dd7e26f69246f Mon Sep 17 00:00:00 2001
From: Joey Castillo <joeycastillo@utexas.edu>
Date: Fri, 11 Feb 2022 12:22:11 -0500
Subject: osc32kctrl: implement CONF_SLCDCTRL_SRC setting

---
 watch-library/hardware/hpl/osc32kctrl/hpl_osc32kctrl.c | 2 ++
 watch-library/shared/config/hpl_osc32kctrl_config.h    | 6 +++---
 2 files changed, 5 insertions(+), 3 deletions(-)

(limited to 'watch-library')

diff --git a/watch-library/hardware/hpl/osc32kctrl/hpl_osc32kctrl.c b/watch-library/hardware/hpl/osc32kctrl/hpl_osc32kctrl.c
index b6c624cc..e69e916d 100644
--- a/watch-library/hardware/hpl/osc32kctrl/hpl_osc32kctrl.c
+++ b/watch-library/hardware/hpl/osc32kctrl/hpl_osc32kctrl.c
@@ -82,5 +82,7 @@ void _osc32kctrl_init_sources(void)
 #endif
 
 	hri_osc32kctrl_write_RTCCTRL_reg(hw, OSC32KCTRL_RTCCTRL_RTCSEL(CONF_RTCCTRL));
+	hri_osc32kctrl_write_SLCDCTRL_SLCDSEL_bit(hw, CONF_SLCDCTRL_SRC);
+
 	(void)calib;
 }
diff --git a/watch-library/shared/config/hpl_osc32kctrl_config.h b/watch-library/shared/config/hpl_osc32kctrl_config.h
index 540f1c60..a77800e9 100644
--- a/watch-library/shared/config/hpl_osc32kctrl_config.h
+++ b/watch-library/shared/config/hpl_osc32kctrl_config.h
@@ -50,12 +50,12 @@
 
 // <h> SLCD source control
 // <y> SLCD Clock Source Selection
-// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
-// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
+// <0> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
+// <1> 32kHz External Crystal Oscillator (XOSC32K)
 // <i> This defines the clock source for SLCD
 // <id> slcd_source_oscillator
 #ifndef CONF_SLCDCTRL_SRC
-#define CONF_SLCDCTRL_SRC GCLK_GENCTRL_SRC_XOSC32K
+#define CONF_SLCDCTRL_SRC 0
 #endif
 
 // </h>
-- 
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