From 39a5c822a2a2e798e2e39ff8a98b7af84253026c Mon Sep 17 00:00:00 2001 From: Joey Castillo Date: Sat, 28 Aug 2021 12:50:18 -0400 Subject: add tinyusb --- tinyusb/hw/bsp/lpcxpresso1347/board.mk | 44 ++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100755 tinyusb/hw/bsp/lpcxpresso1347/board.mk (limited to 'tinyusb/hw/bsp/lpcxpresso1347/board.mk') diff --git a/tinyusb/hw/bsp/lpcxpresso1347/board.mk b/tinyusb/hw/bsp/lpcxpresso1347/board.mk new file mode 100755 index 00000000..0d56a33a --- /dev/null +++ b/tinyusb/hw/bsp/lpcxpresso1347/board.mk @@ -0,0 +1,44 @@ +DEPS_SUBMODULES += hw/mcu/nxp/lpcopen + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m3 \ + -nostdlib \ + -DCORE_M3 \ + -D__USE_LPCOPEN \ + -DCFG_EXAMPLE_MSC_READONLY \ + -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +# startup.c and lpc_types.h cause following errors +CFLAGS += -Wno-error=strict-prototypes + +MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/$(BOARD)/lpc1347.ld + +SRC_C += \ + src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ + $(MCU_DIR)/../gcc/cr_startup_lpc13xx.c \ + $(MCU_DIR)/src/chip_13xx.c \ + $(MCU_DIR)/src/clock_13xx.c \ + $(MCU_DIR)/src/gpio_13xx_1.c \ + $(MCU_DIR)/src/iocon_13xx.c \ + $(MCU_DIR)/src/sysctl_13xx.c \ + $(MCU_DIR)/src/sysinit_13xx.c + +INC += \ + $(TOP)/$(MCU_DIR)/inc + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM3 + +# For flash-jlink target +JLINK_DEVICE = LPC1347 + +# flash using jlink +flash: flash-jlink -- cgit v1.2.3