From b4b81f476c991a8d1620e1a9e010fcff847b3c04 Mon Sep 17 00:00:00 2001 From: Joey Castillo Date: Tue, 20 Jul 2021 16:26:54 -0400 Subject: bring in all the atmel studio stuff --- .../include/instance/osc32kctrl.h | 136 +++++++++------------ 1 file changed, 61 insertions(+), 75 deletions(-) mode change 100755 => 100644 Sensor Watch Starter Project/include/instance/osc32kctrl.h (limited to 'Sensor Watch Starter Project/include/instance/osc32kctrl.h') diff --git a/Sensor Watch Starter Project/include/instance/osc32kctrl.h b/Sensor Watch Starter Project/include/instance/osc32kctrl.h old mode 100755 new mode 100644 index 13660423..6edc7597 --- a/Sensor Watch Starter Project/include/instance/osc32kctrl.h +++ b/Sensor Watch Starter Project/include/instance/osc32kctrl.h @@ -1,75 +1,61 @@ -/** - * \file - * - * \brief Instance description for OSC32KCTRL - * - * Copyright (c) 2015 Atmel Corporation. All rights reserved. - * - * \asf_license_start - * - * \page License - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * 3. The name of Atmel may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * 4. This software may only be redistributed and used in connection with an - * Atmel microcontroller product. - * - * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * \asf_license_stop - * - */ - -#ifndef _SAML22_OSC32KCTRL_INSTANCE_ -#define _SAML22_OSC32KCTRL_INSTANCE_ - -/* ========== Register definition for OSC32KCTRL peripheral ========== */ -#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) -#define REG_OSC32KCTRL_INTENCLR (0x40001400U) /**< \brief (OSC32KCTRL) Interrupt Enable Clear */ -#define REG_OSC32KCTRL_INTENSET (0x40001404U) /**< \brief (OSC32KCTRL) Interrupt Enable Set */ -#define REG_OSC32KCTRL_INTFLAG (0x40001408U) /**< \brief (OSC32KCTRL) Interrupt Flag Status and Clear */ -#define REG_OSC32KCTRL_STATUS (0x4000140CU) /**< \brief (OSC32KCTRL) Power and Clocks Status */ -#define REG_OSC32KCTRL_RTCCTRL (0x40001410U) /**< \brief (OSC32KCTRL) RTC Clock Selection */ -#define REG_OSC32KCTRL_SLCDCTRL (0x40001411U) /**< \brief (OSC32KCTRL) SLCD Clock Selection */ -#define REG_OSC32KCTRL_XOSC32K (0x40001414U) /**< \brief (OSC32KCTRL) 32kHz External Crystal Oscillator (XOSC32K) Control */ -#define REG_OSC32KCTRL_CFDCTRL (0x40001416U) /**< \brief (OSC32KCTRL) Clock Failure Detector Control */ -#define REG_OSC32KCTRL_EVCTRL (0x40001417U) /**< \brief (OSC32KCTRL) Event Control */ -#define REG_OSC32KCTRL_OSCULP32K (0x4000141CU) /**< \brief (OSC32KCTRL) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */ -#else -#define REG_OSC32KCTRL_INTENCLR (*(RwReg *)0x40001400U) /**< \brief (OSC32KCTRL) Interrupt Enable Clear */ -#define REG_OSC32KCTRL_INTENSET (*(RwReg *)0x40001404U) /**< \brief (OSC32KCTRL) Interrupt Enable Set */ -#define REG_OSC32KCTRL_INTFLAG (*(RwReg *)0x40001408U) /**< \brief (OSC32KCTRL) Interrupt Flag Status and Clear */ -#define REG_OSC32KCTRL_STATUS (*(RoReg *)0x4000140CU) /**< \brief (OSC32KCTRL) Power and Clocks Status */ -#define REG_OSC32KCTRL_RTCCTRL (*(RwReg8 *)0x40001410U) /**< \brief (OSC32KCTRL) RTC Clock Selection */ -#define REG_OSC32KCTRL_SLCDCTRL (*(RwReg8 *)0x40001411U) /**< \brief (OSC32KCTRL) SLCD Clock Selection */ -#define REG_OSC32KCTRL_XOSC32K (*(RwReg16*)0x40001414U) /**< \brief (OSC32KCTRL) 32kHz External Crystal Oscillator (XOSC32K) Control */ -#define REG_OSC32KCTRL_CFDCTRL (*(RwReg8 *)0x40001416U) /**< \brief (OSC32KCTRL) Clock Failure Detector Control */ -#define REG_OSC32KCTRL_EVCTRL (*(RwReg8 *)0x40001417U) /**< \brief (OSC32KCTRL) Event Control */ -#define REG_OSC32KCTRL_OSCULP32K (*(RwReg *)0x4000141CU) /**< \brief (OSC32KCTRL) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */ -#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ - -/* ========== Instance parameters for OSC32KCTRL peripheral ========== */ -#define OSC32KCTRL_OSC32K_COARSE_CALIB_MSB 6 - -#endif /* _SAML22_OSC32KCTRL_INSTANCE_ */ +/** + * \file + * + * \brief Instance description for OSC32KCTRL + * + * Copyright (c) 2018 Microchip Technology Inc. + * + * \asf_license_start + * + * \page License + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the Licence at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * \asf_license_stop + * + */ + +#ifndef _SAML22_OSC32KCTRL_INSTANCE_ +#define _SAML22_OSC32KCTRL_INSTANCE_ + +/* ========== Register definition for OSC32KCTRL peripheral ========== */ +#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) +#define REG_OSC32KCTRL_INTENCLR (0x40001400) /**< \brief (OSC32KCTRL) Interrupt Enable Clear */ +#define REG_OSC32KCTRL_INTENSET (0x40001404) /**< \brief (OSC32KCTRL) Interrupt Enable Set */ +#define REG_OSC32KCTRL_INTFLAG (0x40001408) /**< \brief (OSC32KCTRL) Interrupt Flag Status and Clear */ +#define REG_OSC32KCTRL_STATUS (0x4000140C) /**< \brief (OSC32KCTRL) Power and Clocks Status */ +#define REG_OSC32KCTRL_RTCCTRL (0x40001410) /**< \brief (OSC32KCTRL) RTC Clock Selection */ +#define REG_OSC32KCTRL_SLCDCTRL (0x40001411) /**< \brief (OSC32KCTRL) SLCD Clock Selection */ +#define REG_OSC32KCTRL_XOSC32K (0x40001414) /**< \brief (OSC32KCTRL) 32kHz External Crystal Oscillator (XOSC32K) Control */ +#define REG_OSC32KCTRL_CFDCTRL (0x40001416) /**< \brief (OSC32KCTRL) Clock Failure Detector Control */ +#define REG_OSC32KCTRL_EVCTRL (0x40001417) /**< \brief (OSC32KCTRL) Event Control */ +#define REG_OSC32KCTRL_OSCULP32K (0x4000141C) /**< \brief (OSC32KCTRL) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */ +#else +#define REG_OSC32KCTRL_INTENCLR (*(RwReg *)0x40001400UL) /**< \brief (OSC32KCTRL) Interrupt Enable Clear */ +#define REG_OSC32KCTRL_INTENSET (*(RwReg *)0x40001404UL) /**< \brief (OSC32KCTRL) Interrupt Enable Set */ +#define REG_OSC32KCTRL_INTFLAG (*(RwReg *)0x40001408UL) /**< \brief (OSC32KCTRL) Interrupt Flag Status and Clear */ +#define REG_OSC32KCTRL_STATUS (*(RoReg *)0x4000140CUL) /**< \brief (OSC32KCTRL) Power and Clocks Status */ +#define REG_OSC32KCTRL_RTCCTRL (*(RwReg8 *)0x40001410UL) /**< \brief (OSC32KCTRL) RTC Clock Selection */ +#define REG_OSC32KCTRL_SLCDCTRL (*(RwReg8 *)0x40001411UL) /**< \brief (OSC32KCTRL) SLCD Clock Selection */ +#define REG_OSC32KCTRL_XOSC32K (*(RwReg16*)0x40001414UL) /**< \brief (OSC32KCTRL) 32kHz External Crystal Oscillator (XOSC32K) Control */ +#define REG_OSC32KCTRL_CFDCTRL (*(RwReg8 *)0x40001416UL) /**< \brief (OSC32KCTRL) Clock Failure Detector Control */ +#define REG_OSC32KCTRL_EVCTRL (*(RwReg8 *)0x40001417UL) /**< \brief (OSC32KCTRL) Event Control */ +#define REG_OSC32KCTRL_OSCULP32K (*(RwReg *)0x4000141CUL) /**< \brief (OSC32KCTRL) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */ +#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ + +/* ========== Instance parameters for OSC32KCTRL peripheral ========== */ +#define OSC32KCTRL_OSC32K_COARSE_CALIB_MSB 6 + +#endif /* _SAML22_OSC32KCTRL_INSTANCE_ */ -- cgit v1.2.3