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Diffstat (limited to 'watch-library/include/instance/trng.h')
-rw-r--r-- | watch-library/include/instance/trng.h | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/watch-library/include/instance/trng.h b/watch-library/include/instance/trng.h new file mode 100644 index 00000000..0f80f00a --- /dev/null +++ b/watch-library/include/instance/trng.h @@ -0,0 +1,51 @@ +/** + * \file + * + * \brief Instance description for TRNG + * + * Copyright (c) 2018 Microchip Technology Inc. + * + * \asf_license_start + * + * \page License + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the Licence at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * \asf_license_stop + * + */ + +#ifndef _SAML22_TRNG_INSTANCE_ +#define _SAML22_TRNG_INSTANCE_ + +/* ========== Register definition for TRNG peripheral ========== */ +#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) +#define REG_TRNG_CTRLA (0x42004400) /**< \brief (TRNG) Control A */ +#define REG_TRNG_EVCTRL (0x42004404) /**< \brief (TRNG) Event Control */ +#define REG_TRNG_INTENCLR (0x42004408) /**< \brief (TRNG) Interrupt Enable Clear */ +#define REG_TRNG_INTENSET (0x42004409) /**< \brief (TRNG) Interrupt Enable Set */ +#define REG_TRNG_INTFLAG (0x4200440A) /**< \brief (TRNG) Interrupt Flag Status and Clear */ +#define REG_TRNG_DATA (0x42004420) /**< \brief (TRNG) Output Data */ +#else +#define REG_TRNG_CTRLA (*(RwReg8 *)0x42004400UL) /**< \brief (TRNG) Control A */ +#define REG_TRNG_EVCTRL (*(RwReg8 *)0x42004404UL) /**< \brief (TRNG) Event Control */ +#define REG_TRNG_INTENCLR (*(RwReg8 *)0x42004408UL) /**< \brief (TRNG) Interrupt Enable Clear */ +#define REG_TRNG_INTENSET (*(RwReg8 *)0x42004409UL) /**< \brief (TRNG) Interrupt Enable Set */ +#define REG_TRNG_INTFLAG (*(RwReg8 *)0x4200440AUL) /**< \brief (TRNG) Interrupt Flag Status and Clear */ +#define REG_TRNG_DATA (*(RoReg *)0x42004420UL) /**< \brief (TRNG) Output Data */ +#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ + + +#endif /* _SAML22_TRNG_INSTANCE_ */ |