diff options
Diffstat (limited to 'tinyusb/hw/bsp/lpc55')
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld | 234 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/boards/double_m33_express/board.h | 63 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/boards/double_m33_express/board.mk | 12 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h | 56 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk | 11 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h | 56 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk | 11 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/boards/mcu_link/board.h | 56 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/boards/mcu_link/board.mk | 11 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/family.c | 283 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/lpc55/family.mk | 67 |
11 files changed, 860 insertions, 0 deletions
diff --git a/tinyusb/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld b/tinyusb/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld new file mode 100755 index 00000000..6b5d852a --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld @@ -0,0 +1,234 @@ +/* +** ################################################################### +** Processors: LPC55S69JBD100_cm33_core0 +** LPC55S69JBD64_cm33_core0 +** LPC55S69JEV98_cm33_core0 +** +** Compiler: GNU C Compiler +** Reference manual: LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3 16 May 2019 +** Version: rev. 1.1, 2019-05-16 +** Build: b191008 +** +** Abstract: +** Linker file for the GNU C Compiler +** +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2019 NXP +** All rights reserved. +** +** SPDX-License-Identifier: BSD-3-Clause +** +** http: www.nxp.com +** mail: support@nxp.com +** +** ################################################################### +*/ + + + +/* Entry Point */ +ENTRY(Reset_Handler) + +HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; +STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800; +RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x1800 : 0; + +/* Specify the memory areas */ +MEMORY +{ + m_interrupts (RX) : ORIGIN = 0x00010000, LENGTH = 0x00000200 + m_text (RX) : ORIGIN = 0x00010200, LENGTH = 0x0007FE00 + m_core1_image (RX) : ORIGIN = 0x00090000, LENGTH = 0x00008000 + m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00033000 - RPMSG_SHMEM_SIZE + rpmsg_sh_mem (RW) : ORIGIN = 0x20033000 - RPMSG_SHMEM_SIZE, LENGTH = RPMSG_SHMEM_SIZE + m_usb_sram (RW) : ORIGIN = 0x40100000, LENGTH = 0x00004000 +} + +/* Define output sections */ +SECTIONS +{ + /* section for storing the secondary core image */ + .m0code : + { + . = ALIGN(4) ; + KEEP (*(.m0code)) + *(.m0code*) + . = ALIGN(4) ; + } > m_core1_image + + /* NOINIT section for rpmsg_sh_mem */ + .noinit_rpmsg_sh_mem (NOLOAD) : ALIGN(4) + { + __RPMSG_SH_MEM_START__ = .; + *(.noinit.$rpmsg_sh_mem*) + . = ALIGN(4) ; + __RPMSG_SH_MEM_END__ = .; + } > rpmsg_sh_mem + + /* The startup code goes first into internal flash */ + .interrupts : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + /* The program code and other data goes into internal flash */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + *(.ramfunc*) /* for functions in ram */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + __heap_limit = .; /* Add for _sbrk */ + } > m_data + + .stack : + { + . = ALIGN(8); + . += STACK_SIZE; + } > m_data + + m_usb_bdt (NOLOAD) : + { + . = ALIGN(512); + *(m_usb_bdt) + } > m_usb_sram + + m_usb_global (NOLOAD) : + { + *(m_usb_global) + } > m_usb_sram + + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data) + LENGTH(m_data); + __StackLimit = __StackTop - STACK_SIZE; + PROVIDE(__stack = __StackTop); + + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") +} + diff --git a/tinyusb/hw/bsp/lpc55/boards/double_m33_express/board.h b/tinyusb/hw/bsp/lpc55/boards/double_m33_express/board.h new file mode 100755 index 00000000..975e74e9 --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/boards/double_m33_express/board.h @@ -0,0 +1,63 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// LED +#define LED_PORT 0 +#define LED_PIN 1 +#define LED_STATE_ON 1 + +// WAKE button +#define BUTTON_PORT 0 +#define BUTTON_PIN 5 +#define BUTTON_STATE_ACTIVE 0 + +// Number of neopixels +#define NEOPIXEL_NUMBER 2 +#define NEOPIXEL_PORT 0 +#define NEOPIXEL_PIN 27 +#define NEOPIXEL_CH 6 +#define NEOPIXEL_TYPE 0 + +// UART +#define UART_DEV USART0 +#define UART_RX_PINMUX 0U, 29U, IOCON_PIO_DIG_FUNC1_EN +#define UART_TX_PINMUX 0U, 30U, IOCON_PIO_DIG_FUNC1_EN + +// XTAL +#define XTAL0_CLK_HZ (16 * 1000 * 1000U) + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/tinyusb/hw/bsp/lpc55/boards/double_m33_express/board.mk b/tinyusb/hw/bsp/lpc55/boards/double_m33_express/board.mk new file mode 100755 index 00000000..d28700ca --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/boards/double_m33_express/board.mk @@ -0,0 +1,12 @@ +MCU_VARIANT = LPC55S69 +MCU_CORE = LPC55S69_cm33_core0 +PORT ?= 1 + +CFLAGS += -DCPU_LPC55S69JBD100_cm33_core0 +LD_FILE = $(BOARD_PATH)/LPC55S69_cm33_core0_uf2.ld + +JLINK_DEVICE = LPC55S69 +PYOCD_TARGET = LPC55S69 + +# flash using pyocd +flash: flash-pyocd diff --git a/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h b/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h new file mode 100755 index 00000000..f85701b0 --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h @@ -0,0 +1,56 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// LED +#define LED_PORT 1 +#define LED_PIN 6 +#define LED_STATE_ON 0 + +// WAKE button +#define BUTTON_PORT 1 +#define BUTTON_PIN 18 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_DEV USART0 +#define UART_RX_PINMUX 0, 29, IOCON_PIO_DIG_FUNC1_EN +#define UART_TX_PINMUX 0, 30, IOCON_PIO_DIG_FUNC1_EN + +// XTAL +#define XTAL0_CLK_HZ (16 * 1000 * 1000U) + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk b/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk new file mode 100755 index 00000000..ec0828e4 --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk @@ -0,0 +1,11 @@ +MCU_VARIANT = LPC55S28 +MCU_CORE = LPC55S28 +PORT ?= 1 + +CFLAGS += -DCPU_LPC55S28JBD100 + +JLINK_DEVICE = LPC55S28 +PYOCD_TARGET = LPC55S28 + +# flash using pyocd +flash: flash-pyocd diff --git a/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h b/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h new file mode 100755 index 00000000..f85701b0 --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h @@ -0,0 +1,56 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// LED +#define LED_PORT 1 +#define LED_PIN 6 +#define LED_STATE_ON 0 + +// WAKE button +#define BUTTON_PORT 1 +#define BUTTON_PIN 18 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_DEV USART0 +#define UART_RX_PINMUX 0, 29, IOCON_PIO_DIG_FUNC1_EN +#define UART_TX_PINMUX 0, 30, IOCON_PIO_DIG_FUNC1_EN + +// XTAL +#define XTAL0_CLK_HZ (16 * 1000 * 1000U) + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk b/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk new file mode 100755 index 00000000..73edc88a --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk @@ -0,0 +1,11 @@ +MCU_VARIANT = LPC55S69 +MCU_CORE = LPC55S69_cm33_core0 +PORT ?= 1 + +CFLAGS += -DCPU_LPC55S69JBD100_cm33_core0 + +JLINK_DEVICE = LPC55S69 +PYOCD_TARGET = LPC55S69 + +# flash using pyocd +flash: flash-pyocd diff --git a/tinyusb/hw/bsp/lpc55/boards/mcu_link/board.h b/tinyusb/hw/bsp/lpc55/boards/mcu_link/board.h new file mode 100755 index 00000000..5e17cf9f --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/boards/mcu_link/board.h @@ -0,0 +1,56 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// LED +#define LED_PORT 0 +#define LED_PIN 5 +#define LED_STATE_ON 0 + +// WAKE button (Dummy, use unused pin +#define BUTTON_PORT 0 +#define BUTTON_PIN 30 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_DEV USART0 +#define UART_RX_PINMUX 0, 24, IOCON_PIO_DIG_FUNC1_EN +#define UART_TX_PINMUX 0, 25, IOCON_PIO_DIG_FUNC1_EN + +// XTAL +#define XTAL0_CLK_HZ (16 * 1000 * 1000U) + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/tinyusb/hw/bsp/lpc55/boards/mcu_link/board.mk b/tinyusb/hw/bsp/lpc55/boards/mcu_link/board.mk new file mode 100755 index 00000000..ceb1d0eb --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/boards/mcu_link/board.mk @@ -0,0 +1,11 @@ +MCU_VARIANT = LPC55S69 +MCU_CORE = LPC55S69_cm33_core0 +PORT ?= 1 + +CFLAGS += -DCPU_LPC55S69JBD64_cm33_core0 + +JLINK_DEVICE = LPC55S69 +PYOCD_TARGET = LPC55S69 + +# flash using pyocd +flash: flash-pyocd diff --git a/tinyusb/hw/bsp/lpc55/family.c b/tinyusb/hw/bsp/lpc55/family.c new file mode 100755 index 00000000..4fc1f622 --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/family.c @@ -0,0 +1,283 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "board.h" +#include "fsl_device_registers.h" +#include "fsl_gpio.h" +#include "fsl_power.h" +#include "fsl_iocon.h" +#include "fsl_usart.h" +#include "fsl_sctimer.h" +#include "sct_neopixel.h" + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ + +// IOCON pin mux +#define IOCON_PIO_DIGITAL_EN 0x0100u // Enables digital function +#define IOCON_PIO_FUNC0 0x00u // Selects pin function 0 +#define IOCON_PIO_FUNC1 0x01u // Selects pin function 1 +#define IOCON_PIO_FUNC4 0x04u // Selects pin function 4 +#define IOCON_PIO_FUNC7 0x07u // Selects pin function 7 +#define IOCON_PIO_INV_DI 0x00u // Input function is not inverted +#define IOCON_PIO_MODE_INACT 0x00u // No addition pin function +#define IOCON_PIO_OPENDRAIN_DI 0x00u // Open drain is disabled +#define IOCON_PIO_SLEW_STANDARD 0x00u // Standard mode, output slew rate control is enabled + +#define IOCON_PIO_DIG_FUNC0_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC0) // Digital pin function 0 enabled +#define IOCON_PIO_DIG_FUNC1_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC1) // Digital pin function 1 enabled +#define IOCON_PIO_DIG_FUNC4_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC4) // Digital pin function 2 enabled +#define IOCON_PIO_DIG_FUNC7_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC7) // Digital pin function 2 enabled + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void USB1_IRQHandler(void) +{ + tud_int_handler(1); +} + +/**************************************************************** +name: BOARD_BootClockFROHF96M +outputs: +- {id: SYSTICK_clock.outFreq, value: 96 MHz} +- {id: System_clock.outFreq, value: 96 MHz} +settings: +- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf} +sources: +- {id: SYSCON.fro_hf.outFreq, value: 96 MHz} +******************************************************************/ +void BootClockFROHF96M(void) +{ + /*!< Set up the clock sources */ + /*!< Set up FRO */ + POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on */ + CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */ + CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without + accidentally being below the voltage for current speed */ + + CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */ + + POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ + CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ + + /*!< Set SystemCoreClock variable. */ + SystemCoreClock = 96000000U; +} + +void board_init(void) +{ + // Enable IOCON clock + CLOCK_EnableClock(kCLOCK_Iocon); + + // Init 96 MHz clock + BootClockFROHF96M(); + + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + +#if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + // Init all GPIO ports + GPIO_PortInit(GPIO, 0); + GPIO_PortInit(GPIO, 1); + + // LED + IOCON_PinMuxSet(IOCON, LED_PORT, LED_PIN, IOCON_PIO_DIG_FUNC0_EN); + gpio_pin_config_t const led_config = { kGPIO_DigitalOutput, 1}; + GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config); + + board_led_write(0); + +#ifdef NEOPIXEL_PIN + // Neopixel + static uint32_t pixelData[NEOPIXEL_NUMBER]; + IOCON_PinMuxSet(IOCON, NEOPIXEL_PORT, NEOPIXEL_PIN, IOCON_PIO_DIG_FUNC4_EN); + + sctpix_init(NEOPIXEL_TYPE); + sctpix_addCh(NEOPIXEL_CH, pixelData, NEOPIXEL_NUMBER); + sctpix_setPixel(NEOPIXEL_CH, 0, 0x100010); + sctpix_setPixel(NEOPIXEL_CH, 1, 0x100010); + sctpix_show(); +#endif + + // Button + IOCON_PinMuxSet(IOCON, BUTTON_PORT, BUTTON_PIN, IOCON_PIO_DIG_FUNC0_EN); + gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0}; + GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config); + +#ifdef UART_DEV + // UART + IOCON_PinMuxSet(IOCON, UART_RX_PINMUX); + IOCON_PinMuxSet(IOCON, UART_TX_PINMUX); + + // Enable UART when debug log is on + CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0); + usart_config_t uart_config; + USART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + USART_Init(UART_DEV, &uart_config, 12000000); +#endif + + // USB VBUS + /* PORT0 PIN22 configured as USB0_VBUS */ + IOCON_PinMuxSet(IOCON, 0U, 22U, IOCON_PIO_DIG_FUNC7_EN); + +#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + // Port0 is Full Speed + + /* Turn on USB0 Phy */ + POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); + + /* reset the IP to make sure it's in reset state. */ + RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn); + RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn); + RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn); + + // Enable USB Clock Adjustments to trim the FRO for the full speed controller + ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK; + CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false); + CLOCK_AttachClk(kFRO_HF_to_USB0_CLK); + + /*According to reference mannual, device mode setting has to be set by access usb host register */ + CLOCK_EnableClock(kCLOCK_Usbhsl0); // enable usb0 host clock + USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK; + CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock + + /* enable USB Device clock */ + CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); +#endif + +#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE + // Port1 is High Speed + + /* Turn on USB1 Phy */ + POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); + + /* reset the IP to make sure it's in reset state. */ + RESET_PeripheralReset(kUSB1H_RST_SHIFT_RSTn); + RESET_PeripheralReset(kUSB1D_RST_SHIFT_RSTn); + RESET_PeripheralReset(kUSB1_RST_SHIFT_RSTn); + RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn); + + /* According to reference mannual, device mode setting has to be set by access usb host register */ + CLOCK_EnableClock(kCLOCK_Usbh1); // enable usb0 host clock + + USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; // Put PHY powerdown under software control + USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK; + + CLOCK_DisableClock(kCLOCK_Usbh1); // disable usb0 host clock + + /* enable USB Device clock */ + CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_UsbPhySrcExt, XTAL0_CLK_HZ); + CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUnused, 0U); + CLOCK_EnableClock(kCLOCK_UsbRam1); + + // Enable PHY support for Low speed device + LS via FS Hub + USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; + + // Enable all power for normal operation + USBPHY->PWD = 0; + + USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK; + USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK; + + // TX Timing +// uint32_t phytx = USBPHY->TX; +// phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); +// phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); +// USBPHY->TX = phytx; +#endif +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); + +#ifdef NEOPIXEL_PIN + if (state) { + sctpix_setPixel(NEOPIXEL_CH, 0, 0x100000); + sctpix_setPixel(NEOPIXEL_CH, 1, 0x101010); + } else { + sctpix_setPixel(NEOPIXEL_CH, 0, 0x001000); + sctpix_setPixel(NEOPIXEL_CH, 1, 0x000010); + } + sctpix_show(); +#endif +} + +uint32_t board_button_read(void) +{ + // active low + return BUTTON_STATE_ACTIVE == GPIO_PinRead(GPIO, BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ + USART_WriteBlocking(UART_DEV, (uint8_t *)buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/tinyusb/hw/bsp/lpc55/family.mk b/tinyusb/hw/bsp/lpc55/family.mk new file mode 100755 index 00000000..4e8d65ce --- /dev/null +++ b/tinyusb/hw/bsp/lpc55/family.mk @@ -0,0 +1,67 @@ +UF2_FAMILY_ID = 0x2abc77ec +SDK_DIR = hw/mcu/nxp/mcux-sdk +DEPS_SUBMODULES += lib/sct_neopixel $(SDK_DIR) + +include $(TOP)/$(BOARD_PATH)/board.mk + +# Default to Highspeed PORT1 +PORT ?= 1 + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m33 \ + -mfloat-abi=hard \ + -mfpu=fpv5-sp-d16 \ + -DCFG_TUSB_MCU=OPT_MCU_LPC55XX \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \ + -DBOARD_DEVICE_RHPORT_NUM=$(PORT) + +ifeq ($(PORT), 1) + $(info "PORT1 High Speed") + CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED + + # LPC55 Highspeed Port1 can only write to USB_SRAM region + CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))' +else + $(info "PORT0 Full Speed") +endif + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=float-equal + +MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT) + +# All source paths should be relative to the top level. +LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_CORE)_flash.ld + +SRC_C += \ + src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ + $(MCU_DIR)/system_$(MCU_CORE).c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(MCU_DIR)/drivers/fsl_power.c \ + $(MCU_DIR)/drivers/fsl_reset.c \ + $(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \ + $(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \ + $(SDK_DIR)/drivers/flexcomm/fsl_usart.c \ + lib/sct_neopixel/sct_neopixel.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/lib/sct_neopixel \ + $(TOP)/$(MCU_DIR)/../../CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/drivers \ + $(TOP)/$(SDK_DIR)/drivers/common \ + $(TOP)/$(SDK_DIR)/drivers/flexcomm \ + $(TOP)/$(SDK_DIR)/drivers/lpc_iocon \ + $(TOP)/$(SDK_DIR)/drivers/lpc_gpio \ + $(TOP)/$(SDK_DIR)/drivers/sctimer + +SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S + +LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM33_NTZ/non_secure |