diff options
Diffstat (limited to 'Sensor Watch Starter Project/include/instance/supc.h')
| -rw-r--r--[-rwxr-xr-x] | Sensor Watch Starter Project/include/instance/supc.h | 144 |
1 files changed, 65 insertions, 79 deletions
diff --git a/Sensor Watch Starter Project/include/instance/supc.h b/Sensor Watch Starter Project/include/instance/supc.h index b148c204..0800c5f3 100755..100644 --- a/Sensor Watch Starter Project/include/instance/supc.h +++ b/Sensor Watch Starter Project/include/instance/supc.h @@ -1,79 +1,65 @@ -/**
- * \file
- *
- * \brief Instance description for SUPC
- *
- * Copyright (c) 2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- * Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-
-#ifndef _SAML22_SUPC_INSTANCE_
-#define _SAML22_SUPC_INSTANCE_
-
-/* ========== Register definition for SUPC peripheral ========== */
-#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
-#define REG_SUPC_INTENCLR (0x40001800U) /**< \brief (SUPC) Interrupt Enable Clear */
-#define REG_SUPC_INTENSET (0x40001804U) /**< \brief (SUPC) Interrupt Enable Set */
-#define REG_SUPC_INTFLAG (0x40001808U) /**< \brief (SUPC) Interrupt Flag Status and Clear */
-#define REG_SUPC_STATUS (0x4000180CU) /**< \brief (SUPC) Power and Clocks Status */
-#define REG_SUPC_BOD33 (0x40001810U) /**< \brief (SUPC) BOD33 Control */
-#define REG_SUPC_BOD12 (0x40001814U) /**< \brief (SUPC) BOD12 Control */
-#define REG_SUPC_VREG (0x40001818U) /**< \brief (SUPC) VREG Control */
-#define REG_SUPC_VREF (0x4000181CU) /**< \brief (SUPC) VREF Control */
-#define REG_SUPC_BBPS (0x40001820U) /**< \brief (SUPC) Battery Backup Power Switch */
-#define REG_SUPC_BKOUT (0x40001824U) /**< \brief (SUPC) Backup Output Control */
-#define REG_SUPC_BKIN (0x40001828U) /**< \brief (SUPC) Backup Input Control */
-#else
-#define REG_SUPC_INTENCLR (*(RwReg *)0x40001800U) /**< \brief (SUPC) Interrupt Enable Clear */
-#define REG_SUPC_INTENSET (*(RwReg *)0x40001804U) /**< \brief (SUPC) Interrupt Enable Set */
-#define REG_SUPC_INTFLAG (*(RwReg *)0x40001808U) /**< \brief (SUPC) Interrupt Flag Status and Clear */
-#define REG_SUPC_STATUS (*(RoReg *)0x4000180CU) /**< \brief (SUPC) Power and Clocks Status */
-#define REG_SUPC_BOD33 (*(RwReg *)0x40001810U) /**< \brief (SUPC) BOD33 Control */
-#define REG_SUPC_BOD12 (*(RwReg *)0x40001814U) /**< \brief (SUPC) BOD12 Control */
-#define REG_SUPC_VREG (*(RwReg *)0x40001818U) /**< \brief (SUPC) VREG Control */
-#define REG_SUPC_VREF (*(RwReg *)0x4000181CU) /**< \brief (SUPC) VREF Control */
-#define REG_SUPC_BBPS (*(RwReg *)0x40001820U) /**< \brief (SUPC) Battery Backup Power Switch */
-#define REG_SUPC_BKOUT (*(RwReg *)0x40001824U) /**< \brief (SUPC) Backup Output Control */
-#define REG_SUPC_BKIN (*(RoReg *)0x40001828U) /**< \brief (SUPC) Backup Input Control */
-#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
-
-/* ========== Instance parameters for SUPC peripheral ========== */
-#define SUPC_BOD12_CALIB_MSB 5
-#define SUPC_BOD33_CALIB_MSB 5
-#define SUPC_OUT_NUM_MSB 1 // MSB of backup output pad Number
-
-#endif /* _SAML22_SUPC_INSTANCE_ */
+/** + * \file + * + * \brief Instance description for SUPC + * + * Copyright (c) 2018 Microchip Technology Inc. + * + * \asf_license_start + * + * \page License + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the Licence at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * \asf_license_stop + * + */ + +#ifndef _SAML22_SUPC_INSTANCE_ +#define _SAML22_SUPC_INSTANCE_ + +/* ========== Register definition for SUPC peripheral ========== */ +#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) +#define REG_SUPC_INTENCLR (0x40001800) /**< \brief (SUPC) Interrupt Enable Clear */ +#define REG_SUPC_INTENSET (0x40001804) /**< \brief (SUPC) Interrupt Enable Set */ +#define REG_SUPC_INTFLAG (0x40001808) /**< \brief (SUPC) Interrupt Flag Status and Clear */ +#define REG_SUPC_STATUS (0x4000180C) /**< \brief (SUPC) Power and Clocks Status */ +#define REG_SUPC_BOD33 (0x40001810) /**< \brief (SUPC) BOD33 Control */ +#define REG_SUPC_BOD12 (0x40001814) /**< \brief (SUPC) BOD12 Control */ +#define REG_SUPC_VREG (0x40001818) /**< \brief (SUPC) VREG Control */ +#define REG_SUPC_VREF (0x4000181C) /**< \brief (SUPC) VREF Control */ +#define REG_SUPC_BBPS (0x40001820) /**< \brief (SUPC) Battery Backup Power Switch */ +#define REG_SUPC_BKOUT (0x40001824) /**< \brief (SUPC) Backup Output Control */ +#define REG_SUPC_BKIN (0x40001828) /**< \brief (SUPC) Backup Input Control */ +#else +#define REG_SUPC_INTENCLR (*(RwReg *)0x40001800UL) /**< \brief (SUPC) Interrupt Enable Clear */ +#define REG_SUPC_INTENSET (*(RwReg *)0x40001804UL) /**< \brief (SUPC) Interrupt Enable Set */ +#define REG_SUPC_INTFLAG (*(RwReg *)0x40001808UL) /**< \brief (SUPC) Interrupt Flag Status and Clear */ +#define REG_SUPC_STATUS (*(RoReg *)0x4000180CUL) /**< \brief (SUPC) Power and Clocks Status */ +#define REG_SUPC_BOD33 (*(RwReg *)0x40001810UL) /**< \brief (SUPC) BOD33 Control */ +#define REG_SUPC_BOD12 (*(RwReg *)0x40001814UL) /**< \brief (SUPC) BOD12 Control */ +#define REG_SUPC_VREG (*(RwReg *)0x40001818UL) /**< \brief (SUPC) VREG Control */ +#define REG_SUPC_VREF (*(RwReg *)0x4000181CUL) /**< \brief (SUPC) VREF Control */ +#define REG_SUPC_BBPS (*(RwReg *)0x40001820UL) /**< \brief (SUPC) Battery Backup Power Switch */ +#define REG_SUPC_BKOUT (*(RwReg *)0x40001824UL) /**< \brief (SUPC) Backup Output Control */ +#define REG_SUPC_BKIN (*(RoReg *)0x40001828UL) /**< \brief (SUPC) Backup Input Control */ +#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ + +/* ========== Instance parameters for SUPC peripheral ========== */ +#define SUPC_BOD12_CALIB_MSB 5 +#define SUPC_BOD33_CALIB_MSB 5 +#define SUPC_OUT_NUM_MSB 1 // MSB of backup output pad Number + +#endif /* _SAML22_SUPC_INSTANCE_ */ |