annotate TRNG erratum, address review comment

1 files changed, 7 insertions, 7 deletions

diff --git a/watch-library/hardware/watch/watch_private.c b/watch-library/hardware/watch/watch_private.c
index 20f4ee54..1a33e5c5 100644
--- a/watch-library/hardware/watch/watch_private.c
+++ b/watch-library/hardware/watch/watch_private.c
@@ -110,18 +110,18 @@ int getentropy(void *buf, size_t buflen) {
         }
     }
 
-    watch_disable_TRNG(TRNG);
+    watch_disable_TRNG();
     hri_mclk_clear_APBCMASK_TRNG_bit(MCLK);
 
     return 0;
 }
 
-void watch_disable_TRNG(Trng *hw) {
-    hri_trng_clear_CTRLA_ENABLE_bit(hw);
-    // silicon erratum: the TRNG may leave internal components powered after disable.
-    // the workaround is to clear the register twice.
-    hri_trng_write_CTRLA_reg(hw, 0);
-    hri_trng_write_CTRLA_reg(hw, 0);
+void watch_disable_TRNG() {
+    // per Microchip datasheet clarification DS80000782,
+    // silicon erratum 1.16.1 indicates that the TRNG may leave internal components powered after being disabled.
+    // the workaround is to disable the TRNG by clearing the control register, twice.
+    hri_trng_write_CTRLA_reg(TRNG, 0);
+    hri_trng_write_CTRLA_reg(TRNG, 0);
 }