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authorJoey Castillo <joeycastillo@utexas.edu>2022-04-10 15:07:58 -0400
committerJoey Castillo <joeycastillo@utexas.edu>2022-04-10 15:08:47 -0400
commit405f010ade01fc337e9dbf9728260783ad62f4a3 (patch)
tree0c54e42191079577c054ccc00254804c34258ef3 /watch-library/hardware/watch/watch_deepsleep.c
parent7b06d7d6fdbbf282ea32cfd0871e6b0310a08d0c (diff)
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static analysis: add comments to empty while loops
Diffstat (limited to 'watch-library/hardware/watch/watch_deepsleep.c')
-rw-r--r--watch-library/hardware/watch/watch_deepsleep.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/watch-library/hardware/watch/watch_deepsleep.c b/watch-library/hardware/watch/watch_deepsleep.c
index e3f654f2..b1b5b2c9 100644
--- a/watch-library/hardware/watch/watch_deepsleep.c
+++ b/watch-library/hardware/watch/watch_deepsleep.c
@@ -69,7 +69,7 @@ void watch_register_extwake_callback(uint8_t pin, ext_irq_cb_t callback, bool le
// disable the RTC
RTC->MODE2.CTRLA.bit.ENABLE = 0;
- while (RTC->MODE2.SYNCBUSY.bit.ENABLE);
+ while (RTC->MODE2.SYNCBUSY.bit.ENABLE); // wait for RTC to be disabled
// update the configuration
RTC->MODE2.TAMPCTRL.reg = config;