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authorJoey Castillo <jose.castillo@gmail.com>2021-08-02 13:48:35 -0400
committerJoey Castillo <jose.castillo@gmail.com>2021-08-02 14:36:04 -0400
commit34945d78e933fc62bedcc975e88be02a0b7fcc2e (patch)
tree317edc18fe08d76a1f5d8c3aabf88cf58ba73897 /watch-library/hal
parent2d1e2e8c76623543817f4c62b26fc300c1fd0d2c (diff)
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major project reorg, move library one level up
Diffstat (limited to 'watch-library/hal')
-rw-r--r--watch-library/hal/documentation/adc_sync.rst74
-rw-r--r--watch-library/hal/documentation/calendar.rst72
-rw-r--r--watch-library/hal/documentation/ext_irq.rst39
-rw-r--r--watch-library/hal/documentation/i2c_master_sync.rst87
-rw-r--r--watch-library/hal/documentation/pwm.rst53
-rw-r--r--watch-library/hal/documentation/slcd_sync.rst82
-rw-r--r--watch-library/hal/include/hal_adc_sync.h277
-rw-r--r--watch-library/hal/include/hal_atomic.h120
-rw-r--r--watch-library/hal/include/hal_calendar.h159
-rw-r--r--watch-library/hal/include/hal_delay.h89
-rw-r--r--watch-library/hal/include/hal_ext_irq.h118
-rw-r--r--watch-library/hal/include/hal_gpio.h201
-rw-r--r--watch-library/hal/include/hal_i2c_m_sync.h244
-rw-r--r--watch-library/hal/include/hal_init.h72
-rw-r--r--watch-library/hal/include/hal_io.h110
-rw-r--r--watch-library/hal/include/hal_pwm.h153
-rw-r--r--watch-library/hal/include/hal_slcd_sync.h168
-rw-r--r--watch-library/hal/include/hal_sleep.h74
-rw-r--r--watch-library/hal/include/hpl_adc_async.h264
-rw-r--r--watch-library/hal/include/hpl_adc_dma.h243
-rw-r--r--watch-library/hal/include/hpl_adc_sync.h271
-rw-r--r--watch-library/hal/include/hpl_calendar.h318
-rw-r--r--watch-library/hal/include/hpl_core.h56
-rw-r--r--watch-library/hal/include/hpl_delay.h97
-rw-r--r--watch-library/hal/include/hpl_dma.h176
-rw-r--r--watch-library/hal/include/hpl_ext_irq.h95
-rw-r--r--watch-library/hal/include/hpl_gpio.h185
-rw-r--r--watch-library/hal/include/hpl_i2c_m_async.h205
-rw-r--r--watch-library/hal/include/hpl_i2c_m_sync.h185
-rw-r--r--watch-library/hal/include/hpl_i2c_s_async.h184
-rw-r--r--watch-library/hal/include/hpl_i2c_s_sync.h184
-rw-r--r--watch-library/hal/include/hpl_init.h124
-rw-r--r--watch-library/hal/include/hpl_irq.h116
-rw-r--r--watch-library/hal/include/hpl_missing_features.h37
-rw-r--r--watch-library/hal/include/hpl_pwm.h105
-rw-r--r--watch-library/hal/include/hpl_reset.h92
-rw-r--r--watch-library/hal/include/hpl_slcd.h49
-rw-r--r--watch-library/hal/include/hpl_slcd_sync.h154
-rw-r--r--watch-library/hal/include/hpl_sleep.h88
-rw-r--r--watch-library/hal/include/hpl_spi.h163
-rw-r--r--watch-library/hal/include/hpl_spi_async.h131
-rw-r--r--watch-library/hal/include/hpl_spi_m_async.h243
-rw-r--r--watch-library/hal/include/hpl_spi_m_dma.h182
-rw-r--r--watch-library/hal/include/hpl_spi_m_sync.h166
-rw-r--r--watch-library/hal/include/hpl_spi_s_async.h232
-rw-r--r--watch-library/hal/include/hpl_spi_s_sync.h232
-rw-r--r--watch-library/hal/include/hpl_spi_sync.h70
-rw-r--r--watch-library/hal/include/hpl_time_measure.h94
-rw-r--r--watch-library/hal/include/hpl_timer.h160
-rw-r--r--watch-library/hal/include/hpl_usart.h113
-rw-r--r--watch-library/hal/include/hpl_usart_async.h270
-rw-r--r--watch-library/hal/include/hpl_usart_sync.h254
-rw-r--r--watch-library/hal/src/hal_adc_sync.c244
-rw-r--r--watch-library/hal/src/hal_atomic.c66
-rw-r--r--watch-library/hal/src/hal_calendar.c643
-rw-r--r--watch-library/hal/src/hal_delay.c80
-rw-r--r--watch-library/hal/src/hal_ext_irq.c188
-rw-r--r--watch-library/hal/src/hal_gpio.c44
-rw-r--r--watch-library/hal/src/hal_i2c_m_sync.c258
-rw-r--r--watch-library/hal/src/hal_init.c47
-rw-r--r--watch-library/hal/src/hal_io.c63
-rw-r--r--watch-library/hal/src/hal_pwm.c160
-rw-r--r--watch-library/hal/src/hal_slcd_sync.c150
-rw-r--r--watch-library/hal/src/hal_sleep.c73
-rw-r--r--watch-library/hal/utils/include/compiler.h64
-rw-r--r--watch-library/hal/utils/include/err_codes.h73
-rw-r--r--watch-library/hal/utils/include/events.h54
-rw-r--r--watch-library/hal/utils/include/parts.h41
-rw-r--r--watch-library/hal/utils/include/utils.h368
-rw-r--r--watch-library/hal/utils/include/utils_assert.h93
-rw-r--r--watch-library/hal/utils/include/utils_decrement_macro.h309
-rw-r--r--watch-library/hal/utils/include/utils_event.h115
-rw-r--r--watch-library/hal/utils/include/utils_increment_macro.h308
-rw-r--r--watch-library/hal/utils/include/utils_list.h164
-rw-r--r--watch-library/hal/utils/include/utils_recursion_macro.h69
-rw-r--r--watch-library/hal/utils/include/utils_repeat_macro.h322
-rw-r--r--watch-library/hal/utils/src/utils_assert.c46
-rw-r--r--watch-library/hal/utils/src/utils_event.c125
-rw-r--r--watch-library/hal/utils/src/utils_list.c136
-rw-r--r--watch-library/hal/utils/src/utils_syscalls.c152
80 files changed, 12185 insertions, 0 deletions
diff --git a/watch-library/hal/documentation/adc_sync.rst b/watch-library/hal/documentation/adc_sync.rst
new file mode 100644
index 00000000..d189565a
--- /dev/null
+++ b/watch-library/hal/documentation/adc_sync.rst
@@ -0,0 +1,74 @@
+======================
+ADC Synchronous driver
+======================
+
+An ADC (Analog-to-Digital Converter) converts analog signals to digital values.
+A reference signal with a known voltage level is quantified into equally
+sized chunks, each representing a digital value from 0 to the highest number
+possible with the bit resolution supported by the ADC. The input voltage
+measured by the ADC is compared against these chunks and the chunk with the
+closest voltage level defines the digital value that can be used to represent
+the analog input voltage level.
+
+Usually an ADC can operate in either differential or single-ended mode.
+In differential mode two signals (V+ and V-) are compared against each other
+and the resulting digital value represents the relative voltage level between
+V+ and V-. This means that if the input voltage level on V+ is lower than on
+V- the digital value is negative, which also means that in differential
+mode one bit is lost to the sign. In single-ended mode only V+ is compared
+against the reference voltage, and the resulting digital value can only be
+positive, but the full bit-range of the ADC can be used.
+
+Usually multiple resolutions are supported by the ADC, lower resolution can
+reduce the conversion time, but lose accuracy.
+
+Some ADCs has a gain stage on the input lines which can be used to increase the
+dynamic range. The default gain value is usually x1, which means that the
+conversion range is from 0V to the reference voltage.
+Applications can change the gain stage, to increase or reduce the conversion
+range.
+
+The window mode allows the conversion result to be compared to a set of
+predefined threshold values. Applications can use callback function to monitor
+if the conversion result exceeds predefined threshold value.
+
+Usually multiple reference voltages are supported by the ADC, both internal and
+external with difference voltage levels. The reference voltage have an impact
+on the accuracy, and should be selected to cover the full range of the analog
+input signal and never less than the expected maximum input voltage.
+
+There are two conversion modes supported by ADC, single shot and free running.
+In single shot mode the ADC only make one conversion when triggered by the
+application, in free running mode it continues to make conversion from it
+is triggered until it is stopped by the application. When window monitoring,
+the ADC should be set to free running mode.
+
+Features
+--------
+* Initialization and de-initialization
+* Support multiple Conversion Mode, Single or Free run
+* Start ADC Conversion
+* Read Conversion Result
+
+Applications
+------------
+* Measurement of internal sensor. E.g., MCU internal temperature sensor value.
+* Measurement of external sensor. E.g., Temperature, humidity sensor value.
+* Sampling and measurement of a signal. E.g., sinusoidal wave, square wave.
+
+Dependencies
+------------
+* ADC hardware
+
+Concurrency
+-----------
+N/A
+
+Limitations
+-----------
+N/A
+
+Knows issues and workarounds
+----------------------------
+N/A
+
diff --git a/watch-library/hal/documentation/calendar.rst b/watch-library/hal/documentation/calendar.rst
new file mode 100644
index 00000000..8a3de6e8
--- /dev/null
+++ b/watch-library/hal/documentation/calendar.rst
@@ -0,0 +1,72 @@
+===============================
+The Calendar driver (bare-bone)
+===============================
+
+The Calendar driver provides means to set and get current date and time.
+After enabling, an instance of the driver starts counting time from the base date with
+the resolution of one second. The default base date is 00:00:00 1st of January 1970.
+Only the base year of the base date can be changed via the driver API.
+
+The current date and time is kept internally in a relative form as the difference between
+current date and time and the base date and time. This means that changing the base year changes
+current date.
+
+The base date and time defines time "zero" or the earliest possible point in time that the calender driver can describe,
+this means that current time and alarms can not be set to anything earlier than this time.
+
+The Calendar driver provides alarm functionality.
+An alarm is a software trigger which fires on particular date and time with particular periodicity.
+Upon firing the given callback function is called.
+
+An alarm can be in single-shot mode, firing only once at matching time; or in repeating mode, meaning that it will
+reschedule a new alarm automatically based on repeating mode configuration.
+In single-shot mode an alarm is removed from the alarm queue before its callback is called. It allows an application to
+reuse the memory of expired alarm in the callback.
+
+An alarm can be triggered on the following events: match on second, minute, hour, day, month or year.
+Matching on second means that the alarm is triggered when the value of seconds of the current time is equal to
+the alarm's value of seconds. This means repeating alarm with match on seconds is triggered with the period of a minute.
+Matching on minute means that the calendars minute and seconds values has to match the alarms, the rest of the date-time
+value is ignored. In repeating mode this means a new alarm every hour.
+The same logic is applied to match on hour, day, month and year.
+
+Each instance of the Calendar driver supports infinite amount of software alarms, only limited by the amount of RAM available.
+
+Features
+--------
+* Initialization and de-initialization
+* Enabling and disabling
+* Date and time operations
+* Software alarms
+
+Applications
+------------
+* A source of current date and time for an embedded system.
+* Periodical functionality in low-power applications since the driver is designed to use 1Hz clock.
+* Periodical function calls in case if it is more convenient to operate with absolute time.
+
+Dependencies
+------------
+* This driver expects a counter to be increased by one every second to count date and time correctly.
+* Each instance of the driver requires separate hardware timer.
+
+Concurrency
+-----------
+The Calendar driver is an interrupt driven driver.This means that the interrupt that triggers an alarm may occur during
+the process of adding or removing an alarm via the driver's API. In such case the interrupt processing is postponed
+until the alarm adding or removing is complete.
+
+The alarm queue is not protected from the access by interrupts not used by the driver. Due to this
+it is not recommended to add or remove an alarm from such interrupts: in case if a higher priority interrupt supersedes
+the driver's interrupt, adding or removing an alarm may cause unpredictable behavior of the driver.
+
+Limitations
+-----------
+* Only years divisible by 4 are deemed a leap year, this gives a correct result between the years 1901 to 2099.
+* The driver is designed to work outside of an operating system environment, the software alarm queue is therefore processed in interrupt context which may delay execution of other interrupts.
+* If there are a lot of frequently called interrupts with the priority higher than the driver's one, it may cause delay in alarm's triggering.
+* Changing the base year or setting current date or time does not shift alarms' date and time accordingly or expires alarms.
+
+Knows issues and workarounds
+----------------------------
+Not applicable
diff --git a/watch-library/hal/documentation/ext_irq.rst b/watch-library/hal/documentation/ext_irq.rst
new file mode 100644
index 00000000..7dcdc7c5
--- /dev/null
+++ b/watch-library/hal/documentation/ext_irq.rst
@@ -0,0 +1,39 @@
+==============
+EXT IRQ driver
+==============
+
+The External Interrupt driver allows external pins to be
+configured as interrupt lines. Each interrupt line can be
+individually masked and can generate an interrupt on rising,
+falling or both edges, or on high or low levels. Some of
+external pin can also be configured to wake up the device
+from sleep modes where all clocks have been disabled.
+External pins can also generate an event.
+
+Features
+--------
+* Initialization and de-initialization
+* Enabling and disabling
+* Detect external pins interrupt
+
+Applications
+------------
+* Generate an interrupt on rising, falling or both edges,
+ or on high or low levels.
+
+Dependencies
+------------
+* GPIO hardware
+
+Concurrency
+-----------
+N/A
+
+Limitations
+-----------
+N/A
+
+Knows issues and workarounds
+----------------------------
+N/A
+
diff --git a/watch-library/hal/documentation/i2c_master_sync.rst b/watch-library/hal/documentation/i2c_master_sync.rst
new file mode 100644
index 00000000..77b4f6e9
--- /dev/null
+++ b/watch-library/hal/documentation/i2c_master_sync.rst
@@ -0,0 +1,87 @@
+=============================
+I2C Master synchronous driver
+=============================
+
+I2C (Inter-Integrated Circuit) is a two wire serial interface usually used
+for on-board low-speed bi-directional communication between controllers and
+peripherals. The master device is responsible for initiating and controlling
+all transfers on the I2C bus. Only one master device can be active on the I2C
+bus at the time, but the master role can be transferred between devices on the
+same I2C bus. I2C uses only two bidirectional open-drain lines, usually
+designated SDA (Serial Data Line) and SCL (Serial Clock Line), with pull up
+resistors.
+
+The stop condition is automatically controlled by the driver if the I/O write and
+read functions are used, but can be manually controlled by using the
+i2c_m_sync_transfer function.
+
+Often a master accesses different information in the slave by accessing
+different registers in the slave. This is done by first sending a message to
+the target slave containing the register address, followed by a repeated start
+condition (no stop condition between) ending with transferring register data.
+This scheme is supported by the i2c_m_sync_cmd_write and i2c_m_sync_cmd_read
+function, but limited to 8-bit register addresses.
+
+I2C Modes (standard mode/fastmode+/highspeed mode) can only be selected in
+Atmel Start. If the SCL frequency (baudrate) has changed run-time, make sure to
+stick within the SCL clock frequency range supported by the selected mode.
+The requested SCL clock frequency is not validated by the
+i2c_m_sync_set_baudrate function against the selected I2C mode.
+
+Features
+--------
+
+ * I2C Master support
+ * Initialization and de-initialization
+ * Enabling and disabling
+ * Run-time bus speed configuration
+ * Write and read I2C messages
+ * Slave register access functions (limited to 8-bit address)
+ * Manual or automatic stop condition generation
+ * 10- and 7- bit addressing
+ * I2C Modes supported
+ +----------------------+-------------------+
+ |* Standard/Fast mode | (SCL: 1 - 400kHz) |
+ +----------------------+-------------------+
+ |* Fastmode+ | (SCL: 1 - 1000kHz)|
+ +----------------------+-------------------+
+ |* Highspeed mode | (SCL: 1 - 3400kHz)|
+ +----------------------+-------------------+
+
+Applications
+------------
+
+* Transfer data to and from one or multiple I2C slaves like I2C connected sensors, data storage or other I2C capable peripherals
+* Data communication between micro controllers
+* Controlling displays
+
+Dependencies
+------------
+
+* I2C Master capable hardware
+
+Concurrency
+-----------
+
+N/A
+
+Limitations
+-----------
+
+General
+^^^^^^^
+
+ * System Managmenet Bus (SMBus) not supported.
+ * Power Management Bus (PMBus) not supported.
+
+Clock considerations
+^^^^^^^^^^^^^^^^^^^^
+
+The register value for the requested I2C speed is calculated and placed in the correct register, but not validated if it works correctly with the clock/prescaler settings used for the module. To validate the I2C speed setting use the formula found in the configuration file for the module. Selectable speed is automatically limited within the speed range defined by the I2C mode selected.
+
+Known issues and workarounds
+----------------------------
+
+N/A
+
+
diff --git a/watch-library/hal/documentation/pwm.rst b/watch-library/hal/documentation/pwm.rst
new file mode 100644
index 00000000..71785c63
--- /dev/null
+++ b/watch-library/hal/documentation/pwm.rst
@@ -0,0 +1,53 @@
+The PWM Driver(bare-bone)
+=========================
+
+Pulse-width modulation (PWM) is used to create an analog behavior
+digitally by controlling the amount of power transferred to the
+connected peripheral. This is achieved by controlling the high period
+(duty-cycle) of a periodic signal.
+
+User can change the period or duty cycle whenever PWM is running. The
+function pwm_set_parameters is used to configure these two parameters.
+Note these are raw register values and the parameter duty_cycle means
+the period of first half during one cycle, which should be not beyond
+total period value.
+
+In addition, user can also get multi PWM channels output from different
+peripherals at the same time, which is implemented more flexible by the
+function pointers.
+
+Features
+--------
+
+* Initialization/de-initialization
+* Enabling/disabling
+* Run-time control of PWM duty-cycle and period
+* Notifications about errors and one PWM cycle is done
+
+Applications
+------------
+
+Motor control, ballast, LED, H-bridge, power converters, and
+other types of power control applications.
+
+Dependencies
+------------
+
+The peripheral which can perform waveform generation like frequency
+generation and pulse-width modulation, such as Timer/Counter.
+
+Concurrency
+-----------
+
+N/A
+
+Limitations
+-----------
+
+The current driver doesn't support the features like recoverable,
+non-recoverable faults, dithering, dead-time insertion.
+
+Known issues and workarounds
+----------------------------
+
+N/A
diff --git a/watch-library/hal/documentation/slcd_sync.rst b/watch-library/hal/documentation/slcd_sync.rst
new file mode 100644
index 00000000..e18aa9dd
--- /dev/null
+++ b/watch-library/hal/documentation/slcd_sync.rst
@@ -0,0 +1,82 @@
+
+SLCD Synchronous driver
+=======================
+
+An LCD display is made of several segments (pixels or complete symbols) which
+can be block light or let light through. In each segment is one electrode
+connected to the common terminal (COM pin) and one is connected to the segment
+terminal (SEG pin). When a voltage above a certain threshold level is applied
+across the liquid crystal, it will change orientation and either let light
+through or block it.
+
+The driver supports segment on/off/blink, animation and character display.
+
+Each segment has a unique int32 segment id which is used by the driver. The id is
+combined by common number(COM) and segment number(SEG), the COM and SEG start from 0.
+The unique segment id is calculated by this formula: (COM << 16) | SEG
+For example a 8(coms)*8(segments)SLCD, the unique segment id for segment should be
+
+ +-----+-----+---------+
+ | COM | SEG | ID |
+ +-----+-----+---------+
+ | 0 | 0 | 0x00000 |
+ +-----+-----+---------+
+ | 1 | 0 | 0x10000 |
+ +-----+-----+---------+
+ | 7 | 7 | 0x70007 |
+ +-----+-----+---------+
+
+Segment ID can be calculated using the pre-defined macro SLCD_SEGID(com, seg).
+
+For character display, the "segment character mapping table" and "character mapping table"
+should be setup in configuration. The driver have no API to setup/change those
+mapping setting.
+There are two pre-defined "segment character mapping table" in this driver, 7 segments
+and 14 segments. The 7 segment character mapping can display 0-9 and a-f, the 14
+segments character mapping can display 0-9, A-Z and some special ASCII, for more
+details please refer to hpl_slcd_cm_7_seg_mapping.h and hpl_slcd_cm_14_seg_mapping.h.
+Application can also adjust this mapping table in the configuration header file,
+to add more character mapping or remove some unused character.
+
+The "character mapping" is used to setup each character in SLCD display screen.
+The driver supports multiple character mapping, the max number varies on different
+MCU/MPU. For example if an LCD display screen has five "7-segments character" and
+eight "14-segments character", and the MCU support max 44 characters setting, then
+the 13 character should be setup in configuration. Application can select any
+position from those 44 characters setting to save those 13 character.
+The index of character setting will be used in the driver API. For example:
+five "7-segments character" setting to 0 to 4 and eight "14-segments character" setting
+to 10 to 17. Then the application can use index from 0 to 4 to display the
+"7-segments character" and use index from 10 to 14 to display "14-segments character".
+
+Features
+--------
+
+* Initialization and de-initialization
+* Enabling and Disabling
+* Switching segment on/off
+* Set segment blink
+* Autonomous animation
+* Character display
+
+Applications
+------------
+* SLCD display control, segment on/off/blink
+* Play battery animation, running wheel, wifi signal, etc.
+* Display Time Clock by 7 segments character mapping
+* Display ASCII character by 14 segments character mapping
+
+Dependencies
+------------
+* SLCD capable hardware
+
+Concurrency
+-----------
+N/A
+
+Limitations
+-----------
+
+Known issues and workarounds
+----------------------------
+N/A
diff --git a/watch-library/hal/include/hal_adc_sync.h b/watch-library/hal/include/hal_adc_sync.h
new file mode 100644
index 00000000..1b66e3df
--- /dev/null
+++ b/watch-library/hal/include/hal_adc_sync.h
@@ -0,0 +1,277 @@
+/**
+ * \file
+ *
+ * \brief ADC functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HAL_ADC_SYNC_H_INCLUDED
+#define _HAL_ADC_SYNC_H_INCLUDED
+
+#include <hpl_adc_sync.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_adc_sync
+ *
+ * @{
+ */
+
+/**
+ * \brief ADC descriptor
+ *
+ * The ADC descriptor forward declaration.
+ */
+struct adc_sync_descriptor;
+
+/**
+ * \brief ADC descriptor
+ */
+struct adc_sync_descriptor {
+ /** ADC device */
+ struct _adc_sync_device device;
+};
+
+/**
+ * \brief Initialize ADC
+ *
+ * This function initializes the given ADC descriptor.
+ * It checks if the given hardware is not initialized and if the given hardware
+ * is permitted to be initialized.
+ *
+ * \param[out] descr An ADC descriptor to initialize
+ * \param[in] hw The pointer to hardware instance
+ * \param[in] func The pointer to a set of functions pointers
+ *
+ * \return Initialization status.
+ */
+int32_t adc_sync_init(struct adc_sync_descriptor *const descr, void *const hw, void *const func);
+
+/**
+ * \brief Deinitialize ADC
+ *
+ * This function deinitializes the given ADC descriptor.
+ * It checks if the given hardware is initialized and if the given hardware is
+ * permitted to be deinitialized.
+ *
+ * \param[in] descr An ADC descriptor to deinitialize
+ *
+ * \return De-initialization status.
+ */
+int32_t adc_sync_deinit(struct adc_sync_descriptor *const descr);
+
+/**
+ * \brief Enable ADC
+ *
+ * Use this function to set the ADC peripheral to enabled state.
+ *
+ * \param[in] descr Pointer to the ADC descriptor
+ * \param[in] channel Channel number
+ *
+ * \return Operation status
+ *
+ */
+int32_t adc_sync_enable_channel(struct adc_sync_descriptor *const descr, const uint8_t channel);
+
+/**
+ * \brief Disable ADC
+ *
+ * Use this function to set the ADC peripheral to disabled state.
+ *
+ * \param[in] descr Pointer to the ADC descriptor
+ * \param[in] channel Channel number
+ *
+ * \return Operation status
+ *
+ */
+int32_t adc_sync_disable_channel(struct adc_sync_descriptor *const descr, const uint8_t channel);
+
+/**
+ * \brief Read data from ADC
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] channel Channel number
+ * \param[in] buf A buffer to read data to
+ * \param[in] length The size of a buffer
+ *
+ * \return The number of bytes read.
+ */
+int32_t adc_sync_read_channel(struct adc_sync_descriptor *const descr, const uint8_t channel, uint8_t *const buffer,
+ const uint16_t length);
+
+/**
+ * \brief Set ADC reference source
+ *
+ * This function sets ADC reference source.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] reference A reference source to set
+ *
+ * \return Status of the ADC reference source setting.
+ */
+int32_t adc_sync_set_reference(struct adc_sync_descriptor *const descr, const adc_reference_t reference);
+
+/**
+ * \brief Set ADC resolution
+ *
+ * This function sets ADC resolution.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] resolution A resolution to set
+ *
+ * \return Status of the ADC resolution setting.
+ */
+int32_t adc_sync_set_resolution(struct adc_sync_descriptor *const descr, const adc_resolution_t resolution);
+
+/**
+ * \brief Set ADC input source of a channel
+ *
+ * This function sets ADC positive and negative input sources.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] pos_input A positive input source to set
+ * \param[in] neg_input A negative input source to set
+ * \param[in] channel Channel number
+ *
+ * \return Status of the ADC channels setting.
+ */
+int32_t adc_sync_set_inputs(struct adc_sync_descriptor *const descr, const adc_pos_input_t pos_input,
+ const adc_neg_input_t neg_input, const uint8_t channel);
+
+/**
+ * \brief Set ADC conversion mode
+ *
+ * This function sets ADC conversion mode.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] mode A conversion mode to set
+ *
+ * \return Status of the ADC conversion mode setting.
+ */
+int32_t adc_sync_set_conversion_mode(struct adc_sync_descriptor *const descr, const enum adc_conversion_mode mode);
+
+/**
+ * \brief Set ADC differential mode
+ *
+ * This function sets ADC differential mode.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] channel Channel number
+ * \param[in] mode A differential mode to set
+ *
+ * \return Status of the ADC differential mode setting.
+ */
+int32_t adc_sync_set_channel_differential_mode(struct adc_sync_descriptor *const descr, const uint8_t channel,
+ const enum adc_differential_mode mode);
+
+/**
+ * \brief Set ADC channel gain
+ *
+ * This function sets ADC channel gain.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] channel Channel number
+ * \param[in] gain A gain to set
+ *
+ * \return Status of the ADC gain setting.
+ */
+int32_t adc_sync_set_channel_gain(struct adc_sync_descriptor *const descr, const uint8_t channel,
+ const adc_gain_t gain);
+
+/**
+ * \brief Set ADC window mode
+ *
+ * This function sets ADC window mode.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] mode A window mode to set
+ *
+ * \return Status of the ADC window mode setting.
+ */
+int32_t adc_sync_set_window_mode(struct adc_sync_descriptor *const descr, const adc_window_mode_t mode);
+
+/**
+ * \brief Set ADC thresholds
+ *
+ * This function sets ADC positive and negative thresholds.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] low_threshold A lower thresholds to set
+ * \param[in] up_threshold An upper thresholds to set
+ *
+ * \return Status of the ADC thresholds setting.
+ */
+int32_t adc_sync_set_thresholds(struct adc_sync_descriptor *const descr, const adc_threshold_t low_threshold,
+ const adc_threshold_t up_threshold);
+
+/**
+ * \brief Retrieve threshold state
+ *
+ * This function retrieves ADC threshold state.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[out] state The threshold state
+ *
+ * \return The state of ADC thresholds state retrieving.
+ */
+int32_t adc_sync_get_threshold_state(const struct adc_sync_descriptor *const descr,
+ adc_threshold_status_t *const state);
+
+/**
+ * \brief Check if conversion is complete
+ *
+ * This function checks if the ADC has finished the conversion.
+ *
+ * \param[in] descr The pointer to the ADC descriptor
+ * \param[in] channel Channel number
+ *
+ * \return The status of ADC conversion completion checking.
+ * \retval 1 The conversion is complete
+ * \retval 0 The conversion is not complete
+ */
+int32_t adc_sync_is_channel_conversion_complete(const struct adc_sync_descriptor *const descr, const uint8_t channel);
+
+/**
+ * \brief Retrieve the current driver version
+ *
+ * \return Current driver version.
+ */
+uint32_t adc_sync_get_version(void);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#include <hpl_missing_features.h>
+
+#endif /* _HAL_ADC_SYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hal_atomic.h b/watch-library/hal/include/hal_atomic.h
new file mode 100644
index 00000000..82151fc5
--- /dev/null
+++ b/watch-library/hal/include/hal_atomic.h
@@ -0,0 +1,120 @@
+/**
+ * \file
+ *
+ * \brief Critical sections related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HAL_ATOMIC_H_INCLUDED
+#define _HAL_ATOMIC_H_INCLUDED
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_helper_atomic
+ *
+ *@{
+ */
+
+/**
+ * \brief Type for the register holding global interrupt enable flag
+ */
+typedef uint32_t hal_atomic_t;
+
+/**
+ * \brief Helper macro for entering critical sections
+ *
+ * This macro is recommended to be used instead of a direct call
+ * hal_enterCritical() function to enter critical
+ * sections. No semicolon is required after the macro.
+ *
+ * \section atomic_usage Usage Example
+ * \code
+ * CRITICAL_SECTION_ENTER()
+ * Critical code
+ * CRITICAL_SECTION_LEAVE()
+ * \endcode
+ */
+#define CRITICAL_SECTION_ENTER() \
+ { \
+ volatile hal_atomic_t __atomic; \
+ atomic_enter_critical(&__atomic);
+
+/**
+ * \brief Helper macro for leaving critical sections
+ *
+ * This macro is recommended to be used instead of a direct call
+ * hal_leaveCritical() function to leave critical
+ * sections. No semicolon is required after the macro.
+ */
+#define CRITICAL_SECTION_LEAVE() \
+ atomic_leave_critical(&__atomic); \
+ }
+
+/**
+ * \brief Disable interrupts, enter critical section
+ *
+ * Disables global interrupts. Supports nested critical sections,
+ * so that global interrupts are only re-enabled
+ * upon leaving the outermost nested critical section.
+ *
+ * \param[out] atomic The pointer to a variable to store the value of global
+ * interrupt enable flag
+ */
+void atomic_enter_critical(hal_atomic_t volatile *atomic);
+
+/**
+ * \brief Exit atomic section
+ *
+ * Enables global interrupts. Supports nested critical sections,
+ * so that global interrupts are only re-enabled
+ * upon leaving the outermost nested critical section.
+ *
+ * \param[in] atomic The pointer to a variable, which stores the latest stored
+ * value of the global interrupt enable flag
+ */
+void atomic_leave_critical(hal_atomic_t volatile *atomic);
+
+/**
+ * \brief Retrieve the current driver version
+ *
+ * \return Current driver version.
+ */
+uint32_t atomic_get_version(void);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _HAL_ATOMIC_H_INCLUDED */
diff --git a/watch-library/hal/include/hal_calendar.h b/watch-library/hal/include/hal_calendar.h
new file mode 100644
index 00000000..26949a57
--- /dev/null
+++ b/watch-library/hal/include/hal_calendar.h
@@ -0,0 +1,159 @@
+/**
+ * \file
+ *
+ * \brief Generic CALENDAR functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HAL_CALENDER_H_INCLUDED
+#define _HAL_CALENDER_H_INCLUDED
+
+#include "hpl_calendar.h"
+#include <utils_list.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_calendar_async
+ *
+ *@{
+ */
+
+/** \brief Prototype of callback on alarm match
+ * \param calendar Pointer to the HAL Calendar instance.
+ */
+typedef void (*calendar_cb_alarm_t)(struct calendar_descriptor *const calendar);
+
+/** \brief Struct for alarm time
+ */
+struct calendar_alarm {
+ struct list_element elem;
+ struct _calendar_alarm cal_alarm;
+ calendar_cb_alarm_t callback;
+};
+
+/** \brief Initialize the Calendar HAL instance and hardware
+ *
+ * \param calendar Pointer to the HAL Calendar instance.
+ * \param hw Pointer to the hardware instance.
+ * \return Operation status of init
+ * \retval 0 Completed successfully.
+ */
+int32_t calendar_init(struct calendar_descriptor *const calendar, const void *hw);
+
+/** \brief Reset the Calendar HAL instance and hardware
+ *
+ * Reset Calendar instance to hardware defaults.
+ *
+ * \param calendar Pointer to the HAL Calendar instance.
+ * \return Operation status of reset.
+ * \retval 0 Completed successfully.
+ */
+int32_t calendar_deinit(struct calendar_descriptor *const calendar);
+
+/** \brief Enable the Calendar HAL instance and hardware
+ *
+ * \param calendar Pointer to the HAL Calendar instance.
+ * \return Operation status of init
+ * \retval 0 Completed successfully.
+ */
+int32_t calendar_enable(struct calendar_descriptor *const calendar);
+
+/** \brief Disable the Calendar HAL instance and hardware
+ *
+ * Disable Calendar instance to hardware defaults.
+ *
+ * \param calendar Pointer to the HAL Calendar instance.
+ * \return Operation status of reset.
+ * \retval 0 Completed successfully.
+ */
+int32_t calendar_disable(struct calendar_descriptor *const calendar);
+
+/** \brief Configure the base year for calendar HAL instance and hardware
+ *
+ * \param calendar Pointer to the HAL Calendar instance.
+ * \param p_base_year The desired base year.
+ * \retval 0 Completed successfully.
+ */
+int32_t calendar_set_baseyear(struct calendar_descriptor *const calendar, const uint32_t p_base_year);
+
+/** \brief Configure the time for calendar HAL instance and hardware
+ *
+ * \param calendar Pointer to the HAL Calendar instance.
+ * \param p_calendar_time Pointer to the time configuration.
+ * \retval 0 Completed successfully.
+ */
+int32_t calendar_set_time(struct calendar_descriptor *const calendar, struct calendar_time *const p_calendar_time);
+
+/** \brief Configure the date for calendar HAL instance and hardware
+ *
+ * \param calendar Pointer to the HAL Calendar instance.
+ * \param p_calendar_date Pointer to the date configuration.
+ * \return Operation status of time set.
+ * \retval 0 Completed successfully.
+ */
+int32_t calendar_set_date(struct calendar_descriptor *const calendar, struct calendar_date *const p_calendar_date);
+
+/** \brief Get the time for calendar HAL instance and hardware
+ *
+ * \param calendar Pointer to the HAL Calendar instance.
+ * \param date_time Pointer to the value that will be filled with the current time.
+ * \return Operation status of time retrieve.
+ * \retval 0 Completed successfully.
+ */
+int32_t calendar_get_date_time(struct calendar_descriptor *const calendar, struct calendar_date_time *const date_time);
+
+/** \brief Config the alarm time for calendar HAL instance and hardware
+ *
+ * Set the alarm time to calendar instance. If the callback is NULL, remove
+ * the alarm if the alarm is already added, otherwise, ignore the alarm.
+ *
+ * \param calendar Pointer to the HAL Calendar instance.
+ * \param alarm Pointer to the configuration.
+ * \param callback Pointer to the callback function.
+ * \return Operation status of alarm time set.
+ * \retval 0 Completed successfully.
+ */
+int32_t calendar_set_alarm(struct calendar_descriptor *const calendar, struct calendar_alarm *const alarm,
+ calendar_cb_alarm_t callback);
+
+/** \brief Retrieve the current driver version
+ * \return Current driver version.
+ */
+uint32_t calendar_get_version(void);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _HAL_CALENDER_H_INCLUDED */
diff --git a/watch-library/hal/include/hal_delay.h b/watch-library/hal/include/hal_delay.h
new file mode 100644
index 00000000..9d4aa5c1
--- /dev/null
+++ b/watch-library/hal/include/hal_delay.h
@@ -0,0 +1,89 @@
+/**
+ * \file
+ *
+ * \brief HAL delay related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include <hpl_irq.h>
+#include <hpl_reset.h>
+#include <hpl_sleep.h>
+
+#ifndef _HAL_DELAY_H_INCLUDED
+#define _HAL_DELAY_H_INCLUDED
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_delay Delay Driver
+ *
+ *@{
+ */
+
+/**
+ * \brief Initialize Delay driver
+ *
+ * \param[in] hw The pointer to hardware instance
+ */
+void delay_init(void *const hw);
+
+/**
+ * \brief Perform delay in us
+ *
+ * This function performs delay for the given amount of microseconds.
+ *
+ * \param[in] us The amount delay in us
+ */
+void delay_us(const uint16_t us);
+
+/**
+ * \brief Perform delay in ms
+ *
+ * This function performs delay for the given amount of milliseconds.
+ *
+ * \param[in] ms The amount delay in ms
+ */
+void delay_ms(const uint16_t ms);
+
+/**
+ * \brief Retrieve the current driver version
+ *
+ * \return Current driver version.
+ */
+uint32_t delay_get_version(void);
+
+/**@}*/
+#ifdef __cplusplus
+}
+#endif
+#endif /* _HAL_DELAY_H_INCLUDED */
diff --git a/watch-library/hal/include/hal_ext_irq.h b/watch-library/hal/include/hal_ext_irq.h
new file mode 100644
index 00000000..a7c26005
--- /dev/null
+++ b/watch-library/hal/include/hal_ext_irq.h
@@ -0,0 +1,118 @@
+/**
+ * \file
+ *
+ * \brief External interrupt functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HAL_EXT_IRQ_H_INCLUDED
+#define _HAL_EXT_IRQ_H_INCLUDED
+
+#include <hpl_ext_irq.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_ext_irq
+ *
+ * @{
+ */
+
+/**
+ * \brief External IRQ callback type
+ */
+typedef void (*ext_irq_cb_t)(void);
+
+/**
+ * \brief Initialize external IRQ component, if any
+ *
+ * \return Initialization status.
+ * \retval -1 External IRQ module is already initialized
+ * \retval 0 The initialization is completed successfully
+ */
+int32_t ext_irq_init(void);
+
+/**
+ * \brief Deinitialize external IRQ, if any
+ *
+ * \return De-initialization status.
+ * \retval -1 External IRQ module is already deinitialized
+ * \retval 0 The de-initialization is completed successfully
+ */
+int32_t ext_irq_deinit(void);
+
+/**
+ * \brief Register callback for the given external interrupt
+ *
+ * \param[in] pin Pin to enable external IRQ on
+ * \param[in] cb Callback function
+ *
+ * \return Registration status.
+ * \retval -1 Passed parameters were invalid
+ * \retval 0 The callback registration is completed successfully
+ */
+int32_t ext_irq_register(const uint32_t pin, ext_irq_cb_t cb);
+
+/**
+ * \brief Enable external IRQ
+ *
+ * \param[in] pin Pin to enable external IRQ on
+ *
+ * \return Enabling status.
+ * \retval -1 Passed parameters were invalid
+ * \retval 0 The enabling is completed successfully
+ */
+int32_t ext_irq_enable(const uint32_t pin);
+
+/**
+ * \brief Disable external IRQ
+ *
+ * \param[in] pin Pin to enable external IRQ on
+ *
+ * \return Disabling status.
+ * \retval -1 Passed parameters were invalid
+ * \retval 0 The disabling is completed successfully
+ */
+int32_t ext_irq_disable(const uint32_t pin);
+
+/**
+ * \brief Retrieve the current driver version
+ *
+ * \return Current driver version.
+ */
+uint32_t ext_irq_get_version(void);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _HAL_EXT_IRQ_H_INCLUDED */
diff --git a/watch-library/hal/include/hal_gpio.h b/watch-library/hal/include/hal_gpio.h
new file mode 100644
index 00000000..fbfa2d4a
--- /dev/null
+++ b/watch-library/hal/include/hal_gpio.h
@@ -0,0 +1,201 @@
+/**
+ * \file
+ *
+ * \brief Port
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ */
+#ifndef _HAL_GPIO_INCLUDED_
+#define _HAL_GPIO_INCLUDED_
+
+#include <hpl_gpio.h>
+#include <utils_assert.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Set gpio pull mode
+ *
+ * Set pin pull mode, non existing pull modes throws an fatal assert
+ *
+ * \param[in] pin The pin number for device
+ * \param[in] pull_mode GPIO_PULL_DOWN = Pull pin low with internal resistor
+ * GPIO_PULL_UP = Pull pin high with internal resistor
+ * GPIO_PULL_OFF = Disable pin pull mode
+ */
+static inline void gpio_set_pin_pull_mode(const uint8_t pin, const enum gpio_pull_mode pull_mode)
+{
+ _gpio_set_pin_pull_mode((enum gpio_port)GPIO_PORT(pin), pin & 0x1F, pull_mode);
+}
+
+/**
+ * \brief Set pin function
+ *
+ * Select which function a pin will be used for
+ *
+ * \param[in] pin The pin number for device
+ * \param[in] function The pin function is given by a 32-bit wide bitfield
+ * found in the header files for the device
+ *
+ */
+static inline void gpio_set_pin_function(const uint32_t pin, uint32_t function)
+{
+ _gpio_set_pin_function(pin, function);
+}
+
+/**
+ * \brief Set port data direction
+ *
+ * Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * \param[in] port Ports are grouped into groups of maximum 32 pins,
+ * GPIO_PORTA = group 0, GPIO_PORTB = group 1, etc
+ * \param[in] mask Bit mask where 1 means apply direction setting to the
+ * corresponding pin
+ * \param[in] direction GPIO_DIRECTION_IN = Data direction in
+ * GPIO_DIRECTION_OUT = Data direction out
+ * GPIO_DIRECTION_OFF = Disables the pin
+ * (low power state)
+ */
+static inline void gpio_set_port_direction(const enum gpio_port port, const uint32_t mask,
+ const enum gpio_direction direction)
+{
+ _gpio_set_direction(port, mask, direction);
+}
+
+/**
+ * \brief Set gpio data direction
+ *
+ * Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * \param[in] pin The pin number for device
+ * \param[in] direction GPIO_DIRECTION_IN = Data direction in
+ * GPIO_DIRECTION_OUT = Data direction out
+ * GPIO_DIRECTION_OFF = Disables the pin
+ * (low power state)
+ */
+static inline void gpio_set_pin_direction(const uint8_t pin, const enum gpio_direction direction)
+{
+ _gpio_set_direction((enum gpio_port)GPIO_PORT(pin), 1U << GPIO_PIN(pin), direction);
+}
+
+/**
+ * \brief Set port level
+ *
+ * Sets output level on the pins defined by the bit mask
+ *
+ * \param[in] port Ports are grouped into groups of maximum 32 pins,
+ * GPIO_PORTA = group 0, GPIO_PORTB = group 1, etc
+ * \param[in] mask Bit mask where 1 means apply port level to the corresponding
+ * pin
+ * \param[in] level true = Pin levels set to "high" state
+ * false = Pin levels set to "low" state
+ */
+static inline void gpio_set_port_level(const enum gpio_port port, const uint32_t mask, const bool level)
+{
+ _gpio_set_level(port, mask, level);
+}
+
+/**
+ * \brief Set gpio level
+ *
+ * Sets output level on a pin
+ *
+ * \param[in] pin The pin number for device
+ * \param[in] level true = Pin level set to "high" state
+ * false = Pin level set to "low" state
+ */
+static inline void gpio_set_pin_level(const uint8_t pin, const bool level)
+{
+ _gpio_set_level((enum gpio_port)GPIO_PORT(pin), 1U << GPIO_PIN(pin), level);
+}
+
+/**
+ * \brief Toggle out level on pins
+ *
+ * Toggle the pin levels on pins defined by bit mask
+ *
+ * \param[in] port Ports are grouped into groups of maximum 32 pins,
+ * GPIO_PORTA = group 0, GPIO_PORTB = group 1, etc
+ * \param[in] mask Bit mask where 1 means toggle pin level to the corresponding
+ * pin
+ */
+static inline void gpio_toggle_port_level(const enum gpio_port port, const uint32_t mask)
+{
+ _gpio_toggle_level(port, mask);
+}
+
+/**
+ * \brief Toggle output level on pin
+ *
+ * Toggle the pin levels on pins defined by bit mask
+ *
+ * \param[in] pin The pin number for device
+ */
+static inline void gpio_toggle_pin_level(const uint8_t pin)
+{
+ _gpio_toggle_level((enum gpio_port)GPIO_PORT(pin), 1U << GPIO_PIN(pin));
+}
+
+/**
+ * \brief Get input level on pins
+ *
+ * Read the input level on pins connected to a port
+ *
+ * \param[in] port Ports are grouped into groups of maximum 32 pins,
+ * GPIO_PORTA = group 0, GPIO_PORTB = group 1, etc
+ */
+static inline uint32_t gpio_get_port_level(const enum gpio_port port)
+{
+ return _gpio_get_level(port);
+}
+
+/**
+ * \brief Get level on pin
+ *
+ * Reads the level on pins connected to a port
+ *
+ * \param[in] pin The pin number for device
+ */
+static inline bool gpio_get_pin_level(const uint8_t pin)
+{
+ return (bool)(_gpio_get_level((enum gpio_port)GPIO_PORT(pin)) & (0x01U << GPIO_PIN(pin)));
+}
+/**
+ * \brief Get current driver version
+ */
+uint32_t gpio_get_version(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/watch-library/hal/include/hal_i2c_m_sync.h b/watch-library/hal/include/hal_i2c_m_sync.h
new file mode 100644
index 00000000..24afd639
--- /dev/null
+++ b/watch-library/hal/include/hal_i2c_m_sync.h
@@ -0,0 +1,244 @@
+/**
+ * \file
+ *
+ * \brief Sync I2C Hardware Abstraction Layer(HAL) declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HAL_I2C_M_SYNC_H_INCLUDED
+#define _HAL_I2C_M_SYNC_H_INCLUDED
+
+#include <hpl_i2c_m_sync.h>
+#include <hal_io.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_i2c_master_sync
+ *
+ * @{
+ */
+
+#define I2C_M_MAX_RETRY 1
+
+/**
+ * \brief I2C descriptor structure, embed i2c_device & i2c_interface
+ */
+struct i2c_m_sync_desc {
+ struct _i2c_m_sync_device device;
+ struct io_descriptor io;
+ uint16_t slave_addr;
+};
+
+/**
+ * \brief Initialize synchronous I2C interface
+ *
+ * This function initializes the given I/O descriptor to be used as a
+ * synchronous I2C interface descriptor.
+ * It checks if the given hardware is not initialized and if the given hardware
+ * is permitted to be initialized.
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ * \param[in] hw The pointer to hardware instance
+ *
+ * \return Initialization status.
+ * \retval -1 The passed parameters were invalid or the interface is already initialized
+ * \retval 0 The initialization is completed successfully
+ */
+int32_t i2c_m_sync_init(struct i2c_m_sync_desc *i2c, void *hw);
+
+/**
+ * \brief Deinitialize I2C interface
+ *
+ * This function deinitializes the given I/O descriptor.
+ * It checks if the given hardware is initialized and if the given hardware is permitted to be deinitialized.
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ *
+ * \return Uninitialization status.
+ * \retval -1 The passed parameters were invalid or the interface is already deinitialized
+ * \retval 0 The de-initialization is completed successfully
+ */
+int32_t i2c_m_sync_deinit(struct i2c_m_sync_desc *i2c);
+
+/**
+ * \brief Set the slave device address
+ *
+ * This function sets the next transfer target slave I2C device address.
+ * It takes no effect to any already started access.
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ * \param[in] addr The slave address to access
+ * \param[in] addr_len The slave address length, can be I2C_M_TEN or I2C_M_SEVEN
+ *
+ * \return Masked slave address. The mask is a maximum 10-bit address, and 10th
+ * bit is set if a 10-bit address is used
+ */
+int32_t i2c_m_sync_set_slaveaddr(struct i2c_m_sync_desc *i2c, int16_t addr, int32_t addr_len);
+
+/**
+ * \brief Set baudrate
+ *
+ * This function sets the I2C device to the specified baudrate.
+ * It only takes effect when the hardware is disabled.
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ * \param[in] clkrate Unused parameter. Should always be 0
+ * \param[in] baudrate The baudrate value set to master
+ *
+ * \return Whether successfully set the baudrate
+ * \retval -1 The passed parameters were invalid or the device is already enabled
+ * \retval 0 The baudrate set is completed successfully
+ */
+int32_t i2c_m_sync_set_baudrate(struct i2c_m_sync_desc *i2c, uint32_t clkrate, uint32_t baudrate);
+
+/**
+ * \brief Sync version of enable hardware
+ *
+ * This function enables the I2C device, and then waits for this enabling operation to be done
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ *
+ * \return Whether successfully enable the device
+ * \retval -1 The passed parameters were invalid or the device enable failed
+ * \retval 0 The hardware enabling is completed successfully
+ */
+int32_t i2c_m_sync_enable(struct i2c_m_sync_desc *i2c);
+
+/**
+ * \brief Sync version of disable hardware
+ *
+ * This function disables the I2C device and then waits for this disabling operation to be done
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ *
+ * \return Whether successfully disable the device
+ * \retval -1 The passed parameters were invalid or the device disable failed
+ * \retval 0 The hardware disabling is completed successfully
+ */
+int32_t i2c_m_sync_disable(struct i2c_m_sync_desc *i2c);
+
+/**
+ * \brief Sync version of write command to I2C slave
+ *
+ * This function will write the value to a specified register in the I2C slave device and
+ * then wait for this operation to be done.
+ *
+ * The sequence of this routine is
+ * sta->address(write)->ack->reg address->ack->resta->address(write)->ack->reg value->nack->stt
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ * \param[in] reg The internal address/register of the I2C slave device
+ * \param[in] buffer The buffer holding data to write to the I2C slave device
+ * \param[in] length The length (in bytes) to write to the I2C slave device
+ *
+ * \return Whether successfully write to the device
+ * \retval <0 The passed parameters were invalid or write fail
+ * \retval 0 Writing to register is completed successfully
+ */
+int32_t i2c_m_sync_cmd_write(struct i2c_m_sync_desc *i2c, uint8_t reg, uint8_t *buffer, uint8_t length);
+
+/**
+ * \brief Sync version of read register value from I2C slave
+ *
+ * This function will read a byte value from a specified register in the I2C slave device and
+ * then wait for this operation to be done.
+ *
+ * The sequence of this routine is
+ * sta->address(write)->ack->reg address->ack->resta->address(read)->ack->reg value->nack->stt
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ * \param[in] reg The internal address/register of the I2C slave device
+ * \param[in] buffer The buffer to hold the read data from the I2C slave device
+ * \param[in] length The length (in bytes) to read from the I2C slave device
+ *
+ * \return Whether successfully read from the device
+ * \retval <0 The passed parameters were invalid or read fail
+ * \retval 0 Reading from register is completed successfully
+ */
+int32_t i2c_m_sync_cmd_read(struct i2c_m_sync_desc *i2c, uint8_t reg, uint8_t *buffer, uint8_t length);
+
+/**
+ * \brief Sync version of transfer message to/from the I2C slave
+ *
+ * This function will transfer a message between the I2C slave and the master. This function will wait for the operation
+ * to be done.
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ * \param[in] msg An i2c_m_msg struct
+ *
+ * \return The status of the operation
+ * \retval 0 Operation completed successfully
+ * \retval <0 Operation failed
+ */
+int32_t i2c_m_sync_transfer(struct i2c_m_sync_desc *const i2c, struct _i2c_m_msg *msg);
+
+/**
+ * \brief Sync version of send stop condition on the i2c bus
+ *
+ * This function will create a stop condition on the i2c bus to release the bus
+ *
+ * \param[in] i2c An I2C descriptor, which is used to communicate through I2C
+ *
+ * \return The status of the operation
+ * \retval 0 Operation completed successfully
+ * \retval <0 Operation failed
+ */
+int32_t i2c_m_sync_send_stop(struct i2c_m_sync_desc *const i2c);
+
+/**
+ * \brief Return I/O descriptor for this I2C instance
+ *
+ * This function will return a I/O instance for this I2C driver instance
+ *
+ * \param[in] i2c_m_sync_desc An I2C descriptor, which is used to communicate through I2C
+ * \param[in] io_descriptor A pointer to an I/O descriptor pointer type
+ *
+ * \return Error code
+ * \retval 0 No error detected
+ * \retval <0 Error code
+ */
+int32_t i2c_m_sync_get_io_descriptor(struct i2c_m_sync_desc *const i2c, struct io_descriptor **io);
+
+/**
+ * \brief Retrieve the current driver version
+ *
+ * \return Current driver version.
+ */
+uint32_t i2c_m_sync_get_version(void);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/watch-library/hal/include/hal_init.h b/watch-library/hal/include/hal_init.h
new file mode 100644
index 00000000..d7bc6fe2
--- /dev/null
+++ b/watch-library/hal/include/hal_init.h
@@ -0,0 +1,72 @@
+/**
+ * \file
+ *
+ * \brief HAL initialization related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HAL_INIT_H_INCLUDED
+#define _HAL_INIT_H_INCLUDED
+
+#include <hpl_init.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_helper_init Init Driver
+ *
+ *@{
+ */
+
+/**
+ * \brief Initialize the hardware abstraction layer
+ *
+ * This function calls the various initialization functions.
+ * Currently the following initialization functions are supported:
+ * - System clock initialization
+ */
+static inline void init_mcu(void)
+{
+ _init_chip();
+}
+
+/**
+ * \brief Retrieve the current driver version
+ *
+ * \return Current driver version.
+ */
+uint32_t init_get_version(void);
+
+/**@}*/
+#ifdef __cplusplus
+}
+#endif
+#endif /* _HAL_INIT_H_INCLUDED */
diff --git a/watch-library/hal/include/hal_io.h b/watch-library/hal/include/hal_io.h
new file mode 100644
index 00000000..f50401d7
--- /dev/null
+++ b/watch-library/hal/include/hal_io.h
@@ -0,0 +1,110 @@
+/**
+ * \file
+ *
+ * \brief I/O related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HAL_IO_INCLUDED
+#define _HAL_IO_INCLUDED
+
+/**
+ * \addtogroup doc_driver_hal_helper_io I/O Driver
+ *
+ *@{
+ */
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief I/O descriptor
+ *
+ * The I/O descriptor forward declaration.
+ */
+struct io_descriptor;
+
+/**
+ * \brief I/O write function pointer type
+ */
+typedef int32_t (*io_write_t)(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length);
+
+/**
+ * \brief I/O read function pointer type
+ */
+typedef int32_t (*io_read_t)(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length);
+
+/**
+ * \brief I/O descriptor
+ */
+struct io_descriptor {
+ io_write_t write; /*! The write function pointer. */
+ io_read_t read; /*! The read function pointer. */
+};
+
+/**
+ * \brief I/O write interface
+ *
+ * This function writes up to \p length of bytes to a given I/O descriptor.
+ * It returns the number of bytes actually write.
+ *
+ * \param[in] descr An I/O descriptor to write
+ * \param[in] buf The buffer pointer to story the write data
+ * \param[in] length The number of bytes to write
+ *
+ * \return The number of bytes written
+ */
+int32_t io_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length);
+
+/**
+ * \brief I/O read interface
+ *
+ * This function reads up to \p length bytes from a given I/O descriptor, and
+ * stores it in the buffer pointed to by \p buf. It returns the number of bytes
+ * actually read.
+ *
+ * \param[in] descr An I/O descriptor to read
+ * \param[in] buf The buffer pointer to story the read data
+ * \param[in] length The number of bytes to read
+ *
+ * \return The number of bytes actually read. This number can be less than the
+ * requested length. E.g., in a driver that uses ring buffer for
+ * reception, it may depend on the availability of data in the
+ * ring buffer.
+ */
+int32_t io_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length);
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HAL_IO_INCLUDED */
diff --git a/watch-library/hal/include/hal_pwm.h b/watch-library/hal/include/hal_pwm.h
new file mode 100644
index 00000000..d55f7e68
--- /dev/null
+++ b/watch-library/hal/include/hal_pwm.h
@@ -0,0 +1,153 @@
+/**
+ * \file
+ *
+ * \brief PWM functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef HAL_PWM_H_INCLUDED
+#define HAL_PWM_H_INCLUDED
+
+#include <hpl_pwm.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_pwm_async
+ *
+ *@{
+ */
+
+/**
+ * \brief PWM descriptor
+ *
+ * The PWM descriptor forward declaration.
+ */
+struct pwm_descriptor;
+
+/**
+ * \brief PWM callback type
+ */
+typedef void (*pwm_cb_t)(const struct pwm_descriptor *const descr);
+
+/**
+ * \brief PWM callback types
+ */
+enum pwm_callback_type { PWM_PERIOD_CB, PWM_ERROR_CB };
+
+/**
+ * \brief PWM callbacks
+ */
+struct pwm_callbacks {
+ pwm_cb_t period;
+ pwm_cb_t error;
+};
+
+/** \brief PWM descriptor
+ */
+struct pwm_descriptor {
+ /** PWM device */
+ struct _pwm_device device;
+ /** PWM callback structure */
+ struct pwm_callbacks pwm_cb;
+ /** PWM HPL interface pointer */
+ struct _pwm_hpl_interface *func;
+};
+
+/** \brief Initialize the PWM HAL instance and hardware
+ *
+ * \param[in] descr Pointer to the HAL PWM descriptor
+ * \param[in] hw The pointer to hardware instance
+ * \param[in] func The pointer to a set of functions pointers
+ *
+ * \return Operation status.
+ */
+int32_t pwm_init(struct pwm_descriptor *const descr, void *const hw, struct _pwm_hpl_interface *const func);
+
+/** \brief Deinitialize the PWM HAL instance and hardware
+ *
+ * \param[in] descr Pointer to the HAL PWM descriptor
+ *
+ * \return Operation status.
+ */
+int32_t pwm_deinit(struct pwm_descriptor *const descr);
+
+/** \brief PWM output start
+ *
+ * \param[in] descr Pointer to the HAL PWM descriptor
+ *
+ * \return Operation status.
+ */
+int32_t pwm_enable(struct pwm_descriptor *const descr);
+
+/** \brief PWM output stop
+ *
+ * \param[in] descr Pointer to the HAL PWM descriptor
+ *
+ * \return Operation status.
+ */
+int32_t pwm_disable(struct pwm_descriptor *const descr);
+
+/** \brief Register PWM callback
+ *
+ * \param[in] descr Pointer to the HAL PWM descriptor
+ * \param[in] type Callback type
+ * \param[in] cb A callback function, passing NULL de-registers callback
+ *
+ * \return Operation status.
+ * \retval 0 Success
+ * \retval -1 Error
+ */
+int32_t pwm_register_callback(struct pwm_descriptor *const descr, enum pwm_callback_type type, pwm_cb_t cb);
+
+/** \brief Change PWM parameter
+ *
+ * \param[in] descr Pointer to the HAL PWM descriptor
+ * \param[in] period Total period of one PWM cycle
+ * \param[in] duty_cycle Period of PWM first half during one cycle
+ *
+ * \return Operation status.
+ */
+int32_t pwm_set_parameters(struct pwm_descriptor *const descr, const pwm_period_t period,
+ const pwm_period_t duty_cycle);
+
+/** \brief Get PWM driver version
+ *
+ * \return Current driver version.
+ */
+uint32_t pwm_get_version(void);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_PWM;_H_INCLUDED */
diff --git a/watch-library/hal/include/hal_slcd_sync.h b/watch-library/hal/include/hal_slcd_sync.h
new file mode 100644
index 00000000..84c4e1f9
--- /dev/null
+++ b/watch-library/hal/include/hal_slcd_sync.h
@@ -0,0 +1,168 @@
+/**
+ * \file
+ *
+ * \brief SLCD Segment Liquid Crystal Display Controller(Sync) functionality
+ * declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef HAL_SLCD_SYNC_H_INCLUDED
+#define HAL_SLCD_SYNC_H_INCLUDED
+
+#include <hpl_slcd_sync.h>
+#include <utils_assert.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_slcd_sync
+ *
+ *@{
+ */
+
+struct slcd_sync_descriptor {
+ struct _slcd_sync_device dev; /*!< SLCD HPL device descriptor */
+};
+
+/**
+ * \brief Initialize SLCD Descriptor
+ *
+ * \param[in] descr SLCD descriptor to be initialized
+ * \param[in] hw The pointer to hardware instance
+ */
+int32_t slcd_sync_init(struct slcd_sync_descriptor *const descr, void *const hw);
+
+/**
+ * \brief Deinitialize SLCD Descriptor
+ *
+ * \param[in] descr SLCD descriptor to be deinitialized
+ */
+int32_t slcd_sync_deinit(struct slcd_sync_descriptor *const descr);
+
+/**
+ * \brief Enable SLCD driver
+ *
+ * \param[in] descr SLCD descriptor to be initialized
+ */
+int32_t slcd_sync_enable(struct slcd_sync_descriptor *const descr);
+
+/**
+ * \brief Disable SLCD driver
+ *
+ * \param[in] descr SLCD descriptor to be disabled
+ */
+int32_t slcd_sync_disable(struct slcd_sync_descriptor *const descr);
+
+/**
+ * \brief Turn on a Segment
+ *
+ * \param[in] descr SLCD descriptor to be enabled
+ * \param[in] seg Segment index. The segment index is by the combination
+ * of common and segment terminal index. The
+ * SLCD_SEGID(com, seg) macro can generate the index.
+ */
+int32_t slcd_sync_seg_on(struct slcd_sync_descriptor *const descr, uint32_t seg);
+
+/**
+ * \brief Turn off a Segment
+ *
+ * \param[in] descr SLCD descriptor
+ * \param[in] seg Segment index
+ * value is "(common terminals << 16 | segment terminal)"
+ */
+int32_t slcd_sync_seg_off(struct slcd_sync_descriptor *const descr, uint32_t seg);
+
+/**
+ * \brief Blink a Segment
+ *
+ * \param[in] descr SLCD descriptor
+ * \param[in] seg Segment index
+ * value is "(common terminals << 16 | segment terminal)"
+ * \param[in] period Blink period, unit is millisecond
+ */
+int32_t slcd_sync_seg_blink(struct slcd_sync_descriptor *const descr, uint32_t seg, const uint32_t period);
+
+/**
+ * \brief Displays a character
+ *
+ * \param[in] descr SLCD descriptor
+ * \param[in] character Character to be displayed
+ * \param[in] index Index of the character Mapping Group
+ */
+int32_t slcd_sync_write_char(struct slcd_sync_descriptor *const descr, const uint8_t character, uint32_t index);
+
+/**
+ * \brief Displays character string string
+ *
+ * \param[in] descr SLCD descriptor
+ * \param[in] str String to be displayed, 0 will turn off the
+ * corresponding char to display
+ * \param[in] len Length of the string array
+ * \param[in] index Index of the character Mapping Group
+ */
+int32_t slcd_sync_write_string(struct slcd_sync_descriptor *const descr, uint8_t *const str, uint32_t len,
+ uint32_t index);
+
+/**
+ * \brief Start animation play by a segment array
+ *
+ * \param[in] descr SLCD descriptor
+ * \param[in] segs Segment array
+ * \param[in] len Length of the segment array
+ * \param[in] period Period (milliseconds) of each segment to animation
+ */
+int32_t slcd_sync_start_animation(struct slcd_sync_descriptor *const descr, const uint32_t segs[], uint32_t len,
+ const uint32_t period);
+
+/**
+ * \brief Stop animation play by a segment array
+ *
+ * \param[in] descr SLCD descriptor
+ * \param[in] segs Segment array
+ * \param[in] len Length of the segment array
+ */
+int32_t slcd_sync_stop_animation(struct slcd_sync_descriptor *const descr, const uint32_t segs[], uint32_t len);
+
+/**
+ * \brief Set animation Frequency
+ *
+ * \param[in] descr SLCD descriptor
+ * \param[in] period Period (million second) of each segment to animation
+ */
+int32_t slcd_sync_set_animation_period(struct slcd_sync_descriptor *const descr, const uint32_t period);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/watch-library/hal/include/hal_sleep.h b/watch-library/hal/include/hal_sleep.h
new file mode 100644
index 00000000..b90ef6a5
--- /dev/null
+++ b/watch-library/hal/include/hal_sleep.h
@@ -0,0 +1,74 @@
+/**
+ * \file
+ *
+ * \brief Sleep related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HAL_SLEEP_H_INCLUDED
+#define _HAL_SLEEP_H_INCLUDED
+
+#include <hpl_sleep.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_helper_sleep
+ *
+ *@{
+ */
+
+/**
+ * \brief Set the sleep mode of the device and put the MCU to sleep
+ *
+ * For an overview of which systems are disabled in sleep for the different
+ * sleep modes, see the data sheet.
+ *
+ * \param[in] mode Sleep mode to use
+ *
+ * \return The status of a sleep request
+ * \retval -1 The requested sleep mode was invalid or not available
+ * \retval 0 The operation completed successfully, returned after leaving the
+ * sleep
+ */
+int sleep(const uint8_t mode);
+
+/**
+ * \brief Retrieve the current driver version
+ *
+ * \return Current driver version.
+ */
+uint32_t sleep_get_version(void);
+/**@}*/
+#ifdef __cplusplus
+}
+#endif
+#endif /* _HAL_SLEEP_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_adc_async.h b/watch-library/hal/include/hpl_adc_async.h
new file mode 100644
index 00000000..1aa41624
--- /dev/null
+++ b/watch-library/hal/include/hpl_adc_async.h
@@ -0,0 +1,264 @@
+/**
+ * \file
+ *
+ * \brief ADC related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_ADC_ASYNC_H_INCLUDED
+#define _HPL_ADC_ASYNC_H_INCLUDED
+
+/**
+ * \addtogroup HPL ADC
+ *
+ * \section hpl_async_adc_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include "hpl_adc_sync.h"
+#include "hpl_irq.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief ADC device structure
+ *
+ * The ADC device structure forward declaration.
+ */
+struct _adc_async_device;
+
+/**
+ * \brief ADC callback types
+ */
+enum _adc_async_callback_type { ADC_ASYNC_DEVICE_CONVERT_CB, ADC_ASYNC_DEVICE_MONITOR_CB, ADC_ASYNC_DEVICE_ERROR_CB };
+
+/**
+ * \brief ADC interrupt callbacks
+ */
+struct _adc_async_callbacks {
+ void (*window_cb)(struct _adc_async_device *device, const uint8_t channel);
+ void (*error_cb)(struct _adc_async_device *device, const uint8_t channel);
+};
+
+/**
+ * \brief ADC channel interrupt callbacks
+ */
+struct _adc_async_ch_callbacks {
+ void (*convert_done)(struct _adc_async_device *device, const uint8_t channel, const uint16_t data);
+};
+
+/**
+ * \brief ADC descriptor device structure
+ */
+struct _adc_async_device {
+ struct _adc_async_callbacks adc_async_cb;
+ struct _adc_async_ch_callbacks adc_async_ch_cb;
+ struct _irq_descriptor irq;
+ void * hw;
+};
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize synchronous ADC
+ *
+ * This function does low level ADC configuration.
+ *
+ * param[in] device The pointer to ADC device instance
+ * param[in] hw The pointer to hardware instance
+ *
+ * \return Initialization status
+ */
+int32_t _adc_async_init(struct _adc_async_device *const device, void *const hw);
+
+/**
+ * \brief Deinitialize ADC
+ *
+ * \param[in] device The pointer to ADC device instance
+ */
+void _adc_async_deinit(struct _adc_async_device *const device);
+
+/**
+ * \brief Enable ADC peripheral
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ */
+void _adc_async_enable_channel(struct _adc_async_device *const device, const uint8_t channel);
+
+/**
+ * \brief Disable ADC peripheral
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ */
+void _adc_async_disable_channel(struct _adc_async_device *const device, const uint8_t channel);
+
+/**
+ * \brief Retrieve ADC conversion data size
+ *
+ * \param[in] device The pointer to ADC device instance
+ *
+ * \return The data size in bytes
+ */
+uint8_t _adc_async_get_data_size(const struct _adc_async_device *const device);
+
+/**
+ * \brief Check if conversion is done
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ *
+ * \return The status of conversion
+ * \retval true The conversion is done
+ * \retval false The conversion is not done
+ */
+bool _adc_async_is_channel_conversion_done(const struct _adc_async_device *const device, const uint8_t channel);
+
+/**
+ * \brief Make conversion
+ *
+ * \param[in] device The pointer to ADC device instance
+ */
+void _adc_async_convert(struct _adc_async_device *const device);
+
+/**
+ * \brief Retrieve the conversion result
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ *
+ * The result value
+ */
+uint16_t _adc_async_read_channel_data(const struct _adc_async_device *const device, const uint8_t channel);
+
+/**
+ * \brief Set reference source
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] reference A reference source to set
+ */
+void _adc_async_set_reference_source(struct _adc_async_device *const device, const adc_reference_t reference);
+
+/**
+ * \brief Set resolution
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] resolution A resolution to set
+ */
+void _adc_async_set_resolution(struct _adc_async_device *const device, const adc_resolution_t resolution);
+
+/**
+ * \brief Set ADC input source of a channel
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] pos_input A positive input source to set
+ * \param[in] neg_input A negative input source to set
+ * \param[in] channel Channel number
+ */
+void _adc_async_set_inputs(struct _adc_async_device *const device, const adc_pos_input_t pos_input,
+ const adc_neg_input_t neg_input, const uint8_t channel);
+
+/**
+ * \brief Set conversion mode
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] mode A conversion mode to set
+ */
+void _adc_async_set_conversion_mode(struct _adc_async_device *const device, const enum adc_conversion_mode mode);
+
+/**
+ * \brief Set differential mode
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ * \param[in] mode A differential mode to set
+ */
+void _adc_async_set_channel_differential_mode(struct _adc_async_device *const device, const uint8_t channel,
+ const enum adc_differential_mode mode);
+
+/**
+ * \brief Set gain
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ * \param[in] gain A gain to set
+ */
+void _adc_async_set_channel_gain(struct _adc_async_device *const device, const uint8_t channel, const adc_gain_t gain);
+
+/**
+ * \brief Set window mode
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] mode A mode to set
+ */
+void _adc_async_set_window_mode(struct _adc_async_device *const device, const adc_window_mode_t mode);
+
+/**
+ * \brief Set lower threshold
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] low_threshold A lower threshold to set
+ * \param[in] up_threshold An upper thresholds to set
+ */
+void _adc_async_set_thresholds(struct _adc_async_device *const device, const adc_threshold_t low_threshold,
+ const adc_threshold_t up_threshold);
+
+/**
+ * \brief Retrieve threshold state
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[out] state The threshold state
+ */
+void _adc_async_get_threshold_state(const struct _adc_async_device *const device, adc_threshold_status_t *const state);
+
+/**
+ * \brief Enable/disable ADC channel interrupt
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ * \param[in] type The type of interrupt to disable/enable if applicable
+ * \param[in] state Enable or disable
+ */
+void _adc_async_set_irq_state(struct _adc_async_device *const device, const uint8_t channel,
+ const enum _adc_async_callback_type type, const bool state);
+
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_ADC_ASYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_adc_dma.h b/watch-library/hal/include/hpl_adc_dma.h
new file mode 100644
index 00000000..bb3a0541
--- /dev/null
+++ b/watch-library/hal/include/hpl_adc_dma.h
@@ -0,0 +1,243 @@
+/**
+ * \file
+ *
+ * \brief ADC related functionality declaration.
+ *
+ * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_ADC_DMA_H_INCLUDED
+#define _HPL_ADC_DMA_H_INCLUDED
+
+/**
+ * \addtogroup HPL ADC
+ *
+ * \section hpl_dma_adc_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <hpl_adc_sync.h>
+#include <hpl_irq.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief ADC device structure
+ *
+ * The ADC device structure forward declaration.
+ */
+struct _adc_dma_device;
+
+/**
+ * \brief ADC callback types
+ */
+enum _adc_dma_callback_type { ADC_DMA_DEVICE_COMPLETE_CB, ADC_DMA_DEVICE_ERROR_CB };
+
+/**
+ * \brief ADC interrupt callbacks
+ */
+struct _adc_dma_callbacks {
+ void (*complete)(struct _adc_dma_device *device, const uint16_t data);
+ void (*error)(struct _adc_dma_device *device);
+};
+
+/**
+ * \brief ADC descriptor device structure
+ */
+struct _adc_dma_device {
+ struct _adc_dma_callbacks adc_dma_cb;
+ struct _irq_descriptor irq;
+ void * hw;
+};
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize synchronous ADC
+ *
+ * This function does low level ADC configuration.
+ *
+ * param[in] device The pointer to ADC device instance
+ * param[in] hw The pointer to hardware instance
+ *
+ * \return Initialization status
+ */
+int32_t _adc_dma_init(struct _adc_dma_device *const device, void *const hw);
+
+/**
+ * \brief Deinitialize ADC
+ *
+ * \param[in] device The pointer to ADC device instance
+ */
+void _adc_dma_deinit(struct _adc_dma_device *const device);
+
+/**
+ * \brief Enable ADC peripheral
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ */
+void _adc_dma_enable_channel(struct _adc_dma_device *const device, const uint8_t channel);
+
+/**
+ * \brief Disable ADC peripheral
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ */
+void _adc_dma_disable_channel(struct _adc_dma_device *const device, const uint8_t channel);
+
+/**
+ * \brief Return address of ADC DMA source
+ *
+ * \param[in] device The pointer to ADC device instance
+ *
+ * \return ADC DMA source address
+ */
+uint32_t _adc_get_source_for_dma(struct _adc_dma_device *const device);
+
+/**
+ * \brief Retrieve ADC conversion data size
+ *
+ * \param[in] device The pointer to ADC device instance
+ *
+ * \return The data size in bytes
+ */
+uint8_t _adc_dma_get_data_size(const struct _adc_dma_device *const device);
+
+/**
+ * \brief Check if conversion is done
+ *
+ * \param[in] device The pointer to ADC device instance
+ *
+ * \return The status of conversion
+ * \retval true The conversion is done
+ * \retval false The conversion is not done
+ */
+bool _adc_dma_is_conversion_done(const struct _adc_dma_device *const device);
+
+/**
+ * \brief Make conversion
+ *
+ * \param[in] device The pointer to ADC device instance
+ */
+void _adc_dma_convert(struct _adc_dma_device *const device);
+
+/**
+ * \brief Set reference source
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] reference A reference source to set
+ */
+void _adc_dma_set_reference_source(struct _adc_dma_device *const device, const adc_reference_t reference);
+
+/**
+ * \brief Set resolution
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] resolution A resolution to set
+ */
+void _adc_dma_set_resolution(struct _adc_dma_device *const device, const adc_resolution_t resolution);
+
+/**
+ * \brief Set ADC input source of a channel
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] pos_input A positive input source to set
+ * \param[in] neg_input A negative input source to set
+ * \param[in] channel Channel number
+ */
+void _adc_dma_set_inputs(struct _adc_dma_device *const device, const adc_pos_input_t pos_input,
+ const adc_neg_input_t neg_input, const uint8_t channel);
+
+/**
+ * \brief Set conversion mode
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] mode A conversion mode to set
+ */
+void _adc_dma_set_conversion_mode(struct _adc_dma_device *const device, const enum adc_conversion_mode mode);
+
+/**
+ * \brief Set differential mode
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ * \param[in] mode A differential mode to set
+ */
+void _adc_dma_set_channel_differential_mode(struct _adc_dma_device *const device, const uint8_t channel,
+ const enum adc_differential_mode mode);
+
+/**
+ * \brief Set gain
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ * \param[in] gain A gain to set
+ */
+void _adc_dma_set_channel_gain(struct _adc_dma_device *const device, const uint8_t channel, const adc_gain_t gain);
+
+/**
+ * \brief Set window mode
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] mode A mode to set
+ */
+void _adc_dma_set_window_mode(struct _adc_dma_device *const device, const adc_window_mode_t mode);
+
+/**
+ * \brief Set thresholds
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] low_threshold A lower thresholds to set
+ * \param[in] up_threshold An upper thresholds to set
+ */
+void _adc_dma_set_thresholds(struct _adc_dma_device *const device, const adc_threshold_t low_threshold,
+ const adc_threshold_t up_threshold);
+
+/**
+ * \brief Retrieve threshold state
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[out] state The threshold state
+ */
+void _adc_dma_get_threshold_state(const struct _adc_dma_device *const device, adc_threshold_status_t *const state);
+
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_ADC_DMA_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_adc_sync.h b/watch-library/hal/include/hpl_adc_sync.h
new file mode 100644
index 00000000..3bfbc61d
--- /dev/null
+++ b/watch-library/hal/include/hpl_adc_sync.h
@@ -0,0 +1,271 @@
+/**
+ * \file
+ *
+ * \brief ADC related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_ADC_SYNC_H_INCLUDED
+#define _HPL_ADC_SYNC_H_INCLUDED
+
+/**
+ * \addtogroup HPL ADC
+ *
+ * \section hpl_adc_sync_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include "compiler.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief ADC reference source
+ */
+typedef uint8_t adc_reference_t;
+
+/**
+ * \brief ADC resolution
+ */
+typedef uint8_t adc_resolution_t;
+
+/**
+ * \brief ADC positive input for channel
+ */
+typedef uint8_t adc_pos_input_t;
+
+/**
+ * \brief ADC negative input for channel
+ */
+typedef uint8_t adc_neg_input_t;
+
+/**
+ * \brief ADC threshold
+ */
+typedef uint16_t adc_threshold_t;
+
+/**
+ * \brief ADC gain
+ */
+typedef uint8_t adc_gain_t;
+
+/**
+ * \brief ADC conversion mode
+ */
+enum adc_conversion_mode { ADC_CONVERSION_MODE_SINGLE_CONVERSION = 0, ADC_CONVERSION_MODE_FREERUN };
+
+/**
+ * \brief ADC differential mode
+ */
+enum adc_differential_mode { ADC_DIFFERENTIAL_MODE_SINGLE_ENDED = 0, ADC_DIFFERENTIAL_MODE_DIFFERENTIAL };
+
+/**
+ * \brief ADC window mode
+ */
+typedef uint8_t adc_window_mode_t;
+
+/**
+ * \brief ADC threshold status
+ */
+typedef bool adc_threshold_status_t;
+
+/**
+ * \brief ADC sync descriptor device structure
+ */
+struct _adc_sync_device {
+ void *hw;
+};
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize synchronous ADC
+ *
+ * This function does low level ADC configuration.
+ *
+ * param[in] device The pointer to ADC device instance
+ * param[in] hw The pointer to hardware instance
+ *
+ * \return Initialization status
+ */
+int32_t _adc_sync_init(struct _adc_sync_device *const device, void *const hw);
+
+/**
+ * \brief Deinitialize ADC
+ *
+ * \param[in] device The pointer to ADC device instance
+ */
+void _adc_sync_deinit(struct _adc_sync_device *const device);
+
+/**
+ * \brief Enable ADC
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ */
+void _adc_sync_enable_channel(struct _adc_sync_device *const device, const uint8_t channel);
+
+/**
+ * \brief Disable ADC
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ */
+void _adc_sync_disable_channel(struct _adc_sync_device *const device, const uint8_t channel);
+
+/**
+ * \brief Retrieve ADC conversion data size
+ *
+ * \param[in] device The pointer to ADC device instance
+ *
+ * \return The data size in bytes
+ */
+uint8_t _adc_sync_get_data_size(const struct _adc_sync_device *const device);
+
+/**
+ * \brief Check if conversion is done
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ *
+ * \return The status of conversion
+ * \retval true The conversion is done
+ * \retval false The conversion is not done
+ */
+bool _adc_sync_is_channel_conversion_done(const struct _adc_sync_device *const device, const uint8_t channel);
+
+/**
+ * \brief Make conversion
+ *
+ * \param[in] device The pointer to ADC device instance
+ */
+void _adc_sync_convert(struct _adc_sync_device *const device);
+
+/**
+ * \brief Retrieve the conversion result
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ *
+ * \return The result value of channel
+ */
+uint16_t _adc_sync_read_channel_data(const struct _adc_sync_device *const device, const uint8_t channel);
+
+/**
+ * \brief Set reference source
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] reference A reference source to set
+ */
+void _adc_sync_set_reference_source(struct _adc_sync_device *const device, const adc_reference_t reference);
+
+/**
+ * \brief Set resolution
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] resolution A resolution to set
+ */
+void _adc_sync_set_resolution(struct _adc_sync_device *const device, const adc_resolution_t resolution);
+
+/**
+ * \brief Set ADC input source of a channel
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] pos_input A positive input source to set
+ * \param[in] neg_input A negative input source to set
+ * \param[in] channel Channel number
+ */
+void _adc_sync_set_inputs(struct _adc_sync_device *const device, const adc_pos_input_t pos_input,
+ const adc_neg_input_t neg_input, const uint8_t channel);
+
+/**
+ * \brief Set conversion mode
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] mode A conversion mode to set
+ */
+void _adc_sync_set_conversion_mode(struct _adc_sync_device *const device, const enum adc_conversion_mode mode);
+
+/**
+ * \brief Set differential mode
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ * \param[in] mode A differential mode to set
+ */
+void _adc_sync_set_channel_differential_mode(struct _adc_sync_device *const device, const uint8_t channel,
+ const enum adc_differential_mode mode);
+
+/**
+ * \brief Set gain
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] channel Channel number
+ * \param[in] gain A gain to set
+ */
+void _adc_sync_set_channel_gain(struct _adc_sync_device *const device, const uint8_t channel, const adc_gain_t gain);
+
+/**
+ * \brief Set window mode
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] mode A mode to set
+ */
+void _adc_sync_set_window_mode(struct _adc_sync_device *const device, const adc_window_mode_t mode);
+
+/**
+ * \brief Set threshold
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[in] low_threshold A lower threshold to set
+ * \param[in] up_threshold An upper thresholds to set
+ */
+void _adc_sync_set_thresholds(struct _adc_sync_device *const device, const adc_threshold_t low_threshold,
+ const adc_threshold_t up_threshold);
+
+/**
+ * \brief Retrieve threshold state
+ *
+ * \param[in] device The pointer to ADC device instance
+ * \param[out] state The threshold state
+ */
+void _adc_sync_get_threshold_state(const struct _adc_sync_device *const device, adc_threshold_status_t *const state);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_ADC_SYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_calendar.h b/watch-library/hal/include/hpl_calendar.h
new file mode 100644
index 00000000..16601d3a
--- /dev/null
+++ b/watch-library/hal/include/hpl_calendar.h
@@ -0,0 +1,318 @@
+/**
+ * \file
+ *
+ * \brief Generic CALENDAR functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+#ifndef _HPL_CALENDER_H_INCLUDED
+#define _HPL_CALENDER_H_INCLUDED
+
+#include <compiler.h>
+#include <utils_list.h>
+#include "hpl_irq.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Calendar structure
+ *
+ * The Calendar structure forward declaration.
+ */
+struct calendar_dev;
+
+/**
+ * \brief Available mask options for alarms.
+ *
+ * Available mask options for alarms.
+ */
+enum calendar_alarm_option {
+ /** Alarm disabled. */
+ CALENDAR_ALARM_MATCH_DISABLED = 0,
+ /** Alarm match on second. */
+ CALENDAR_ALARM_MATCH_SEC,
+ /** Alarm match on second and minute. */
+ CALENDAR_ALARM_MATCH_MIN,
+ /** Alarm match on second, minute, and hour. */
+ CALENDAR_ALARM_MATCH_HOUR,
+ /** Alarm match on second, minute, hour, and day. */
+ CALENDAR_ALARM_MATCH_DAY,
+ /** Alarm match on second, minute, hour, day, and month. */
+ CALENDAR_ALARM_MATCH_MONTH,
+ /** Alarm match on second, minute, hour, day, month and year. */
+ CALENDAR_ALARM_MATCH_YEAR
+};
+
+/**
+ * \brief Available mode for alarms.
+ */
+enum calendar_alarm_mode { ONESHOT = 1, REPEAT };
+/**
+ * \brief Prototype of callback on alarm match
+ */
+typedef void (*calendar_drv_cb_alarm_t)(struct calendar_dev *const dev);
+
+/**
+ * \brief Prototype of callback on tamper detect
+ */
+typedef void (*tamper_drv_cb_t)(struct calendar_dev *const dev);
+
+/**
+ * \brief Structure of Calendar instance
+ */
+struct calendar_dev {
+ /** Pointer to the hardware base */
+ void *hw;
+ /** Alarm match callback */
+ calendar_drv_cb_alarm_t callback;
+ /** Tamper callback */
+ tamper_drv_cb_t callback_tamper;
+ /** IRQ struct */
+ struct _irq_descriptor irq;
+};
+/**
+ * \brief Time struct for calendar
+ */
+struct calendar_time {
+ /*range from 0 to 59*/
+ uint8_t sec;
+ /*range from 0 to 59*/
+ uint8_t min;
+ /*range from 0 to 23*/
+ uint8_t hour;
+};
+
+/**
+ * \brief Time struct for calendar
+ */
+struct calendar_date {
+ /*range from 1 to 28/29/30/31*/
+ uint8_t day;
+ /*range from 1 to 12*/
+ uint8_t month;
+ /*absolute year>= 1970(such as 2000)*/
+ uint16_t year;
+};
+
+/** \brief Calendar driver struct
+ *
+ */
+struct calendar_descriptor {
+ struct calendar_dev device;
+ struct list_descriptor alarms;
+ /*base date/time = base_year/1/1/0/0/0(year/month/day/hour/min/sec)*/
+ uint32_t base_year;
+ uint8_t flags;
+};
+
+/** \brief Date&Time struct for calendar
+ */
+struct calendar_date_time {
+ struct calendar_time time;
+ struct calendar_date date;
+};
+
+/** \brief struct for alarm time
+ */
+struct _calendar_alarm {
+ struct calendar_date_time datetime;
+ uint32_t timestamp;
+ enum calendar_alarm_option option;
+ enum calendar_alarm_mode mode;
+};
+
+/** \enum for tamper detection mode
+ */
+enum tamper_detection_mode { TAMPER_MODE_OFF = 0U, TAMPER_MODE_WAKE, TAMPER_MODE_CAPTURE, TAMPER_MODE_ACTL };
+
+/** \enum for tamper detection mode
+ */
+enum tamper_id { TAMPID0 = 0U, TAMPID1, TAMPID2, TAMPID3, TAMPID4 };
+/**
+ * \brief Initialize Calendar instance
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _calendar_init(struct calendar_dev *const dev);
+
+/**
+ * \brief Deinitialize Calendar instance
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _calendar_deinit(struct calendar_dev *const dev);
+
+/**
+ * \brief Enable Calendar instance
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _calendar_enable(struct calendar_dev *const dev);
+
+/**
+ * \brief Disable Calendar instance
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _calendar_disable(struct calendar_dev *const dev);
+/**
+ * \brief Set counter for calendar
+ *
+ * \param[in] dev The pointer to calendar device struct
+ * \param[in] counter The counter for set
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _calendar_set_counter(struct calendar_dev *const dev, const uint32_t counter);
+
+/**
+ * \brief Get counter for calendar
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return return current counter value
+ */
+uint32_t _calendar_get_counter(struct calendar_dev *const dev);
+
+/**
+ * \brief Set compare value for calendar
+ *
+ * \param[in] dev The pointer to calendar device struct
+ * \param[in] comp The compare value for set
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _calendar_set_comp(struct calendar_dev *const dev, const uint32_t comp);
+
+/**
+ * \brief Get compare value for calendar
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return return current compare value
+ */
+uint32_t _calendar_get_comp(struct calendar_dev *const dev);
+
+/**
+ * \brief Register callback for calendar alarm
+ *
+ * \param[in] dev The pointer to calendar device struct
+ * \param[in] callback The pointer to callback function
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _calendar_register_callback(struct calendar_dev *const dev, calendar_drv_cb_alarm_t callback);
+
+/**
+ * \brief Set calendar IRQ
+ *
+ * \param[in] dev The pointer to calendar device struct
+ */
+void _calendar_set_irq(struct calendar_dev *const dev);
+
+/**
+ * \brief Register callback for tamper detection
+ *
+ * \param[in] dev The pointer to calendar device struct
+ * \param[in] callback The pointer to callback function
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _tamper_register_callback(struct calendar_dev *const dev, tamper_drv_cb_t callback_tamper);
+
+/**
+ * \brief Find tamper is detected on specified pin
+ *
+ * \param[in] dev The pointer to calendar device struct
+ * \param[in] enum Tamper ID number
+ *
+ * \return true on detection success and false on failure.
+ */
+bool _is_tamper_detected(struct calendar_dev *const dev, enum tamper_id tamper_id_pin);
+
+/**
+ * \brief brief Clear the Tamper ID flag
+ *
+ * \param[in] dev The pointer to calendar device struct
+ * \param[in] enum Tamper ID number
+ *
+ * \return ERR_NONE
+ */
+int32_t _tamper_clear_tampid_flag(struct calendar_dev *const dev, enum tamper_id tamper_id_pin);
+
+/**
+ * \brief Enable Debounce Asynchronous Feature
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _tamper_enable_debounce_asynchronous(struct calendar_dev *const dev);
+
+/**
+ * \brief Disable Tamper Debounce Asynchronous Feature
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _tamper_disable_debounce_asynchronous(struct calendar_dev *const dev);
+
+/**
+ * \brief Enable Tamper Debounce Majority Feature
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _tamper_enable_debounce_majority(struct calendar_dev *const dev);
+
+/**
+ * \brief Enable Tamper Debounce Majority Feature
+ *
+ * \param[in] dev The pointer to calendar device struct
+ *
+ * \return ERR_NONE on success, or an error code on failure.
+ */
+int32_t _tamper_disable_debounce_majority(struct calendar_dev *const dev);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _HPL_RTC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_core.h b/watch-library/hal/include/hpl_core.h
new file mode 100644
index 00000000..9324c43e
--- /dev/null
+++ b/watch-library/hal/include/hpl_core.h
@@ -0,0 +1,56 @@
+/**
+ * \file
+ *
+ * \brief CPU core related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_CORE_H_INCLUDED
+#define _HPL_CORE_H_INCLUDED
+
+/**
+ * \addtogroup HPL Core
+ *
+ * \section hpl_core_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include "hpl_core_port.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_CORE_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_delay.h b/watch-library/hal/include/hpl_delay.h
new file mode 100644
index 00000000..a0f1ac81
--- /dev/null
+++ b/watch-library/hal/include/hpl_delay.h
@@ -0,0 +1,97 @@
+/**
+ * \file
+ *
+ * \brief Delay related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_DELAY_H_INCLUDED
+#define _HPL_DELAY_H_INCLUDED
+
+/**
+ * \addtogroup HPL Delay
+ *
+ * \section hpl_delay_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#ifndef _UNIT_TEST_
+#include <compiler.h>
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name HPL functions
+ */
+//@{
+
+/**
+ * \brief Initialize delay functionality
+ *
+ * \param[in] hw The pointer to hardware instance
+ */
+void _delay_init(void *const hw);
+
+/**
+ * \brief Retrieve the amount of cycles to delay for the given amount of us
+ *
+ * \param[in] us The amount of us to delay for
+ *
+ * \return The amount of cycles
+ */
+uint32_t _get_cycles_for_us(const uint16_t us);
+
+/**
+ * \brief Retrieve the amount of cycles to delay for the given amount of ms
+ *
+ * \param[in] ms The amount of ms to delay for
+ *
+ * \return The amount of cycles
+ */
+uint32_t _get_cycles_for_ms(const uint16_t ms);
+
+/**
+ * \brief Delay loop to delay n number of cycles
+ *
+ * \param[in] hw The pointer to hardware instance
+ * \param[in] cycles The amount of cycles to delay for
+ */
+void _delay_cycles(void *const hw, uint32_t cycles);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_DELAY_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_dma.h b/watch-library/hal/include/hpl_dma.h
new file mode 100644
index 00000000..1e08434a
--- /dev/null
+++ b/watch-library/hal/include/hpl_dma.h
@@ -0,0 +1,176 @@
+/**
+ * \file
+ *
+ * \brief DMA related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_DMA_H_INCLUDED
+#define _HPL_DMA_H_INCLUDED
+
+/**
+ * \addtogroup HPL DMA
+ *
+ * \section hpl_dma_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <compiler.h>
+#include <hpl_irq.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct _dma_resource;
+
+/**
+ * \brief DMA callback types
+ */
+enum _dma_callback_type { DMA_TRANSFER_COMPLETE_CB, DMA_TRANSFER_ERROR_CB };
+
+/**
+ * \brief DMA interrupt callbacks
+ */
+struct _dma_callbacks {
+ void (*transfer_done)(struct _dma_resource *resource);
+ void (*error)(struct _dma_resource *resource);
+};
+
+/**
+ * \brief DMA resource structure
+ */
+struct _dma_resource {
+ struct _dma_callbacks dma_cb;
+ void * back;
+};
+
+/**
+ * \brief Initialize DMA
+ *
+ * This function does low level DMA configuration.
+ *
+ * \return initialize status
+ */
+int32_t _dma_init(void);
+
+/**
+ * \brief Set destination address
+ *
+ * \param[in] channel DMA channel to set destination address for
+ * \param[in] dst Destination address
+ *
+ * \return setting status
+ */
+int32_t _dma_set_destination_address(const uint8_t channel, const void *const dst);
+
+/**
+ * \brief Set source address
+ *
+ * \param[in] channel DMA channel to set source address for
+ * \param[in] src Source address
+ *
+ * \return setting status
+ */
+int32_t _dma_set_source_address(const uint8_t channel, const void *const src);
+
+/**
+ * \brief Set next descriptor address
+ *
+ * \param[in] current_channel Current DMA channel to set next descriptor address
+ * \param[in] next_channel Next DMA channel used as next descriptor
+ *
+ * \return setting status
+ */
+int32_t _dma_set_next_descriptor(const uint8_t current_channel, const uint8_t next_channel);
+
+/**
+ * \brief Enable/disable source address incrementation during DMA transaction
+ *
+ * \param[in] channel DMA channel to set source address for
+ * \param[in] enable True to enable, false to disable
+ *
+ * \return status of operation
+ */
+int32_t _dma_srcinc_enable(const uint8_t channel, const bool enable);
+
+/**
+ * \brief Enable/disable Destination address incrementation during DMA transaction
+ *
+ * \param[in] channel DMA channel to set destination address for
+ * \param[in] enable True to enable, false to disable
+ *
+ * \return status of operation
+ */
+int32_t _dma_dstinc_enable(const uint8_t channel, const bool enable);
+/**
+ * \brief Set the amount of data to be transfered per transaction
+ *
+ * \param[in] channel DMA channel to set data amount for
+ * \param[in] amount Data amount
+ *
+ * \return status of operation
+ */
+int32_t _dma_set_data_amount(const uint8_t channel, const uint32_t amount);
+
+/**
+ * \brief Trigger DMA transaction on the given channel
+ *
+ * \param[in] channel DMA channel to trigger transaction on
+ *
+ * \return status of operation
+ */
+int32_t _dma_enable_transaction(const uint8_t channel, const bool software_trigger);
+
+/**
+ * \brief Retrieves DMA resource structure
+ *
+ * \param[out] resource The resource to be retrieved
+ * \param[in] channel DMA channel to retrieve structure for
+ *
+ * \return status of operation
+ */
+int32_t _dma_get_channel_resource(struct _dma_resource **resource, const uint8_t channel);
+
+/**
+ * \brief Enable/disable DMA interrupt
+ *
+ * \param[in] channel DMA channel to enable/disable interrupt for
+ * \param[in] type The type of interrupt to disable/enable if applicable
+ * \param[in] state Enable or disable
+ */
+void _dma_set_irq_state(const uint8_t channel, const enum _dma_callback_type type, const bool state);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HPL_DMA_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_ext_irq.h b/watch-library/hal/include/hpl_ext_irq.h
new file mode 100644
index 00000000..3a169b69
--- /dev/null
+++ b/watch-library/hal/include/hpl_ext_irq.h
@@ -0,0 +1,95 @@
+/**
+ * \file
+ *
+ * \brief External IRQ related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_EXT_IRQ_H_INCLUDED
+#define _HPL_EXT_IRQ_H_INCLUDED
+
+/**
+ * \addtogroup HPL EXT IRQ
+ *
+ * \section hpl_ext_irq_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize external interrupt module
+ *
+ * This function does low level external interrupt configuration.
+ *
+ * \param[in] cb The pointer to callback function from external interrupt
+ *
+ * \return Initialization status.
+ * \retval -1 External irq module is already initialized
+ * \retval 0 The initialization is completed successfully
+ */
+int32_t _ext_irq_init(void (*cb)(const uint32_t pin));
+
+/**
+ * \brief Deinitialize external interrupt module
+ *
+ * \return Initialization status.
+ * \retval -1 External irq module is already deinitialized
+ * \retval 0 The de-initialization is completed successfully
+ */
+int32_t _ext_irq_deinit(void);
+
+/**
+ * \brief Enable / disable external irq
+ *
+ * \param[in] pin Pin to enable external irq on
+ * \param[in] enable True to enable, false to disable
+ *
+ * \return Status of external irq enabling / disabling
+ * \retval -1 External irq module can't be enabled / disabled
+ * \retval 0 External irq module is enabled / disabled successfully
+ */
+int32_t _ext_irq_enable(const uint32_t pin, const bool enable);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_EXT_IRQ_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_gpio.h b/watch-library/hal/include/hpl_gpio.h
new file mode 100644
index 00000000..5cdd387b
--- /dev/null
+++ b/watch-library/hal/include/hpl_gpio.h
@@ -0,0 +1,185 @@
+/**
+ * \file
+ *
+ * \brief Port related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_GPIO_H_INCLUDED
+#define _HPL_GPIO_H_INCLUDED
+
+/**
+ * \addtogroup HPL Port
+ *
+ * \section hpl_port_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/**
+ * \brief Macros for the pin and port group, lower 5
+ * bits stands for pin number in the group, higher 3
+ * bits stands for port group
+ */
+#define GPIO_PIN(n) (((n)&0x1Fu) << 0)
+#define GPIO_PORT(n) ((n) >> 5)
+#define GPIO(port, pin) ((((port)&0x7u) << 5) + ((pin)&0x1Fu))
+#define GPIO_PIN_FUNCTION_OFF 0xffffffff
+
+/**
+ * \brief PORT pull mode settings
+ */
+enum gpio_pull_mode { GPIO_PULL_OFF, GPIO_PULL_UP, GPIO_PULL_DOWN };
+
+/**
+ * \brief PORT direction settins
+ */
+enum gpio_direction { GPIO_DIRECTION_OFF, GPIO_DIRECTION_IN, GPIO_DIRECTION_OUT };
+
+/**
+ * \brief PORT group abstraction
+ */
+
+enum gpio_port { GPIO_PORTA, GPIO_PORTB, GPIO_PORTC, GPIO_PORTD, GPIO_PORTE };
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Port initialization function
+ *
+ * Port initialization function should setup the port module based
+ * on a static configuration file, this function should normally
+ * not be called directly, but is a part of hal_init()
+ */
+void _gpio_init(void);
+
+/**
+ * \brief Set direction on port with mask
+ *
+ * Set data direction for each pin, or disable the pin
+ *
+ * \param[in] port Ports are grouped into groups of maximum 32 pins,
+ * GPIO_PORTA = group 0, GPIO_PORTB = group 1, etc
+ * \param[in] mask Bit mask where 1 means apply direction setting to the
+ * corresponding pin
+ * \param[in] direction GPIO_DIRECTION_OFF = set pin direction to input
+ * and disable input buffer to disable the pin
+ * GPIO_DIRECTION_IN = set pin direction to input
+ * and enable input buffer to enable the pin
+ * GPIO_DIRECTION_OUT = set pin direction to output
+ * and disable input buffer
+ */
+static inline void _gpio_set_direction(const enum gpio_port port, const uint32_t mask,
+ const enum gpio_direction direction);
+
+/**
+ * \brief Set output level on port with mask
+ *
+ * Sets output state on pin to high or low with pin masking
+ *
+ * \param[in] port Ports are grouped into groups of maximum 32 pins,
+ * GPIO_PORTA = group 0, GPIO_PORTB = group 1, etc
+ * \param[in] mask Bit mask where 1 means apply direction setting to
+ * the corresponding pin
+ * \param[in] level true = pin level is set to 1
+ * false = pin level is set to 0
+ */
+static inline void _gpio_set_level(const enum gpio_port port, const uint32_t mask, const bool level);
+
+/**
+ * \brief Change output level to the opposite with mask
+ *
+ * Change pin output level to the opposite with pin masking
+ *
+ * \param[in] port Ports are grouped into groups of maximum 32 pins,
+ * GPIO_PORTA = group 0, GPIO_PORTB = group 1, etc
+ * \param[in] mask Bit mask where 1 means apply direction setting to
+ * the corresponding pin
+ */
+static inline void _gpio_toggle_level(const enum gpio_port port, const uint32_t mask);
+
+/**
+ * \brief Get input levels on all port pins
+ *
+ * Get input level on all port pins, will read IN register if configured to
+ * input and OUT register if configured as output
+ *
+ * \param[in] port Ports are grouped into groups of maximum 32 pins,
+ * GPIO_PORTA = group 0, GPIO_PORTB = group 1, etc
+ */
+static inline uint32_t _gpio_get_level(const enum gpio_port port);
+
+/**
+ * \brief Set pin pull mode
+ *
+ * Set pull mode on a single pin
+ *
+ * \notice This function will automatically change pin direction to input
+ *
+ * \param[in] port Ports are grouped into groups of maximum 32 pins,
+ * GPIO_PORTA = group 0, GPIO_PORTB = group 1, etc
+ * \param[in] pin The pin in the group that pull mode should be selected
+ * for
+ * \param[in] pull_mode GPIO_PULL_OFF = pull resistor on pin is disabled
+ * GPIO_PULL_DOWN = pull resistor on pin will pull pin
+ * level to ground level
+ * GPIO_PULL_UP = pull resistor on pin will pull pin
+ * level to VCC
+ */
+static inline void _gpio_set_pin_pull_mode(const enum gpio_port port, const uint8_t pin,
+ const enum gpio_pull_mode pull_mode);
+
+/**
+ * \brief Set gpio function
+ *
+ * Select which function a gpio is used for
+ *
+ * \param[in] gpio The gpio to set function for
+ * \param[in] function The gpio function is given by a 32-bit wide bitfield
+ * found in the header files for the device
+ *
+ */
+static inline void _gpio_set_pin_function(const uint32_t gpio, const uint32_t function);
+
+#include <hpl_gpio_base.h>
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_GPIO_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_i2c_m_async.h b/watch-library/hal/include/hpl_i2c_m_async.h
new file mode 100644
index 00000000..8a9491de
--- /dev/null
+++ b/watch-library/hal/include/hpl_i2c_m_async.h
@@ -0,0 +1,205 @@
+/**
+ * \file
+ *
+ * \brief I2C Master Hardware Proxy Layer(HPL) declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+#ifndef _HPL_I2C_M_ASYNC_H_INCLUDED
+#define _HPL_I2C_M_ASYNC_H_INCLUDED
+
+#include "hpl_i2c_m_sync.h"
+#include "hpl_irq.h"
+#include "utils.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief i2c master callback names
+ */
+enum _i2c_m_async_callback_type {
+ I2C_M_ASYNC_DEVICE_ERROR,
+ I2C_M_ASYNC_DEVICE_TX_COMPLETE,
+ I2C_M_ASYNC_DEVICE_RX_COMPLETE
+};
+
+struct _i2c_m_async_device;
+
+typedef void (*_i2c_complete_cb_t)(struct _i2c_m_async_device *i2c_dev);
+typedef void (*_i2c_error_cb_t)(struct _i2c_m_async_device *i2c_dev, int32_t errcode);
+
+/**
+ * \brief i2c callback pointers structure
+ */
+struct _i2c_m_async_callback {
+ _i2c_error_cb_t error;
+ _i2c_complete_cb_t tx_complete;
+ _i2c_complete_cb_t rx_complete;
+};
+
+/**
+ * \brief i2c device structure
+ */
+struct _i2c_m_async_device {
+ struct _i2c_m_service service;
+ void * hw;
+ struct _i2c_m_async_callback cb;
+ struct _irq_descriptor irq;
+};
+
+/**
+ * \name HPL functions
+ */
+
+/**
+ * \brief Initialize I2C in interrupt mode
+ *
+ * This function does low level I2C configuration.
+ *
+ * \param[in] i2c_dev The pointer to i2c interrupt device structure
+ * \param[in] hw The pointer to hardware instance
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_async_init(struct _i2c_m_async_device *const i2c_dev, void *const hw);
+
+/**
+ * \brief Deinitialize I2C in interrupt mode
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_async_deinit(struct _i2c_m_async_device *const i2c_dev);
+
+/**
+ * \brief Enable I2C module
+ *
+ * This function does low level I2C enable.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_async_enable(struct _i2c_m_async_device *const i2c_dev);
+
+/**
+ * \brief Disable I2C module
+ *
+ * This function does low level I2C disable.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_async_disable(struct _i2c_m_async_device *const i2c_dev);
+
+/**
+ * \brief Transfer data by I2C
+ *
+ * This function does low level I2C data transfer.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ * \param[in] msg The pointer to i2c msg structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_async_transfer(struct _i2c_m_async_device *const i2c_dev, struct _i2c_m_msg *msg);
+
+/**
+ * \brief Set baud rate of I2C
+ *
+ * This function does low level I2C set baud rate.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ * \param[in] clkrate The clock rate(KHz) input to i2c module
+ * \param[in] baudrate The demand baud rate(KHz) of i2c module
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_async_set_baudrate(struct _i2c_m_async_device *const i2c_dev, uint32_t clkrate, uint32_t baudrate);
+
+/**
+ * \brief Register callback to I2C
+ *
+ * This function does low level I2C callback register.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ * \param[in] cb_type The callback type request
+ * \param[in] func The callback function pointer
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_async_register_callback(struct _i2c_m_async_device *i2c_dev, enum _i2c_m_async_callback_type cb_type,
+ FUNC_PTR func);
+
+/**
+ * \brief Generate stop condition on the I2C bus
+ *
+ * This function will generate a stop condition on the I2C bus
+ *
+ * \param[in] i2c_m_async_descriptor An i2c descriptor which is used to communicate through I2C
+ *
+ * \return Operation status
+ * \retval 0 Operation executed successfully
+ * \retval <0 Operation failed
+ */
+int32_t _i2c_m_async_send_stop(struct _i2c_m_async_device *const i2c_dev);
+
+/**
+ * \brief Returns the number of bytes left or not used in the I2C message buffer
+ *
+ * This function will return the number of bytes left (not written to the bus) or still free
+ * (not received from the bus) in the message buffer, depending on direction of transmission.
+ *
+ * \param[in] i2c_m_async_descriptor An i2c descriptor which is used to communicate through I2C
+ *
+ * \return Number of bytes or error code
+ * \retval >0 Positive number indicating bytes left
+ * \retval 0 Buffer is full/empty depending on direction
+ * \retval <0 Error code
+ */
+int32_t _i2c_m_async_get_bytes_left(struct _i2c_m_async_device *const i2c_dev);
+
+/**
+ * \brief Enable/disable I2C master interrupt
+ *
+ * param[in] device The pointer to I2C master device instance
+ * param[in] type The type of interrupt to disable/enable if applicable
+ * param[in] state Enable or disable
+ */
+void _i2c_m_async_set_irq_state(struct _i2c_m_async_device *const device, const enum _i2c_m_async_callback_type type,
+ const bool state);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/watch-library/hal/include/hpl_i2c_m_sync.h b/watch-library/hal/include/hpl_i2c_m_sync.h
new file mode 100644
index 00000000..ce173ae2
--- /dev/null
+++ b/watch-library/hal/include/hpl_i2c_m_sync.h
@@ -0,0 +1,185 @@
+/**
+ * \file
+ *
+ * \brief I2C Master Hardware Proxy Layer(HPL) declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+#ifndef _HPL_I2C_M_SYNC_H_INCLUDED
+#define _HPL_I2C_M_SYNC_H_INCLUDED
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief i2c flags
+ */
+#define I2C_M_RD 0x0001 /* read data, from slave to master */
+#define I2C_M_BUSY 0x0100
+#define I2C_M_TEN 0x0400 /* this is a ten bit chip address */
+#define I2C_M_SEVEN 0x0800 /* this is a seven bit chip address */
+#define I2C_M_FAIL 0x1000
+#define I2C_M_STOP 0x8000 /* if I2C_FUNC_PROTOCOL_MANGLING */
+
+/**
+ * \brief i2c Return codes
+ */
+#define I2C_OK 0 /* Operation successful */
+#define I2C_ACK -1 /* Received ACK from device on I2C bus */
+#define I2C_NACK -2 /* Received NACK from device on I2C bus */
+#define I2C_ERR_ARBLOST -3 /* Arbitration lost */
+#define I2C_ERR_BAD_ADDRESS -4 /* Bad address */
+#define I2C_ERR_BUS -5 /* Bus error */
+#define I2C_ERR_BUSY -6 /* Device busy */
+#define I2c_ERR_PACKAGE_COLLISION -7 /* Package collision */
+
+/**
+ * \brief i2c I2C Modes
+ */
+#define I2C_STANDARD_MODE 0x00
+#define I2C_FASTMODE 0x01
+#define I2C_HIGHSPEED_MODE 0x02
+
+/**
+ * \brief i2c master message structure
+ */
+struct _i2c_m_msg {
+ uint16_t addr;
+ volatile uint16_t flags;
+ int32_t len;
+ uint8_t * buffer;
+};
+
+/**
+ * \brief i2c master service
+ */
+struct _i2c_m_service {
+ struct _i2c_m_msg msg;
+ uint16_t mode;
+ uint16_t trise;
+};
+
+/**
+ * \brief i2c sync master device structure
+ */
+struct _i2c_m_sync_device {
+ struct _i2c_m_service service;
+ void * hw;
+};
+
+/**
+ * \name HPL functions
+ */
+
+/**
+ * \brief Initialize I2C
+ *
+ * This function does low level I2C configuration.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ * \param[in] hw The pointer to hardware instance
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_sync_init(struct _i2c_m_sync_device *const i2c_dev, void *const hw);
+
+/**
+ * \brief Deinitialize I2C
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_sync_deinit(struct _i2c_m_sync_device *const i2c_dev);
+
+/**
+ * \brief Enable I2C module
+ *
+ * This function does low level I2C enable.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_sync_enable(struct _i2c_m_sync_device *const i2c_dev);
+
+/**
+ * \brief Disable I2C module
+ *
+ * This function does low level I2C disable.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_sync_disable(struct _i2c_m_sync_device *const i2c_dev);
+
+/**
+ * \brief Transfer data by I2C
+ *
+ * This function does low level I2C data transfer.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ * \param[in] msg The pointer to i2c msg structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_sync_transfer(struct _i2c_m_sync_device *const i2c_dev, struct _i2c_m_msg *msg);
+
+/**
+ * \brief Set baud rate of I2C
+ *
+ * This function does low level I2C set baud rate.
+ *
+ * \param[in] i2c_dev The pointer to i2c device structure
+ * \param[in] clkrate The clock rate(KHz) input to i2c module
+ * \param[in] baudrate The demand baud rate(KHz) of i2c module
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_sync_set_baudrate(struct _i2c_m_sync_device *const i2c_dev, uint32_t clkrate, uint32_t baudrate);
+
+/**
+ * \brief Send send condition on the I2C bus
+ *
+ * This function will generate a stop condition on the I2C bus
+ *
+ * \param[in] i2c_dev The pointer to i2c device struct
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_m_sync_send_stop(struct _i2c_m_sync_device *const i2c_dev);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/watch-library/hal/include/hpl_i2c_s_async.h b/watch-library/hal/include/hpl_i2c_s_async.h
new file mode 100644
index 00000000..92a5765d
--- /dev/null
+++ b/watch-library/hal/include/hpl_i2c_s_async.h
@@ -0,0 +1,184 @@
+/**
+ * \file
+ *
+ * \brief I2C Slave Hardware Proxy Layer(HPL) declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+#ifndef _HPL_I2C_S_ASYNC_H_INCLUDED
+#define _HPL_I2C_S_ASYNC_H_INCLUDED
+
+#include "hpl_i2c_s_sync.h"
+#include "hpl_irq.h"
+#include "utils.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief i2c callback types
+ */
+enum _i2c_s_async_callback_type { I2C_S_DEVICE_ERROR, I2C_S_DEVICE_TX, I2C_S_DEVICE_RX_COMPLETE };
+
+/**
+ * \brief Forward declaration of I2C Slave device
+ */
+struct _i2c_s_async_device;
+
+/**
+ * \brief i2c slave callback function type
+ */
+typedef void (*_i2c_s_async_cb_t)(struct _i2c_s_async_device *device);
+
+/**
+ * \brief i2c slave callback pointers structure
+ */
+struct _i2c_s_async_callback {
+ void (*error)(struct _i2c_s_async_device *const device);
+ void (*tx)(struct _i2c_s_async_device *const device);
+ void (*rx_done)(struct _i2c_s_async_device *const device, const uint8_t data);
+};
+
+/**
+ * \brief i2c slave device structure
+ */
+struct _i2c_s_async_device {
+ void * hw;
+ struct _i2c_s_async_callback cb;
+ struct _irq_descriptor irq;
+};
+
+/**
+ * \name HPL functions
+ */
+
+/**
+ * \brief Initialize asynchronous I2C slave
+ *
+ * This function does low level I2C configuration.
+ *
+ * \param[in] device The pointer to i2c interrupt device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_async_init(struct _i2c_s_async_device *const device, void *const hw);
+
+/**
+ * \brief Deinitialize asynchronous I2C in interrupt mode
+ *
+ * \param[in] device The pointer to i2c device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_async_deinit(struct _i2c_s_async_device *const device);
+
+/**
+ * \brief Enable I2C module
+ *
+ * This function does low level I2C enable.
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_async_enable(struct _i2c_s_async_device *const device);
+
+/**
+ * \brief Disable I2C module
+ *
+ * This function does low level I2C disable.
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_async_disable(struct _i2c_s_async_device *const device);
+
+/**
+ * \brief Check if 10-bit addressing mode is on
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Cheking status
+ * \retval 1 10-bit addressing mode is on
+ * \retval 0 10-bit addressing mode is off
+ */
+int32_t _i2c_s_async_is_10bit_addressing_on(const struct _i2c_s_async_device *const device);
+
+/**
+ * \brief Set I2C slave address
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ * \param[in] address Address to set
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_async_set_address(struct _i2c_s_async_device *const device, const uint16_t address);
+
+/**
+ * \brief Write a byte to the given I2C instance
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ * \param[in] data Data to write
+ */
+void _i2c_s_async_write_byte(struct _i2c_s_async_device *const device, const uint8_t data);
+
+/**
+ * \brief Retrieve I2C slave status
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ *\return I2C slave status
+ */
+i2c_s_status_t _i2c_s_async_get_status(const struct _i2c_s_async_device *const device);
+
+/**
+ * \brief Abort data transmission
+ *
+ * \param[in] device The pointer to i2c device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_async_abort_transmission(const struct _i2c_s_async_device *const device);
+
+/**
+ * \brief Enable/disable I2C slave interrupt
+ *
+ * param[in] device The pointer to I2C slave device instance
+ * param[in] type The type of interrupt to disable/enable if applicable
+ * param[in] disable Enable or disable
+ */
+int32_t _i2c_s_async_set_irq_state(struct _i2c_s_async_device *const device, const enum _i2c_s_async_callback_type type,
+ const bool disable);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _HPL_I2C_S_ASYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_i2c_s_sync.h b/watch-library/hal/include/hpl_i2c_s_sync.h
new file mode 100644
index 00000000..93b59345
--- /dev/null
+++ b/watch-library/hal/include/hpl_i2c_s_sync.h
@@ -0,0 +1,184 @@
+/**
+ * \file
+ *
+ * \brief I2C Slave Hardware Proxy Layer(HPL) declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+#ifndef _HPL_I2C_S_SYNC_H_INCLUDED
+#define _HPL_I2C_S_SYNC_H_INCLUDED
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief I2C Slave status type
+ */
+typedef uint32_t i2c_s_status_t;
+
+/**
+ * \brief i2c slave device structure
+ */
+struct _i2c_s_sync_device {
+ void *hw;
+};
+
+#include <compiler.h>
+
+/**
+ * \name HPL functions
+ */
+
+/**
+ * \brief Initialize synchronous I2C slave
+ *
+ * This function does low level I2C configuration.
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_sync_init(struct _i2c_s_sync_device *const device, void *const hw);
+
+/**
+ * \brief Deinitialize synchronous I2C slave
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_sync_deinit(struct _i2c_s_sync_device *const device);
+
+/**
+ * \brief Enable I2C module
+ *
+ * This function does low level I2C enable.
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_sync_enable(struct _i2c_s_sync_device *const device);
+
+/**
+ * \brief Disable I2C module
+ *
+ * This function does low level I2C disable.
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_sync_disable(struct _i2c_s_sync_device *const device);
+
+/**
+ * \brief Check if 10-bit addressing mode is on
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Cheking status
+ * \retval 1 10-bit addressing mode is on
+ * \retval 0 10-bit addressing mode is off
+ */
+int32_t _i2c_s_sync_is_10bit_addressing_on(const struct _i2c_s_sync_device *const device);
+
+/**
+ * \brief Set I2C slave address
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ * \param[in] address Address to set
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_sync_set_address(struct _i2c_s_sync_device *const device, const uint16_t address);
+
+/**
+ * \brief Write a byte to the given I2C instance
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ * \param[in] data Data to write
+ */
+void _i2c_s_sync_write_byte(struct _i2c_s_sync_device *const device, const uint8_t data);
+
+/**
+ * \brief Retrieve I2C slave status
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ *\return I2C slave status
+ */
+i2c_s_status_t _i2c_s_sync_get_status(const struct _i2c_s_sync_device *const device);
+
+/**
+ * \brief Clear the Data Ready interrupt flag
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Return 0 for success and negative value for error
+ */
+int32_t _i2c_s_sync_clear_data_ready_flag(const struct _i2c_s_sync_device *const device);
+
+/**
+ * \brief Read a byte from the given I2C instance
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Data received via I2C interface.
+ */
+uint8_t _i2c_s_sync_read_byte(const struct _i2c_s_sync_device *const device);
+
+/**
+ * \brief Check if I2C is ready to send next byte
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Status of the ready check.
+ * \retval true if the I2C is ready to send next byte
+ * \retval false if the I2C is not ready to send next byte
+ */
+bool _i2c_s_sync_is_byte_sent(const struct _i2c_s_sync_device *const device);
+
+/**
+ * \brief Check if there is data received by I2C
+ *
+ * \param[in] device The pointer to i2c slave device structure
+ *
+ * \return Status of the data received check.
+ * \retval true if the I2C has received a byte
+ * \retval false if the I2C has not received a byte
+ */
+bool _i2c_s_sync_is_byte_received(const struct _i2c_s_sync_device *const device);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _HPL_I2C_S_SYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_init.h b/watch-library/hal/include/hpl_init.h
new file mode 100644
index 00000000..71bf49c9
--- /dev/null
+++ b/watch-library/hal/include/hpl_init.h
@@ -0,0 +1,124 @@
+/**
+ * \file
+ *
+ * \brief Init related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_INIT_H_INCLUDED
+#define _HPL_INIT_H_INCLUDED
+
+/**
+ * \addtogroup HPL Init
+ *
+ * \section hpl_init_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initializes clock sources
+ */
+void _sysctrl_init_sources(void);
+
+/**
+ * \brief Initializes Power Manager
+ */
+void _pm_init(void);
+
+/**
+ * \brief Initialize generators
+ */
+void _gclk_init_generators(void);
+
+/**
+ * \brief Initialize 32 kHz clock sources
+ */
+void _osc32kctrl_init_sources(void);
+
+/**
+ * \brief Initialize clock sources
+ */
+void _oscctrl_init_sources(void);
+
+/**
+ * \brief Initialize clock sources that need input reference clocks
+ */
+void _sysctrl_init_referenced_generators(void);
+
+/**
+ * \brief Initialize clock sources that need input reference clocks
+ */
+void _oscctrl_init_referenced_generators(void);
+
+/**
+ * \brief Initialize master clock generator
+ */
+void _mclk_init(void);
+
+/**
+ * \brief Initialize clock generator
+ */
+void _lpmcu_misc_regs_init(void);
+
+/**
+ * \brief Initialize clock generator
+ */
+void _pmc_init(void);
+
+/**
+ * \brief Set performance level
+ *
+ * \param[in] level The performance level to set
+ */
+void _set_performance_level(const uint8_t level);
+
+/**
+ * \brief Initialize the chip
+ */
+void _init_chip(void);
+
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_INIT_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_irq.h b/watch-library/hal/include/hpl_irq.h
new file mode 100644
index 00000000..2894944a
--- /dev/null
+++ b/watch-library/hal/include/hpl_irq.h
@@ -0,0 +1,116 @@
+/**
+ * \file
+ *
+ * \brief IRQ related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_IRQ_H_INCLUDED
+#define _HPL_IRQ_H_INCLUDED
+
+/**
+ * \addtogroup HPL IRQ
+ *
+ * \section hpl_irq_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief IRQ descriptor
+ */
+struct _irq_descriptor {
+ void (*handler)(void *parameter);
+ void *parameter;
+};
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Retrieve current IRQ number
+ *
+ * \return The current IRQ number
+ */
+uint8_t _irq_get_current(void);
+
+/**
+ * \brief Disable the given IRQ
+ *
+ * \param[in] n The number of IRQ to disable
+ */
+void _irq_disable(uint8_t n);
+
+/**
+ * \brief Set the given IRQ
+ *
+ * \param[in] n The number of IRQ to set
+ */
+void _irq_set(uint8_t n);
+
+/**
+ * \brief Clear the given IRQ
+ *
+ * \param[in] n The number of IRQ to clear
+ */
+void _irq_clear(uint8_t n);
+
+/**
+ * \brief Enable the given IRQ
+ *
+ * \param[in] n The number of IRQ to enable
+ */
+void _irq_enable(uint8_t n);
+
+/**
+ * \brief Register IRQ handler
+ *
+ * \param[in] number The number registered IRQ
+ * \param[in] irq The pointer to irq handler to register
+ *
+ * \return The status of IRQ handler registering
+ * \retval -1 Passed parameters were invalid
+ * \retval 0 The registering is completed successfully
+ */
+void _irq_register(const uint8_t number, struct _irq_descriptor *const irq);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_IRQ_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_missing_features.h b/watch-library/hal/include/hpl_missing_features.h
new file mode 100644
index 00000000..7071db29
--- /dev/null
+++ b/watch-library/hal/include/hpl_missing_features.h
@@ -0,0 +1,37 @@
+/**
+ * \file
+ *
+ * \brief Family-dependent missing features expected by HAL
+ *
+ * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_MISSING_FEATURES
+#define _HPL_MISSING_FEATURES
+
+#endif /* _HPL_MISSING_FEATURES */
diff --git a/watch-library/hal/include/hpl_pwm.h b/watch-library/hal/include/hpl_pwm.h
new file mode 100644
index 00000000..ea056dea
--- /dev/null
+++ b/watch-library/hal/include/hpl_pwm.h
@@ -0,0 +1,105 @@
+/**
+ * \file
+ *
+ * \brief PWM related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+#ifndef _HPL_PWM_H_INCLUDED
+#define _HPL_PWM_H_INCLUDED
+
+/**
+ * \addtogroup HPL PWM
+ *
+ * \section hpl_pwm_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <compiler.h>
+#include "hpl_irq.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief PWM callback types
+ */
+enum _pwm_callback_type { PWM_DEVICE_PERIOD_CB, PWM_DEVICE_ERROR_CB };
+
+/**
+ * \brief PWM pulse-width period
+ */
+typedef uint32_t pwm_period_t;
+
+/**
+ * \brief PWM device structure
+ *
+ * The PWM device structure forward declaration.
+ */
+struct _pwm_device;
+
+/**
+ * \brief PWM interrupt callbacks
+ */
+struct _pwm_callback {
+ void (*pwm_period_cb)(struct _pwm_device *device);
+ void (*pwm_error_cb)(struct _pwm_device *device);
+};
+
+/**
+ * \brief PWM descriptor device structure
+ */
+struct _pwm_device {
+ struct _pwm_callback callback;
+ struct _irq_descriptor irq;
+ void * hw;
+};
+
+/**
+ * \brief PWM functions, pointers to low-level functions
+ */
+struct _pwm_hpl_interface {
+ int32_t (*init)(struct _pwm_device *const device, void *const hw);
+ void (*deinit)(struct _pwm_device *const device);
+ void (*start_pwm)(struct _pwm_device *const device);
+ void (*stop_pwm)(struct _pwm_device *const device);
+ void (*set_pwm_param)(struct _pwm_device *const device, const pwm_period_t period, const pwm_period_t duty_cycle);
+ bool (*is_pwm_enabled)(const struct _pwm_device *const device);
+ pwm_period_t (*pwm_get_period)(const struct _pwm_device *const device);
+ uint32_t (*pwm_get_duty)(const struct _pwm_device *const device);
+ void (*set_irq_state)(struct _pwm_device *const device, const enum _pwm_callback_type type, const bool disable);
+};
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_PWM_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_reset.h b/watch-library/hal/include/hpl_reset.h
new file mode 100644
index 00000000..75738b6f
--- /dev/null
+++ b/watch-library/hal/include/hpl_reset.h
@@ -0,0 +1,92 @@
+/**
+ * \file
+ *
+ * \brief Reset related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_RESET_H_INCLUDED
+#define _HPL_RESET_H_INCLUDED
+
+/**
+ * \addtogroup HPL Reset
+ *
+ * \section hpl_reset_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#ifndef _UNIT_TEST_
+#include <compiler.h>
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Reset reason enumeration
+ *
+ * The list of possible reset reasons.
+ */
+enum reset_reason {
+ RESET_REASON_POR = 1,
+ RESET_REASON_BOD12 = 2,
+ RESET_REASON_BOD33 = 4,
+ RESET_REASON_EXT = 16,
+ RESET_REASON_WDT = 32,
+ RESET_REASON_SYST = 64,
+ RESET_REASON_BACKUP = 128
+};
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Retrieve the reset reason
+ *
+ * Retrieves the reset reason of the last MCU reset.
+ *
+ *\return An enum value indicating the reason of the last reset.
+ */
+enum reset_reason _get_reset_reason(void);
+
+/**
+ * \brief Reset MCU
+ */
+void _reset_mcu(void);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_RESET_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_slcd.h b/watch-library/hal/include/hpl_slcd.h
new file mode 100644
index 00000000..f3ccbbcd
--- /dev/null
+++ b/watch-library/hal/include/hpl_slcd.h
@@ -0,0 +1,49 @@
+/**
+ * \file
+ *
+ * \brief SLCD common declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef HPL_SLCD_H_INCLUDED
+#define HPL_SLCD_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SLCD_SEGID(com, seg) (((com) << 16) | (seg))
+#define SLCD_COMNUM(segid) (((segid) >> 16) & 0xFF)
+#define SLCD_SEGNUM(segid) ((segid)&0xFF)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HPL_SLCD_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_slcd_sync.h b/watch-library/hal/include/hpl_slcd_sync.h
new file mode 100644
index 00000000..2f5a05d7
--- /dev/null
+++ b/watch-library/hal/include/hpl_slcd_sync.h
@@ -0,0 +1,154 @@
+/**
+ * \file
+ *
+ * \brief SLCD Segment Liquid Crystal Display Controller(Sync) functionality
+ * declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef HPL_SLCD_SYNC_H_INCLUDED
+#define HPL_SLCD_SYNC_H_INCLUDED
+
+#include <hpl_slcd.h>
+#include <utils_assert.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief SLCD sync device structure
+ *
+ * The SLCD device structure forward declaration.
+ */
+struct _slcd_sync_device;
+
+struct _slcd_sync_device {
+ void *hw; /*!< Hardware module instance handler */
+};
+
+/**
+ * \brief Initialize SLCD Device Descriptor
+ *
+ * \param[in] desc SLCD descriptor to be initialized
+ * \param[in] hw The pointer to hardware instance
+ */
+int32_t _slcd_sync_init(struct _slcd_sync_device *const dev, void *const hw);
+
+/**
+ * \brief Deinitialize SLCD Device Descriptor
+ *
+ * \param[in] desc SLCD device descriptor to be deinitialized
+ */
+int32_t _slcd_sync_deinit(struct _slcd_sync_device *const dev);
+
+/**
+ * \brief Enable SLCD driver
+ *
+ * \param[in] dev SLCD device descriptor to be enabled
+ */
+int32_t _slcd_sync_enable(struct _slcd_sync_device *const dev);
+
+/**
+ * \brief Disable SLCD driver
+ *
+ * \param[in] dev SLCD Device descriptor to be disabled
+ */
+int32_t _slcd_sync_disable(struct _slcd_sync_device *const dev);
+
+/**
+ * \brief Turn on a Segment
+ *
+ * \param[in] dev SLCD Device descriptor
+ * \param[in] seg Segment id
+ * value is (common terminals << 16 | segment terminal)
+ */
+int32_t _slcd_sync_seg_on(struct _slcd_sync_device *const dev, uint32_t seg);
+
+/**
+ * \brief Turn off a Segment
+ *
+ * \param[in] dev SLCD Device descriptor
+ * \param[in] seg Segment id
+ * value is (common terminals << 16 | segment terminal)
+ */
+int32_t _slcd_sync_seg_off(struct _slcd_sync_device *const dev, uint32_t seg);
+
+/**
+ * \brief Blink a Segment
+ *
+ * \param[in] dev SLCD Device descriptor
+ * \param[in] seg Segment index
+ * value is (common terminals << 16 | segment terminal)
+ * \param[in] period Blink period, unit is million second
+ */
+int32_t _slcd_sync_seg_blink(struct _slcd_sync_device *const dev, uint32_t seg, const uint32_t period);
+
+/**
+ * \brief Displays a character
+ *
+ * \param[in] dev SLCD Device descriptor
+ * \param[in] character Character to be displayed
+ * \param[in] index Index of Character Mapping Group
+ */
+int32_t _slcd_sync_write_char(struct _slcd_sync_device *const dev, const uint8_t character, uint32_t index);
+
+/**
+ * \brief Start animation play by a segment array
+ *
+ * \param[in] dev SLCD Device descriptor
+ * \param[in] segs Segment array
+ * \param[in] len Length of the segment array
+ * \param[in] period Period(milliseconds) of the each segment to animation
+ */
+int32_t _slcd_sync_start_animation(struct _slcd_sync_device *const dev, const uint32_t segs[], uint32_t len,
+ const uint32_t period);
+
+/**
+ * \brief Stop animation play by a segment array
+ *
+ * \param[in] dev SLCD device descriptor
+ * \param[in] segs Segment array
+ * \param[in] len Length of the segment array
+ */
+int32_t _slcd_sync_stop_animation(struct _slcd_sync_device *const dev, const uint32_t segs[], uint32_t len);
+
+/**
+ * \brief Set animation Frequency
+ *
+ * \param[in] dev SLCD Device descriptor
+ * \param[in] period Period(million second) of the each segment to animation
+ */
+int32_t _slcd_sync_set_animation_period(struct _slcd_sync_device *const dev, const uint32_t period);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/watch-library/hal/include/hpl_sleep.h b/watch-library/hal/include/hpl_sleep.h
new file mode 100644
index 00000000..6731ec30
--- /dev/null
+++ b/watch-library/hal/include/hpl_sleep.h
@@ -0,0 +1,88 @@
+/**
+ * \file
+ *
+ * \brief Sleep related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SLEEP_H_INCLUDED
+#define _HPL_SLEEP_H_INCLUDED
+
+/**
+ * \addtogroup HPL Sleep
+ *
+ * \section hpl_sleep_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#ifndef _UNIT_TEST_
+#include <compiler.h>
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Set the sleep mode for the device
+ *
+ * This function sets the sleep mode for the device.
+ * For an overview of which systems are disabled in sleep for the different
+ * sleep modes see datasheet.
+ *
+ * \param[in] mode Sleep mode to use
+ *
+ * \return the status of a sleep request
+ * \retval -1 The requested sleep mode was invalid
+ * \retval 0 The operation completed successfully, sleep mode is set
+ */
+int32_t _set_sleep_mode(const uint8_t mode);
+
+/**
+ * \brief Reset MCU
+ */
+void _reset_mcu(void);
+
+/**
+ * \brief Put MCU to sleep
+ */
+void _go_to_sleep(void);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_SLEEP_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_spi.h b/watch-library/hal/include/hpl_spi.h
new file mode 100644
index 00000000..a5652e50
--- /dev/null
+++ b/watch-library/hal/include/hpl_spi.h
@@ -0,0 +1,163 @@
+/**
+ * \file
+ *
+ * \brief SPI related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SPI_H_INCLUDED
+#define _HPL_SPI_H_INCLUDED
+
+#include <compiler.h>
+#include <utils.h>
+
+/**
+ * \addtogroup hpl_spi HPL SPI
+ *
+ *@{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief SPI Dummy char is used when reading data from the SPI slave
+ */
+#define SPI_DUMMY_CHAR 0x1ff
+
+/**
+ * \brief SPI message to let driver to process
+ */
+//@{
+struct spi_msg {
+ /** Pointer to the output data buffer */
+ uint8_t *txbuf;
+ /** Pointer to the input data buffer */
+ uint8_t *rxbuf;
+ /** Size of the message data in SPI characters */
+ uint32_t size;
+};
+//@}
+
+/**
+ * \brief SPI transfer modes
+ * SPI transfer mode controls clock polarity and clock phase.
+ * Mode 0: leading edge is rising edge, data sample on leading edge.
+ * Mode 1: leading edge is rising edge, data sample on trailing edge.
+ * Mode 2: leading edge is falling edge, data sample on leading edge.
+ * Mode 3: leading edge is falling edge, data sample on trailing edge.
+ */
+enum spi_transfer_mode {
+ /** Leading edge is rising edge, data sample on leading edge. */
+ SPI_MODE_0,
+ /** Leading edge is rising edge, data sample on trailing edge. */
+ SPI_MODE_1,
+ /** Leading edge is falling edge, data sample on leading edge. */
+ SPI_MODE_2,
+ /** Leading edge is falling edge, data sample on trailing edge. */
+ SPI_MODE_3
+};
+
+/**
+ * \brief SPI character sizes
+ * The character size influence the way the data is sent/received.
+ * For char size <= 8 data is stored byte by byte.
+ * For char size between 9 ~ 16 data is stored in 2-byte length.
+ * Note that the default and recommended char size is 8 bit since it's
+ * supported by all system.
+ */
+enum spi_char_size {
+ /** Character size is 8 bit. */
+ SPI_CHAR_SIZE_8 = 0,
+ /** Character size is 9 bit. */
+ SPI_CHAR_SIZE_9 = 1,
+ /** Character size is 10 bit. */
+ SPI_CHAR_SIZE_10 = 2,
+ /** Character size is 11 bit. */
+ SPI_CHAR_SIZE_11 = 3,
+ /** Character size is 12 bit. */
+ SPI_CHAR_SIZE_12 = 4,
+ /** Character size is 13 bit. */
+ SPI_CHAR_SIZE_13 = 5,
+ /** Character size is 14 bit. */
+ SPI_CHAR_SIZE_14 = 6,
+ /** Character size is 15 bit. */
+ SPI_CHAR_SIZE_15 = 7,
+ /** Character size is 16 bit. */
+ SPI_CHAR_SIZE_16 = 8
+};
+
+/**
+ * \brief SPI data order
+ */
+enum spi_data_order {
+ /** MSB goes first. */
+ SPI_DATA_ORDER_MSB_1ST = 0,
+ /** LSB goes first. */
+ SPI_DATA_ORDER_LSB_1ST = 1
+};
+
+/** \brief Transfer descriptor for SPI
+ * Transfer descriptor holds TX and RX buffers
+ */
+struct spi_xfer {
+ /** Pointer to data buffer to TX */
+ uint8_t *txbuf;
+ /** Pointer to data buffer to RX */
+ uint8_t *rxbuf;
+ /** Size of data characters to TX & RX */
+ uint32_t size;
+};
+
+/** SPI generic driver. */
+struct spi_dev {
+ /** Pointer to the hardware base or private data for special device. */
+ void *prvt;
+ /** Reference start of sync/async variables */
+ uint32_t sync_async_misc[1];
+};
+
+/**
+ * \brief Calculate the baudrate value for hardware to use to set baudrate
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] clk Clock frequency (Hz) for baudrate generation.
+ * \param[in] baud Target baudrate (bps).
+ * \return Error or baudrate value.
+ * \retval >0 Baudrate value.
+ * \retval ERR_INVALID_ARG Calculation fail.
+ */
+int32_t _spi_calc_baud_val(struct spi_dev *dev, const uint32_t clk, const uint32_t baud);
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+#endif /* ifndef _HPL_SPI_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_spi_async.h b/watch-library/hal/include/hpl_spi_async.h
new file mode 100644
index 00000000..8e5a8485
--- /dev/null
+++ b/watch-library/hal/include/hpl_spi_async.h
@@ -0,0 +1,131 @@
+/**
+ * \file
+ *
+ * \brief Common SPI related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SPI_ASYNC_H_INCLUDED
+#define _HPL_SPI_ASYNC_H_INCLUDED
+
+#include <hpl_spi.h>
+#include <hpl_irq.h>
+
+/**
+ * \addtogroup hpl_spi HPL SPI
+ *
+ *@{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Callbacks the SPI driver must offer in async mode
+ */
+//@{
+/** The callback types */
+enum _spi_async_dev_cb_type {
+ /** Callback type for transmit, see \ref _spi_async_dev_cb_xfer_t. */
+ SPI_DEV_CB_TX,
+ /** Callback type for receive, see \ref _spi_async_dev_cb_xfer_t. */
+ SPI_DEV_CB_RX,
+ /** Callback type for \ref _spi_async_dev_cb_complete_t. */
+ SPI_DEV_CB_COMPLETE,
+ /** Callback type for error */
+ SPI_DEV_CB_ERROR,
+ /** Number of callbacks. */
+ SPI_DEV_CB_N
+};
+
+struct _spi_async_dev;
+
+/** \brief The prototype for callback on SPI transfer error.
+ * If status code is zero, it indicates the normal completion, that is,
+ * SS deactivation.
+ * If status code belows zero, it indicates complete.
+ */
+typedef void (*_spi_async_dev_cb_error_t)(struct _spi_async_dev *dev, int32_t status);
+
+/** \brief The prototype for callback on SPI transmit/receive event
+ * For TX, the callback is invoked when transmit is done or ready to start
+ * transmit.
+ * For RX, the callback is invoked when receive is done or ready to read data,
+ * see \ref _spi_async_dev_read_one_t on data reading.
+ * Without DMA enabled, the callback is invoked on each character event.
+ * With DMA enabled, the callback is invoked on DMA buffer done.
+ */
+typedef void (*_spi_async_dev_cb_xfer_t)(struct _spi_async_dev *dev);
+
+/**
+ * \brief The callbacks offered by SPI driver
+ */
+struct _spi_async_dev_callbacks {
+ /** TX callback, see \ref _spi_async_dev_cb_xfer_t. */
+ _spi_async_dev_cb_xfer_t tx;
+ /** RX callback, see \ref _spi_async_dev_cb_xfer_t. */
+ _spi_async_dev_cb_xfer_t rx;
+ /** Complete or complete callback, see \ref _spi_async_dev_cb_complete_t. */
+ _spi_async_dev_cb_xfer_t complete;
+ /** Error callback, see \ref */
+ _spi_async_dev_cb_error_t err;
+};
+//@}
+
+/**
+ * \brief SPI async driver
+ */
+//@{
+
+/** SPI driver to support async HAL */
+struct _spi_async_dev {
+ /** Pointer to the hardware base or private data for special device. */
+ void *prvt;
+ /** Data size, number of bytes for each character */
+ uint8_t char_size;
+ /** Dummy byte used in master mode when reading the slave */
+ uint16_t dummy_byte;
+
+ /** \brief Pointer to callback functions, ignored for polling mode
+ * Pointer to the callback functions so that initialize the driver to
+ * handle interrupts.
+ */
+ struct _spi_async_dev_callbacks callbacks;
+ /** IRQ instance for SPI device. */
+ struct _irq_descriptor irq;
+};
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+#endif /* ifndef _HPL_SPI_ASYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_spi_m_async.h b/watch-library/hal/include/hpl_spi_m_async.h
new file mode 100644
index 00000000..8d3555ed
--- /dev/null
+++ b/watch-library/hal/include/hpl_spi_m_async.h
@@ -0,0 +1,243 @@
+/**
+ * \file
+ *
+ * \brief SPI Slave Async related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SPI_M_ASYNC_H_INCLUDED
+#define _HPL_SPI_M_ASYNC_H_INCLUDED
+
+#include <hpl_spi.h>
+#include <hpl_spi_async.h>
+
+/**
+ * \addtogroup hpl_spi HPL SPI
+ *
+ *
+ *@{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Uses common SPI async device driver. */
+#define _spi_m_async_dev _spi_async_dev
+
+#define _spi_m_async_dev_cb_type _spi_async_dev_cb_type
+
+/** Uses common SPI async device driver complete callback type. */
+#define _spi_m_async_dev_cb_error_t _spi_async_dev_cb_error_t
+
+/** Uses common SPI async device driver transfer callback type. */
+#define _spi_m_async_dev_cb_xfer_t _spi_async_dev_cb_xfer_t
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize SPI for access with interrupts
+ * It will load default hardware configuration and software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] hw Pointer to the hardware base.
+ * \retval ERR_INVALID_ARG Input parameter problem.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval ERR_DENIED SPI has been enabled.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_async_init(struct _spi_m_async_dev *dev, void *const hw);
+
+/**
+ * \brief Initialize SPI for access with interrupts
+ * Disable, reset the hardware and the software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_async_deinit(struct _spi_m_async_dev *dev);
+
+/**
+ * \brief Enable SPI for access with interrupts
+ * Enable the SPI and enable callback generation of receive and error
+ * interrupts.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG Input parameter problem.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_async_enable(struct _spi_m_async_dev *dev);
+
+/**
+ * \brief Disable SPI for access without interrupts
+ * Disable SPI and interrupts. Deactivate all CS pins if works as master.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_async_disable(struct _spi_m_async_dev *dev);
+
+/**
+ * \brief Set SPI transfer mode
+ * Set SPI transfer mode (\ref spi_transfer_mode),
+ * which controls clock polarity and clock phase.
+ * Mode 0: leading edge is rising edge, data sample on leading edge.
+ * Mode 1: leading edge is rising edge, data sample on trailing edge.
+ * Mode 2: leading edge is falling edge, data sample on leading edge.
+ * Mode 3: leading edge is falling edge, data sample on trailing edge.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] mode The SPI transfer mode.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_async_set_mode(struct _spi_m_async_dev *dev, const enum spi_transfer_mode mode);
+
+/**
+ * \brief Set SPI baudrate
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] baud_val The SPI baudrate value, see \ref _spi_calc_baud_val() on
+ * how it's generated.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_async_set_baudrate(struct _spi_m_async_dev *dev, const uint32_t baud_val);
+
+/**
+ * \brief Set SPI baudrate
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] char_size The character size, see \ref spi_char_size.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_async_set_char_size(struct _spi_m_async_dev *dev, const enum spi_char_size char_size);
+
+/**
+ * \brief Set SPI data order
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] dord SPI data order (LSB/MSB first).
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_async_set_data_order(struct _spi_m_async_dev *dev, const enum spi_data_order dord);
+
+/**
+ * \brief Enable interrupt on character output
+ *
+ * Enable interrupt when a new character can be written
+ * to the SPI device.
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ * \param[in] state true = enable output interrupt
+ * false = disable output interrupt
+ *
+ * \return Status code
+ * \retval 0 Ok status
+ */
+int32_t _spi_m_async_enable_tx(struct _spi_m_async_dev *dev, bool state);
+
+/**
+ * \brief Enable interrupt on character input
+ *
+ * Enable interrupt when a new character is ready to be
+ * read from the SPI device.
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ * \param[in] state true = enable input interrupts
+ * false = disable input interrupt
+ *
+ * \return Status code
+ * \retvat 0 OK Status
+ */
+int32_t _spi_m_async_enable_rx(struct _spi_m_async_dev *dev, bool state);
+
+/**
+ * \brief Enable interrupt on after data transmission complate
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ * \param[in] state true = enable input interrupts
+ * false = disable input interrupt
+ *
+ * \return Status code
+ * \retvat 0 OK Status
+ */
+int32_t _spi_m_async_enable_tx_complete(struct _spi_m_async_dev *dev, bool state);
+
+/**
+ * \brief Read one character to SPI device instance
+ * \param[in, out] dev Pointer to the SPI device instance.
+ *
+ * \return Character read from SPI module
+ */
+uint16_t _spi_m_async_read_one(struct _spi_m_async_dev *dev);
+
+/**
+ * \brief Write one character to assigned buffer
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] data
+ *
+ * \return Status code of write operation
+ * \retval 0 Write operation OK
+ */
+int32_t _spi_m_async_write_one(struct _spi_m_async_dev *dev, uint16_t data);
+
+/**
+ * \brief Register the SPI device callback
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] cb_type The callback type.
+ * \param[in] func The callback function to register. NULL to disable callback.
+ * \return Always 0.
+ */
+int32_t _spi_m_async_register_callback(struct _spi_m_async_dev *dev, const enum _spi_m_async_dev_cb_type cb_type,
+ const FUNC_PTR func);
+
+/**
+ * \brief Enable/disable SPI master interrupt
+ *
+ * param[in] device The pointer to SPI master device instance
+ * param[in] type The type of interrupt to disable/enable if applicable
+ * param[in] state Enable or disable
+ */
+void _spi_m_async_set_irq_state(struct _spi_m_async_dev *const device, const enum _spi_m_async_dev_cb_type type,
+ const bool state);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+#endif /* ifndef _HPL_SPI_M_ASYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_spi_m_dma.h b/watch-library/hal/include/hpl_spi_m_dma.h
new file mode 100644
index 00000000..2b48300e
--- /dev/null
+++ b/watch-library/hal/include/hpl_spi_m_dma.h
@@ -0,0 +1,182 @@
+/**
+ * \file
+ *
+ * \brief SPI Master DMA related functionality declaration.
+ *
+ * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SPI_M_DMA_H_INCLUDED
+#define _HPL_SPI_M_DMA_H_INCLUDED
+
+#include <hpl_spi.h>
+#include <hpl_spi_dma.h>
+
+/**
+ * \addtogroup hpl_spi HPL SPI
+ *
+ *
+ *@{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Uses common SPI dma device driver. */
+#define _spi_m_dma_dev _spi_dma_dev
+
+#define _spi_m_dma_dev_cb_type _spi_dma_dev_cb_type
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize SPI for access with interrupts
+ * It will load default hardware configuration and software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] hw Pointer to the hardware base.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG Input parameter problem.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval ERR_DENIED SPI has been enabled.
+ * \retval 0 ERR_NONE is operation done successfully.
+ */
+int32_t _spi_m_dma_init(struct _spi_m_dma_dev *dev, void *const hw);
+
+/**
+ * \brief Initialize SPI for access with interrupts
+ * Disable, reset the hardware and the software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 ERR_NONE is operation done successfully.
+ */
+int32_t _spi_m_dma_deinit(struct _spi_m_dma_dev *dev);
+
+/**
+ * \brief Enable SPI for access with interrupts
+ * Enable the SPI and enable callback generation of receive and error
+ * interrupts.
+ * \param[in] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG Input parameter problem.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval 0 ERR_NONE is operation done successfully.
+ */
+int32_t _spi_m_dma_enable(struct _spi_m_dma_dev *dev);
+
+/**
+ * \brief Disable SPI for access without interrupts
+ * Disable SPI and interrupts. Deactivate all CS pins if works as master.
+ * \param[in] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 ERR_NONE is operation done successfully.
+ */
+int32_t _spi_m_dma_disable(struct _spi_m_dma_dev *dev);
+
+/**
+ * \brief Set SPI transfer mode
+ * Set SPI transfer mode (\ref spi_transfer_mode),
+ * which controls clock polarity and clock phase.
+ * Mode 0: leading edge is rising edge, data sample on leading edge.
+ * Mode 1: leading edge is rising edge, data sample on trailing edge.
+ * Mode 2: leading edge is falling edge, data sample on leading edge.
+ * Mode 3: leading edge is falling edge, data sample on trailing edge.
+ * \param[in] dev Pointer to the SPI device instance.
+ * \param[in] mode The SPI transfer mode.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 ERR_NONE is operation done successfully.
+ */
+int32_t _spi_m_dma_set_mode(struct _spi_m_dma_dev *dev, const enum spi_transfer_mode mode);
+
+/**
+ * \brief Set SPI baudrate
+ * \param[in] dev Pointer to the SPI device instance.
+ * \param[in] baud_val The SPI baudrate value, see \ref _spi_calc_baud_val() on
+ * how it's generated.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_dma_set_baudrate(struct _spi_m_dma_dev *dev, const uint32_t baud_val);
+
+/**
+ * \brief Set SPI baudrate
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] char_size The character size, see \ref spi_char_size.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_dma_set_char_size(struct _spi_m_dma_dev *dev, const enum spi_char_size char_size);
+
+/**
+ * \brief Set SPI data order
+ * \param[in] dev Pointer to the SPI device instance.
+ * \param[in] dord SPI data order (LSB/MSB first).
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_dma_set_data_order(struct _spi_m_dma_dev *dev, const enum spi_data_order dord);
+
+/**
+ * \brief Register the SPI device callback
+ * \param[in] dev Pointer to the SPI device instance.
+ * \param[in] cb_type The callback type.
+ * \param[in] func The callback function to register. NULL to disable callback.
+ * \return Always 0.
+ */
+void _spi_m_dma_register_callback(struct _spi_m_dma_dev *dev, enum _spi_dma_dev_cb_type, _spi_dma_cb_t func);
+
+/** \brief Do SPI data transfer (TX & RX) with DMA
+ * Log the TX & RX buffers and transfer them in background. It never blocks.
+ *
+ * \param[in] dev Pointer to the SPI device instance.
+ * \param[in] txbuf Pointer to the transfer information (\ref spi_transfer).
+ * \param[out] rxbuf Pointer to the receiver information (\ref spi_receive).
+ * \param[in] length spi transfer data length.
+ *
+ * \return Operation status.
+ * \retval ERR_NONE Success.
+ * \retval ERR_BUSY Busy.
+ */
+int32_t _spi_m_dma_transfer(struct _spi_m_dma_dev *dev, uint8_t const *txbuf, uint8_t *const rxbuf,
+ const uint16_t length);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+#endif /* ifndef _HPL_SPI_M_DMA_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_spi_m_sync.h b/watch-library/hal/include/hpl_spi_m_sync.h
new file mode 100644
index 00000000..38df15b4
--- /dev/null
+++ b/watch-library/hal/include/hpl_spi_m_sync.h
@@ -0,0 +1,166 @@
+/**
+ * \file
+ *
+ * \brief SPI related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SPI_M_SYNC_H_INCLUDED
+#define _HPL_SPI_M_SYNC_H_INCLUDED
+
+#include <hpl_spi.h>
+#include <hpl_spi_sync.h>
+
+/**
+ * \addtogroup hpl_spi HPL SPI
+ *
+ *@{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Uses common SPI sync device driver. */
+#define _spi_m_sync_dev _spi_sync_dev
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize SPI for access without interrupts
+ * It will load default hardware configuration and software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] hw Pointer to the hardware base.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG Input parameter problem.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval ERR_DENIED SPI has been enabled.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_sync_init(struct _spi_m_sync_dev *dev, void *const hw);
+
+/**
+ * \brief Deinitialize SPI
+ * Disable, reset the hardware and the software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_sync_deinit(struct _spi_m_sync_dev *dev);
+
+/**
+ * \brief Enable SPI for access without interrupts
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_sync_enable(struct _spi_m_sync_dev *dev);
+
+/**
+ * \brief Disable SPI for access without interrupts
+ * Disable SPI. Deactivate all CS pins if works as master.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_sync_disable(struct _spi_m_sync_dev *dev);
+
+/**
+ * \brief Set SPI transfer mode
+ * Set SPI transfer mode (\ref spi_transfer_mode),
+ * which controls clock polarity and clock phase.
+ * Mode 0: leading edge is rising edge, data sample on leading edge.
+ * Mode 1: leading edge is rising edge, data sample on trailing edge.
+ * Mode 2: leading edge is falling edge, data sample on leading edge.
+ * Mode 3: leading edge is falling edge, data sample on trailing edge.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] mode The SPI transfer mode.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_sync_set_mode(struct _spi_m_sync_dev *dev, const enum spi_transfer_mode mode);
+
+/**
+ * \brief Set SPI baudrate
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] baud_val The SPI baudrate value, see \ref _spi_calc_baud_val() on
+ * how it's generated.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_sync_set_baudrate(struct _spi_m_sync_dev *dev, const uint32_t baud_val);
+
+/**
+ * \brief Set SPI char size
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] char_size The character size, see \ref spi_char_size.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_sync_set_char_size(struct _spi_m_sync_dev *dev, const enum spi_char_size char_size);
+
+/**
+ * \brief Set SPI data order
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] dord SPI data order (LSB/MSB first).
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_m_sync_set_data_order(struct _spi_m_sync_dev *dev, const enum spi_data_order dord);
+
+/**
+ * \brief Transfer the whole message without interrupt
+ * Transfer the message, it will keep waiting until the message finish or
+ * error.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] msg Pointer to the message instance to process.
+ * \return Error or number of characters transferred.
+ * \retval ERR_BUSY SPI hardware is not ready to start transfer (not
+ * enabled, busy applying settings, ...).
+ * \retval SPI_ERR_OVERFLOW Overflow error.
+ * \retval >=0 Number of characters transferred.
+ */
+int32_t _spi_m_sync_trans(struct _spi_m_sync_dev *dev, const struct spi_msg *msg);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+#endif /* ifndef _HPL_SPI_M_SYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_spi_s_async.h b/watch-library/hal/include/hpl_spi_s_async.h
new file mode 100644
index 00000000..56472439
--- /dev/null
+++ b/watch-library/hal/include/hpl_spi_s_async.h
@@ -0,0 +1,232 @@
+/**
+ * \file
+ *
+ * \brief SPI Slave Async related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SPI_S_ASYNC_H_INCLUDED
+#define _HPL_SPI_S_ASYNC_H_INCLUDED
+
+#include <hpl_spi_async.h>
+
+/**
+ * \addtogroup hpl_spi HPL SPI
+ *
+ *
+ *@{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Uses common SPI async device driver. */
+#define _spi_s_async_dev _spi_async_dev
+
+#define _spi_s_async_dev_cb_type _spi_async_dev_cb_type
+
+/** Uses common SPI async device driver complete callback type. */
+#define _spi_m_async_dev_cb_error_t _spi_async_dev_cb_error_t
+
+/** Uses common SPI async device driver transfer callback type. */
+#define _spi_s_async_dev_cb_xfer_t _spi_async_dev_cb_xfer_t
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize SPI for access with interrupts
+ * It will load default hardware configuration and software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] hw Pointer to the hardware base.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG Input parameter problem.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval ERR_DENIED SPI has been enabled.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_async_init(struct _spi_s_async_dev *dev, void *const hw);
+
+/**
+ * \brief Initialize SPI for access with interrupts
+ * Disable, reset the hardware and the software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_async_deinit(struct _spi_s_async_dev *dev);
+
+/**
+ * \brief Enable SPI for access with interrupts
+ * Enable the SPI and enable callback generation of receive and error
+ * interrupts.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG Input parameter problem.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_async_enable(struct _spi_s_async_dev *dev);
+
+/**
+ * \brief Disable SPI for access without interrupts
+ * Disable SPI and interrupts. Deactivate all CS pins if works as master.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_async_disable(struct _spi_s_async_dev *dev);
+
+/**
+ * \brief Set SPI transfer mode
+ * Set SPI transfer mode (\ref spi_transfer_mode),
+ * which controls clock polarity and clock phase.
+ * Mode 0: leading edge is rising edge, data sample on leading edge.
+ * Mode 1: leading edge is rising edge, data sample on trailing edge.
+ * Mode 2: leading edge is falling edge, data sample on leading edge.
+ * Mode 3: leading edge is falling edge, data sample on trailing edge.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] mode The SPI transfer mode.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_async_set_mode(struct _spi_s_async_dev *dev, const enum spi_transfer_mode mode);
+
+/**
+ * \brief Set SPI baudrate
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] char_size The character size, see \ref spi_char_size.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_async_set_char_size(struct _spi_s_async_dev *dev, const enum spi_char_size char_size);
+
+/**
+ * \brief Set SPI data order
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] dord SPI data order (LSB/MSB first).
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_async_set_data_order(struct _spi_s_async_dev *dev, const enum spi_data_order dord);
+
+/**
+ * \brief Enable interrupt on character output
+ *
+ * Enable interrupt when a new character can be written
+ * to the SPI device.
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ * \param[in] state true = enable output interrupt
+ * false = disable output interrupt
+ *
+ * \return Status code
+ * \retval 0 Ok status
+ */
+int32_t _spi_s_async_enable_tx(struct _spi_s_async_dev *dev, bool state);
+
+/**
+ * \brief Enable interrupt on character input
+ *
+ * Enable interrupt when a new character is ready to be
+ * read from the SPI device.
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ * \param[in] state true = enable input interrupts
+ * false = disable input interrupt
+ *
+ * \return Status code
+ * \retvat 0 OK Status
+ */
+int32_t _spi_s_async_enable_rx(struct _spi_s_async_dev *dev, bool state);
+
+/**
+ * \brief Enable interrupt on Slave Select (SS) rising
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ * \param[in] state true = enable input interrupts
+ * false = disable input interrupt
+ *
+ * \return Status code
+ * \retvat 0 OK Status
+ */
+int32_t _spi_s_async_enable_ss_detect(struct _spi_s_async_dev *dev, bool state);
+
+/**
+ * \brief Read one character to SPI device instance
+ * \param[in, out] dev Pointer to the SPI device instance.
+ *
+ * \return Character read from SPI module
+ */
+uint16_t _spi_s_async_read_one(struct _spi_s_async_dev *dev);
+
+/**
+ * \brief Write one character to assigned buffer
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] data
+ *
+ * \return Status code of write operation
+ * \retval 0 Write operation OK
+ */
+int32_t _spi_s_async_write_one(struct _spi_s_async_dev *dev, uint16_t data);
+
+/**
+ * \brief Register the SPI device callback
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] cb_type The callback type.
+ * \param[in] func The callback function to register. NULL to disable callback.
+ * \return Always 0.
+ */
+int32_t _spi_s_async_register_callback(struct _spi_s_async_dev *dev, const enum _spi_s_async_dev_cb_type cb_type,
+ const FUNC_PTR func);
+
+/**
+ * \brief Enable/disable SPI slave interrupt
+ *
+ * param[in] device The pointer to SPI slave device instance
+ * param[in] type The type of interrupt to disable/enable if applicable
+ * param[in] state Enable or disable
+ */
+void _spi_s_async_set_irq_state(struct _spi_s_async_dev *const device, const enum _spi_async_dev_cb_type type,
+ const bool state);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+#endif /* ifndef _HPL_SPI_S_ASYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_spi_s_sync.h b/watch-library/hal/include/hpl_spi_s_sync.h
new file mode 100644
index 00000000..ff4c811a
--- /dev/null
+++ b/watch-library/hal/include/hpl_spi_s_sync.h
@@ -0,0 +1,232 @@
+/**
+ * \file
+ *
+ * \brief SPI related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SPI_S_SYNC_H_INCLUDED
+#define _HPL_SPI_S_SYNC_H_INCLUDED
+
+#include <hpl_spi_sync.h>
+
+/**
+ * \addtogroup hpl_spi HPL SPI
+ *
+ *@{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Uses common SPI sync device driver. */
+#define _spi_s_sync_dev _spi_sync_dev
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize SPI for access without interrupts
+ * It will load default hardware configuration and software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] hw Pointer to the hardware base.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG Input parameter problem.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval ERR_DENIED SPI has been enabled.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_sync_init(struct _spi_s_sync_dev *dev, void *const hw);
+
+/**
+ * \brief Initialize SPI for access with interrupts
+ * Disable, reset the hardware and the software struct.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_sync_deinit(struct _spi_s_sync_dev *dev);
+
+/**
+ * \brief Enable SPI for access without interrupts
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI hardware not ready (resetting).
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_sync_enable(struct _spi_s_sync_dev *dev);
+
+/**
+ * \brief Disable SPI for access without interrupts
+ * Disable SPI. Deactivate all CS pins if works as master.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \return Operation status.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_sync_disable(struct _spi_s_sync_dev *dev);
+
+/**
+ * \brief Set SPI transfer mode
+ * Set SPI transfer mode (\ref spi_transfer_mode),
+ * which controls clock polarity and clock phase.
+ * Mode 0: leading edge is rising edge, data sample on leading edge.
+ * Mode 1: leading edge is rising edge, data sample on trailing edge.
+ * Mode 2: leading edge is falling edge, data sample on leading edge.
+ * Mode 3: leading edge is falling edge, data sample on trailing edge.
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] mode The SPI transfer mode.
+ * \return Operation status.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_sync_set_mode(struct _spi_s_sync_dev *dev, const enum spi_transfer_mode mode);
+
+/**
+ * \brief Set SPI baudrate
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] char_size The character size, see \ref spi_char_size.
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_sync_set_char_size(struct _spi_s_sync_dev *dev, const enum spi_char_size char_size);
+
+/**
+ * \brief Set SPI data order
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] dord SPI data order (LSB/MSB first).
+ * \return Operation status.
+ * \retval ERR_INVALID_ARG The character size is not supported.
+ * \retval ERR_BUSY SPI is not ready to accept new setting.
+ * \retval 0 Operation done successfully.
+ */
+int32_t _spi_s_sync_set_data_order(struct _spi_s_sync_dev *dev, const enum spi_data_order dord);
+
+/**
+ * \brief Enable interrupt on character output
+ *
+ * Enable interrupt when a new character can be written
+ * to the SPI device.
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ * \param[in] state true = enable output interrupt
+ * false = disable output interrupt
+ *
+ * \return Status code
+ * \retval 0 Ok status
+ */
+int32_t _spi_s_sync_enable_tx(struct _spi_s_sync_dev *dev, bool state);
+
+/**
+ * \brief Enable interrupt on character input
+ *
+ * Enable interrupt when a new character is ready to be
+ * read from the SPI device.
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ * \param[in] state true = enable input interrupts
+ * false = disable input interrupt
+ *
+ * \return Status code
+ * \retval 0 OK Status
+ */
+int32_t _spi_s_sync_enable_rx(struct _spi_s_sync_dev *dev, bool state);
+
+/**
+ * \brief Read one character to SPI device instance
+ * \param[in, out] dev Pointer to the SPI device instance.
+ *
+ * \return Character read from SPI module
+ */
+uint16_t _spi_s_sync_read_one(struct _spi_s_sync_dev *dev);
+
+/**
+ * \brief Write one character to assigned buffer
+ * \param[in, out] dev Pointer to the SPI device instance.
+ * \param[in] data
+ *
+ * \return Status code of write operation
+ * \retval 0 Write operation OK
+ */
+int32_t _spi_s_sync_write_one(struct _spi_s_sync_dev *dev, uint16_t data);
+
+/**
+ * \brief Check if TX ready
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ *
+ * \return TX ready state
+ * \retval true TX ready
+ * \retval false TX not ready
+ */
+bool _spi_s_sync_is_tx_ready(struct _spi_s_sync_dev *dev);
+
+/**
+ * \brief Check if RX character ready
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ *
+ * \return RX character ready state
+ * \retval true RX character ready
+ * \retval false RX character not ready
+ */
+bool _spi_s_sync_is_rx_ready(struct _spi_s_sync_dev *dev);
+
+/**
+ * \brief Check if SS deactiviation detected
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ *
+ * \return SS deactiviation state
+ * \retval true SS deactiviation detected
+ * \retval false SS deactiviation not detected
+ */
+bool _spi_s_sync_is_ss_deactivated(struct _spi_s_sync_dev *dev);
+
+/**
+ * \brief Check if error is detected
+ *
+ * \param[in] dev Pointer to the SPI device instance
+ *
+ * \return Error detection state
+ * \retval true Error detected
+ * \retval false Error not detected
+ */
+bool _spi_s_sync_is_error(struct _spi_s_sync_dev *dev);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+#endif /* ifndef _HPL_SPI_S_SYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_spi_sync.h b/watch-library/hal/include/hpl_spi_sync.h
new file mode 100644
index 00000000..dc88648f
--- /dev/null
+++ b/watch-library/hal/include/hpl_spi_sync.h
@@ -0,0 +1,70 @@
+/**
+ * \file
+ *
+ * \brief Common SPI related functionality declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SPI_SYNC_H_INCLUDED
+#define _HPL_SPI_SYNC_H_INCLUDED
+
+#include <compiler.h>
+#include <utils.h>
+
+#include <hpl_spi.h>
+
+/**
+ * \addtogroup hpl_spi HPL SPI
+ *
+ * \section hpl_spi_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** SPI driver to support sync HAL */
+struct _spi_sync_dev {
+ /** Pointer to the hardware base or private data for special device. */
+ void *prvt;
+ /** Data size, number of bytes for each character */
+ uint8_t char_size;
+ /** Dummy byte used in master mode when reading the slave */
+ uint16_t dummy_byte;
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+#endif /* ifndef _HPL_SPI_SYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_time_measure.h b/watch-library/hal/include/hpl_time_measure.h
new file mode 100644
index 00000000..5d688df5
--- /dev/null
+++ b/watch-library/hal/include/hpl_time_measure.h
@@ -0,0 +1,94 @@
+/**
+ * \file
+ *
+ * \brief Time measure related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_TIME_MEASURE_H_INCLUDED
+#define _HPL_TIME_MEASURE_H_INCLUDED
+
+/**
+ * \addtogroup HPL Time measure
+ *
+ * \section hpl_time_measure_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief System time type
+ */
+typedef uint32_t system_time_t;
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize system time module
+ *
+ * \param[in] hw The pointer to hardware instance to initialize
+ */
+void _system_time_init(void *const hw);
+
+/**
+ * \brief Deinitialize system time module
+ *
+ * \param[in] hw The pointer to hardware instance to initialize
+ */
+void _system_time_deinit(void *const hw);
+
+/**
+ * \brief Get system time
+ *
+ * \param[in] hw The pointer to hardware instance to initialize
+ */
+system_time_t _system_time_get(const void *const hw);
+
+/**
+ * \brief Get maximum possible system time
+ *
+ * \param[in] hw The pointer to hardware instance to initialize
+ */
+system_time_t _system_time_get_max_time_value(const void *const hw);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_TIME_MEASURE_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_timer.h b/watch-library/hal/include/hpl_timer.h
new file mode 100644
index 00000000..9bdfbb77
--- /dev/null
+++ b/watch-library/hal/include/hpl_timer.h
@@ -0,0 +1,160 @@
+/**
+ * \file
+ *
+ * \brief Timer related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_TIMER_H_INCLUDED
+#define _HPL_TIMER_H_INCLUDED
+
+/**
+ * \addtogroup HPL Timer
+ *
+ * \section hpl_timer_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <compiler.h>
+#include <hpl_irq.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Timer device structure
+ *
+ * The Timer device structure forward declaration.
+ */
+struct _timer_device;
+
+/**
+ * \brief Timer interrupt callbacks
+ */
+struct _timer_callbacks {
+ void (*period_expired)(struct _timer_device *device);
+};
+
+/**
+ * \brief Timer device structure
+ */
+struct _timer_device {
+ struct _timer_callbacks timer_cb;
+ struct _irq_descriptor irq;
+ void * hw;
+};
+
+/**
+ * \brief Timer functions, pointers to low-level functions
+ */
+struct _timer_hpl_interface {
+ int32_t (*init)(struct _timer_device *const device, void *const hw);
+ void (*deinit)(struct _timer_device *const device);
+ void (*start_timer)(struct _timer_device *const device);
+ void (*stop_timer)(struct _timer_device *const device);
+ void (*set_timer_period)(struct _timer_device *const device, const uint32_t clock_cycles);
+ uint32_t (*get_period)(const struct _timer_device *const device);
+ bool (*is_timer_started)(const struct _timer_device *const device);
+ void (*set_timer_irq)(struct _timer_device *const device);
+};
+/**
+ * \brief Initialize TCC
+ *
+ * This function does low level TCC configuration.
+ *
+ * \param[in] device The pointer to timer device instance
+ * \param[in] hw The pointer to hardware instance
+ *
+ * \return Initialization status.
+ */
+int32_t _timer_init(struct _timer_device *const device, void *const hw);
+
+/**
+ * \brief Deinitialize TCC
+ *
+ * \param[in] device The pointer to timer device instance
+ */
+void _timer_deinit(struct _timer_device *const device);
+
+/**
+ * \brief Start hardware timer
+ *
+ * \param[in] device The pointer to timer device instance
+ */
+void _timer_start(struct _timer_device *const device);
+
+/**
+ * \brief Stop hardware timer
+ *
+ * \param[in] device The pointer to timer device instance
+ */
+void _timer_stop(struct _timer_device *const device);
+
+/**
+ * \brief Set timer period
+ *
+ * \param[in] device The pointer to timer device instance
+ */
+void _timer_set_period(struct _timer_device *const device, const uint32_t clock_cycles);
+
+/**
+ * \brief Retrieve timer period
+ *
+ * \param[in] device The pointer to timer device instance
+ *
+ * \return Timer period
+ */
+uint32_t _timer_get_period(const struct _timer_device *const device);
+
+/**
+ * \brief Check if timer is running
+ *
+ * \param[in] device The pointer to timer device instance
+ *
+ * \return Check status.
+ * \retval true The given timer is running
+ * \retval false The given timer is not running
+ */
+bool _timer_is_started(const struct _timer_device *const device);
+
+/**
+ * \brief Set timer IRQ
+ *
+ * \param[in] device The pointer to timer device instance
+ */
+void _timer_set_irq(struct _timer_device *const device);
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_TIMER_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_usart.h b/watch-library/hal/include/hpl_usart.h
new file mode 100644
index 00000000..0e09501d
--- /dev/null
+++ b/watch-library/hal/include/hpl_usart.h
@@ -0,0 +1,113 @@
+/**
+ * \file
+ *
+ * \brief USART related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_USART_H_INCLUDED
+#define _HPL_USART_H_INCLUDED
+
+/**
+ * \addtogroup HPL USART SYNC
+ *
+ * \section hpl_usart_sync_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief USART flow control state
+ */
+union usart_flow_control_state {
+ struct {
+ uint8_t cts : 1;
+ uint8_t rts : 1;
+ uint8_t unavailable : 1;
+ uint8_t reserved : 5;
+ } bit;
+ uint8_t value;
+};
+
+/**
+ * \brief USART baud rate mode
+ */
+enum usart_baud_rate_mode { USART_BAUDRATE_ASYNCH_ARITHMETIC, USART_BAUDRATE_ASYNCH_FRACTIONAL, USART_BAUDRATE_SYNCH };
+
+/**
+ * \brief USART data order
+ */
+enum usart_data_order { USART_DATA_ORDER_MSB = 0, USART_DATA_ORDER_LSB = 1 };
+
+/**
+ * \brief USART mode
+ */
+enum usart_mode { USART_MODE_ASYNCHRONOUS = 0, USART_MODE_SYNCHRONOUS = 1 };
+
+/**
+ * \brief USART parity
+ */
+enum usart_parity {
+ USART_PARITY_EVEN = 0,
+ USART_PARITY_ODD = 1,
+ USART_PARITY_NONE = 2,
+ USART_PARITY_SPACE = 3,
+ USART_PARITY_MARK = 4
+};
+
+/**
+ * \brief USART stop bits mode
+ */
+enum usart_stop_bits { USART_STOP_BITS_ONE = 0, USART_STOP_BITS_TWO = 1, USART_STOP_BITS_ONE_P_FIVE = 2 };
+
+/**
+ * \brief USART character size
+ */
+enum usart_character_size {
+ USART_CHARACTER_SIZE_8BITS = 0,
+ USART_CHARACTER_SIZE_9BITS = 1,
+ USART_CHARACTER_SIZE_5BITS = 5,
+ USART_CHARACTER_SIZE_6BITS = 6,
+ USART_CHARACTER_SIZE_7BITS = 7
+};
+
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_USART_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_usart_async.h b/watch-library/hal/include/hpl_usart_async.h
new file mode 100644
index 00000000..3f833d1a
--- /dev/null
+++ b/watch-library/hal/include/hpl_usart_async.h
@@ -0,0 +1,270 @@
+/**
+ * \file
+ *
+ * \brief USART related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_USART_ASYNC_H_INCLUDED
+#define _HPL_USART_ASYNC_H_INCLUDED
+
+/**
+ * \addtogroup HPL USART
+ *
+ * \section hpl_usart_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include "hpl_usart.h"
+#include "hpl_irq.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief USART callback types
+ */
+enum _usart_async_callback_type { USART_ASYNC_BYTE_SENT, USART_ASYNC_RX_DONE, USART_ASYNC_TX_DONE, USART_ASYNC_ERROR };
+
+/**
+ * \brief USART device structure
+ *
+ * The USART device structure forward declaration.
+ */
+struct _usart_async_device;
+
+/**
+ * \brief USART interrupt callbacks
+ */
+struct _usart_async_callbacks {
+ void (*tx_byte_sent)(struct _usart_async_device *device);
+ void (*rx_done_cb)(struct _usart_async_device *device, uint8_t data);
+ void (*tx_done_cb)(struct _usart_async_device *device);
+ void (*error_cb)(struct _usart_async_device *device);
+};
+
+/**
+ * \brief USART descriptor device structure
+ */
+struct _usart_async_device {
+ struct _usart_async_callbacks usart_cb;
+ struct _irq_descriptor irq;
+ void * hw;
+};
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize asynchronous USART
+ *
+ * This function does low level USART configuration.
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] hw The pointer to hardware instance
+ *
+ * \return Initialization status
+ */
+int32_t _usart_async_init(struct _usart_async_device *const device, void *const hw);
+
+/**
+ * \brief Deinitialize USART
+ *
+ * This function closes the given USART by disabling its clock.
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+void _usart_async_deinit(struct _usart_async_device *const device);
+
+/**
+ * \brief Enable usart module
+ *
+ * This function will enable the usart module
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+void _usart_async_enable(struct _usart_async_device *const device);
+
+/**
+ * \brief Disable usart module
+ *
+ * This function will disable the usart module
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+void _usart_async_disable(struct _usart_async_device *const device);
+
+/**
+ * \brief Calculate baud rate register value
+ *
+ * \param[in] baud Required baud rate
+ * \param[in] clock_rate clock frequency
+ * \param[in] samples The number of samples
+ * \param[in] mode USART mode
+ * \param[in] fraction A fraction value
+ *
+ * \return Calculated baud rate register value
+ */
+uint16_t _usart_async_calculate_baud_rate(const uint32_t baud, const uint32_t clock_rate, const uint8_t samples,
+ const enum usart_baud_rate_mode mode, const uint8_t fraction);
+
+/**
+ * \brief Set baud rate
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] baud_rate A baud rate to set
+ */
+void _usart_async_set_baud_rate(struct _usart_async_device *const device, const uint32_t baud_rate);
+
+/**
+ * \brief Set data order
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] order A data order to set
+ */
+void _usart_async_set_data_order(struct _usart_async_device *const device, const enum usart_data_order order);
+
+/**
+ * \brief Set mode
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] mode A mode to set
+ */
+void _usart_async_set_mode(struct _usart_async_device *const device, const enum usart_mode mode);
+
+/**
+ * \brief Set parity
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] parity A parity to set
+ */
+void _usart_async_set_parity(struct _usart_async_device *const device, const enum usart_parity parity);
+
+/**
+ * \brief Set stop bits mode
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] stop_bits A stop bits mode to set
+ */
+void _usart_async_set_stop_bits(struct _usart_async_device *const device, const enum usart_stop_bits stop_bits);
+
+/**
+ * \brief Set character size
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] size A character size to set
+ */
+void _usart_async_set_character_size(struct _usart_async_device *const device, const enum usart_character_size size);
+
+/**
+ * \brief Retrieve usart status
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+uint32_t _usart_async_get_status(const struct _usart_async_device *const device);
+
+/**
+ * \brief Write a byte to the given USART instance
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] data Data to write
+ */
+void _usart_async_write_byte(struct _usart_async_device *const device, uint8_t data);
+
+/**
+ * \brief Check if USART is ready to send next byte
+ *
+ * \param[in] device The pointer to USART device instance
+ *
+ * \return Status of the ready check.
+ * \retval true if the USART is ready to send next byte
+ * \retval false if the USART is not ready to send next byte
+ */
+bool _usart_async_is_byte_sent(const struct _usart_async_device *const device);
+
+/**
+ * \brief Set the state of flow control pins
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] state - A state of flow control pins to set
+ */
+void _usart_async_set_flow_control_state(struct _usart_async_device *const device,
+ const union usart_flow_control_state state);
+
+/**
+ * \brief Retrieve the state of flow control pins
+ *
+ * This function retrieves the of flow control pins.
+ *
+ * \return USART_FLOW_CONTROL_STATE_UNAVAILABLE.
+ */
+union usart_flow_control_state _usart_async_get_flow_control_state(const struct _usart_async_device *const device);
+
+/**
+ * \brief Enable data register empty interrupt
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+void _usart_async_enable_byte_sent_irq(struct _usart_async_device *const device);
+
+/**
+ * \brief Enable transmission complete interrupt
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+void _usart_async_enable_tx_done_irq(struct _usart_async_device *const device);
+
+/**
+ * \brief Retrieve ordinal number of the given USART hardware instance
+ *
+ * \param[in] device The pointer to USART device instance
+ *
+ * \return The ordinal number of the given USART hardware instance
+ */
+uint8_t _usart_async_get_hardware_index(const struct _usart_async_device *const device);
+
+/**
+ * \brief Enable/disable USART interrupt
+ *
+ * param[in] device The pointer to USART device instance
+ * param[in] type The type of interrupt to disable/enable if applicable
+ * param[in] state Enable or disable
+ */
+void _usart_async_set_irq_state(struct _usart_async_device *const device, const enum _usart_async_callback_type type,
+ const bool state);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_USART_ASYNC_H_INCLUDED */
diff --git a/watch-library/hal/include/hpl_usart_sync.h b/watch-library/hal/include/hpl_usart_sync.h
new file mode 100644
index 00000000..abc7264f
--- /dev/null
+++ b/watch-library/hal/include/hpl_usart_sync.h
@@ -0,0 +1,254 @@
+/**
+ * \file
+ *
+ * \brief USART related functionality declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _HPL_SYNC_USART_H_INCLUDED
+#define _HPL_SYNC_USART_H_INCLUDED
+
+/**
+ * \addtogroup HPL USART SYNC
+ *
+ * \section hpl_usart_sync_rev Revision History
+ * - v1.0.0 Initial Release
+ *
+ *@{
+ */
+
+#include <hpl_usart.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief USART descriptor device structure
+ */
+struct _usart_sync_device {
+ void *hw;
+};
+
+/**
+ * \name HPL functions
+ */
+//@{
+/**
+ * \brief Initialize synchronous USART
+ *
+ * This function does low level USART configuration.
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] hw The pointer to hardware instance
+ *
+ * \return Initialization status
+ */
+int32_t _usart_sync_init(struct _usart_sync_device *const device, void *const hw);
+
+/**
+ * \brief Deinitialize USART
+ *
+ * This function closes the given USART by disabling its clock.
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+void _usart_sync_deinit(struct _usart_sync_device *const device);
+
+/**
+ * \brief Enable usart module
+ *
+ * This function will enable the usart module
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+void _usart_sync_enable(struct _usart_sync_device *const device);
+
+/**
+ * \brief Disable usart module
+ *
+ * This function will disable the usart module
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+void _usart_sync_disable(struct _usart_sync_device *const device);
+
+/**
+ * \brief Calculate baud rate register value
+ *
+ * \param[in] baud Required baud rate
+ * \param[in] clock_rate clock frequency
+ * \param[in] samples The number of samples
+ * \param[in] mode USART mode
+ * \param[in] fraction A fraction value
+ *
+ * \return Calculated baud rate register value
+ */
+uint16_t _usart_sync_calculate_baud_rate(const uint32_t baud, const uint32_t clock_rate, const uint8_t samples,
+ const enum usart_baud_rate_mode mode, const uint8_t fraction);
+
+/**
+ * \brief Set baud rate
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] baud_rate A baud rate to set
+ */
+void _usart_sync_set_baud_rate(struct _usart_sync_device *const device, const uint32_t baud_rate);
+
+/**
+ * \brief Set data order
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] order A data order to set
+ */
+void _usart_sync_set_data_order(struct _usart_sync_device *const device, const enum usart_data_order order);
+
+/**
+ * \brief Set mode
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] mode A mode to set
+ */
+void _usart_sync_set_mode(struct _usart_sync_device *const device, const enum usart_mode mode);
+
+/**
+ * \brief Set parity
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] parity A parity to set
+ */
+void _usart_sync_set_parity(struct _usart_sync_device *const device, const enum usart_parity parity);
+
+/**
+ * \brief Set stop bits mode
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] stop_bits A stop bits mode to set
+ */
+void _usart_sync_set_stop_bits(struct _usart_sync_device *const device, const enum usart_stop_bits stop_bits);
+
+/**
+ * \brief Set character size
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] size A character size to set
+ */
+void _usart_sync_set_character_size(struct _usart_sync_device *const device, const enum usart_character_size size);
+
+/**
+ * \brief Retrieve usart status
+ *
+ * \param[in] device The pointer to USART device instance
+ */
+uint32_t _usart_sync_get_status(const struct _usart_sync_device *const device);
+
+/**
+ * \brief Write a byte to the given USART instance
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] data Data to write
+ */
+void _usart_sync_write_byte(struct _usart_sync_device *const device, uint8_t data);
+
+/**
+ * \brief Read a byte from the given USART instance
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] data Data to write
+ *
+ * \return Data received via USART interface.
+ */
+uint8_t _usart_sync_read_byte(const struct _usart_sync_device *const device);
+
+/**
+ * \brief Check if USART is ready to send next byte
+ *
+ * \param[in] device The pointer to USART device instance
+ *
+ * \return Status of the ready check.
+ * \retval true if the USART is ready to send next byte
+ * \retval false if the USART is not ready to send next byte
+ */
+bool _usart_sync_is_ready_to_send(const struct _usart_sync_device *const device);
+
+/**
+ * \brief Check if USART transmitter has sent the byte
+ *
+ * \param[in] device The pointer to USART device instance
+ *
+ * \return Status of the ready check.
+ * \retval true if the USART transmitter has sent the byte
+ * \retval false if the USART transmitter has not send the byte
+ */
+bool _usart_sync_is_transmit_done(const struct _usart_sync_device *const device);
+
+/**
+ * \brief Check if there is data received by USART
+ *
+ * \param[in] device The pointer to USART device instance
+ *
+ * \return Status of the data received check.
+ * \retval true if the USART has received a byte
+ * \retval false if the USART has not received a byte
+ */
+bool _usart_sync_is_byte_received(const struct _usart_sync_device *const device);
+
+/**
+ * \brief Set the state of flow control pins
+ *
+ * \param[in] device The pointer to USART device instance
+ * \param[in] state - A state of flow control pins to set
+ */
+void _usart_sync_set_flow_control_state(struct _usart_sync_device *const device,
+ const union usart_flow_control_state state);
+
+/**
+ * \brief Retrieve the state of flow control pins
+ *
+ * This function retrieves the of flow control pins.
+ *
+ * \return USART_FLOW_CONTROL_STATE_UNAVAILABLE.
+ */
+union usart_flow_control_state _usart_sync_get_flow_control_state(const struct _usart_sync_device *const device);
+
+/**
+ * \brief Retrieve ordinal number of the given USART hardware instance
+ *
+ * \param[in] device The pointer to USART device instance
+ *
+ * \return The ordinal number of the given USART hardware instance
+ */
+uint8_t _usart_sync_get_hardware_index(const struct _usart_sync_device *const device);
+//@}
+
+#ifdef __cplusplus
+}
+#endif
+/**@}*/
+#endif /* _HPL_SYNC_USART_H_INCLUDED */
diff --git a/watch-library/hal/src/hal_adc_sync.c b/watch-library/hal/src/hal_adc_sync.c
new file mode 100644
index 00000000..33e0d929
--- /dev/null
+++ b/watch-library/hal/src/hal_adc_sync.c
@@ -0,0 +1,244 @@
+/**
+ * \file
+ *
+ * \brief ADC functionality implementation.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+/**
+ * \brief Indicates HAL being compiled. Must be defined before including.
+ */
+#define _COMPILING_HAL
+
+#include "hal_adc_sync.h"
+#include <utils_assert.h>
+
+/**
+ * \brief Driver version
+ */
+#define DRIVER_VERSION 0x00000001u
+
+/**
+ * \brief Maximum amount of ADC interface instances
+ */
+#define MAX_ADC_AMOUNT ADC_INST_NUM
+
+/**
+ * \brief Initialize ADC
+ */
+int32_t adc_sync_init(struct adc_sync_descriptor *const descr, void *const hw, void *const func)
+{
+ ASSERT(descr && hw);
+
+ return _adc_sync_init(&descr->device, hw);
+}
+
+/**
+ * \brief Deinitialize ADC
+ */
+int32_t adc_sync_deinit(struct adc_sync_descriptor *const descr)
+{
+ ASSERT(descr);
+ _adc_sync_deinit(&descr->device);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Enable ADC
+ */
+int32_t adc_sync_enable_channel(struct adc_sync_descriptor *const descr, const uint8_t channel)
+{
+ ASSERT(descr);
+ _adc_sync_enable_channel(&descr->device, channel);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Disable ADC
+ */
+int32_t adc_sync_disable_channel(struct adc_sync_descriptor *const descr, const uint8_t channel)
+{
+ ASSERT(descr);
+ _adc_sync_disable_channel(&descr->device, channel);
+ return ERR_NONE;
+}
+
+/*
+ * \brief Read data from ADC
+ */
+int32_t adc_sync_read_channel(struct adc_sync_descriptor *const descr, const uint8_t channel, uint8_t *const buffer,
+ const uint16_t length)
+{
+ uint8_t data_size;
+ uint16_t offset = 0;
+
+ ASSERT(descr && buffer && length);
+ data_size = _adc_sync_get_data_size(&descr->device);
+ ASSERT(!(length % data_size));
+
+ do {
+ uint16_t result;
+ _adc_sync_convert(&descr->device);
+
+ while (!_adc_sync_is_channel_conversion_done(&descr->device, channel))
+ ;
+
+ result = _adc_sync_read_channel_data(&descr->device, channel);
+ buffer[offset] = result;
+ if (1 < data_size) {
+ buffer[offset + 1] = result >> 8;
+ }
+ offset += data_size;
+ } while (offset < length);
+
+ return offset;
+}
+
+/**
+ * \brief Set ADC reference source
+ */
+int32_t adc_sync_set_reference(struct adc_sync_descriptor *const descr, const adc_reference_t reference)
+{
+ ASSERT(descr);
+ _adc_sync_set_reference_source(&descr->device, reference);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Set ADC resolution
+ */
+int32_t adc_sync_set_resolution(struct adc_sync_descriptor *const descr, const adc_resolution_t resolution)
+{
+ ASSERT(descr);
+ _adc_sync_set_resolution(&descr->device, resolution);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Set ADC input source of a channel
+ */
+int32_t adc_sync_set_inputs(struct adc_sync_descriptor *const descr, const adc_pos_input_t pos_input,
+ const adc_neg_input_t neg_input, const uint8_t channel)
+{
+ ASSERT(descr);
+ _adc_sync_set_inputs(&descr->device, pos_input, neg_input, channel);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Set ADC thresholds
+ */
+int32_t adc_sync_set_thresholds(struct adc_sync_descriptor *const descr, const adc_threshold_t low_threshold,
+ const adc_threshold_t up_threshold)
+{
+ ASSERT(descr);
+ _adc_sync_set_thresholds(&descr->device, low_threshold, up_threshold);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Set ADC gain
+ */
+int32_t adc_sync_set_channel_gain(struct adc_sync_descriptor *const descr, const uint8_t channel, const adc_gain_t gain)
+{
+ ASSERT(descr);
+ _adc_sync_set_channel_gain(&descr->device, channel, gain);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Set ADC conversion mode
+ */
+int32_t adc_sync_set_conversion_mode(struct adc_sync_descriptor *const descr, const enum adc_conversion_mode mode)
+{
+ ASSERT(descr);
+ _adc_sync_set_conversion_mode(&descr->device, mode);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Set ADC differential mode
+ */
+int32_t adc_sync_set_channel_differential_mode(struct adc_sync_descriptor *const descr, const uint8_t channel,
+ const enum adc_differential_mode mode)
+{
+ ASSERT(descr);
+ _adc_sync_set_channel_differential_mode(&descr->device, channel, mode);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Set ADC window mode
+ */
+int32_t adc_sync_set_window_mode(struct adc_sync_descriptor *const descr, const adc_window_mode_t mode)
+{
+ ASSERT(descr);
+ _adc_sync_set_window_mode(&descr->device, mode);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Retrieve threshold state
+ */
+int32_t adc_sync_get_threshold_state(const struct adc_sync_descriptor *const descr, adc_threshold_status_t *const state)
+{
+ ASSERT(descr && state);
+ _adc_sync_get_threshold_state(&descr->device, state);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Check if conversion is complete
+ */
+int32_t adc_sync_is_channel_conversion_complete(const struct adc_sync_descriptor *const descr, const uint8_t channel)
+{
+ ASSERT(descr);
+ return _adc_sync_is_channel_conversion_done(&descr->device, channel);
+}
+
+/**
+ * \brief Retrieve the current driver version
+ */
+uint32_t adc_sync_get_version(void)
+{
+ return DRIVER_VERSION;
+}
+
+//@}
diff --git a/watch-library/hal/src/hal_atomic.c b/watch-library/hal/src/hal_atomic.c
new file mode 100644
index 00000000..f56418ee
--- /dev/null
+++ b/watch-library/hal/src/hal_atomic.c
@@ -0,0 +1,66 @@
+/**
+ * \file
+ *
+ * \brief Critical sections related functionality implementation.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "hal_atomic.h"
+
+/**
+ * \brief Driver version
+ */
+#define DRIVER_VERSION 0x00000001u
+
+/**
+ * \brief Disable interrupts, enter critical section
+ */
+void atomic_enter_critical(hal_atomic_t volatile *atomic)
+{
+ *atomic = __get_PRIMASK();
+ __disable_irq();
+ __DMB();
+}
+
+/**
+ * \brief Exit atomic section
+ */
+void atomic_leave_critical(hal_atomic_t volatile *atomic)
+{
+ __DMB();
+ __set_PRIMASK(*atomic);
+}
+
+/**
+ * \brief Retrieve the current driver version
+ */
+uint32_t atomic_get_version(void)
+{
+ return DRIVER_VERSION;
+}
diff --git a/watch-library/hal/src/hal_calendar.c b/watch-library/hal/src/hal_calendar.c
new file mode 100644
index 00000000..842cfb88
--- /dev/null
+++ b/watch-library/hal/src/hal_calendar.c
@@ -0,0 +1,643 @@
+/**
+ * \file
+ *
+ * \brief Generic CALENDAR functionality implementation.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "hal_calendar.h"
+#include <utils.h>
+#include <utils_assert.h>
+#include <hal_atomic.h>
+
+#define CALENDAR_VERSION 0x00000001u
+#define SECS_IN_LEAP_YEAR 31622400
+#define SECS_IN_NON_LEAP_YEAR 31536000
+#define SECS_IN_31DAYS 2678400
+#define SECS_IN_30DAYS 2592000
+#define SECS_IN_29DAYS 2505600
+#define SECS_IN_28DAYS 2419200
+#define SECS_IN_DAY 86400
+#define SECS_IN_HOUR 3600
+#define SECS_IN_MINUTE 60
+#define DEFAULT_BASE_YEAR 1970
+
+#define SET_ALARM_BUSY 1
+#define PROCESS_ALARM_BUSY 2
+
+/** \brief leap year check
+ * \retval false not leap year.
+ * \retval true leap year.
+ */
+static bool leap_year(uint16_t year)
+{
+ if (year & 3) {
+ return false;
+ } else {
+ return true;
+ }
+}
+
+/** \brief calculate the seconds in specified year/month
+ * \retval 0 month error.
+ */
+static uint32_t get_secs_in_month(uint32_t year, uint8_t month)
+{
+ uint32_t sec_in_month = 0;
+
+ if (leap_year(year)) {
+ switch (month) {
+ case 1:
+ case 3:
+ case 5:
+ case 7:
+ case 8:
+ case 10:
+ case 12:
+ sec_in_month = SECS_IN_31DAYS;
+ break;
+ case 2:
+ sec_in_month = SECS_IN_29DAYS;
+ break;
+ case 4:
+ case 6:
+ case 9:
+ case 11:
+ sec_in_month = SECS_IN_30DAYS;
+ break;
+ default:
+ break;
+ }
+ } else {
+ switch (month) {
+ case 1:
+ case 3:
+ case 5:
+ case 7:
+ case 8:
+ case 10:
+ case 12:
+ sec_in_month = SECS_IN_31DAYS;
+ break;
+ case 2:
+ sec_in_month = SECS_IN_28DAYS;
+ break;
+ case 4:
+ case 6:
+ case 9:
+ case 11:
+ sec_in_month = SECS_IN_30DAYS;
+ break;
+ default:
+ break;
+ }
+ }
+
+ return sec_in_month;
+}
+
+/** \brief convert timestamp to date/time
+ */
+static int32_t convert_timestamp_to_datetime(struct calendar_descriptor *const calendar, uint32_t ts,
+ struct calendar_date_time *dt)
+{
+ uint32_t tmp, sec_in_year, sec_in_month;
+ uint32_t tmp_year = calendar->base_year;
+ uint8_t tmp_month = 1;
+ uint8_t tmp_day = 1;
+ uint8_t tmp_hour = 0;
+ uint8_t tmp_minutes = 0;
+
+ tmp = ts;
+
+ /* Find year */
+ while (true) {
+ sec_in_year = leap_year(tmp_year) ? SECS_IN_LEAP_YEAR : SECS_IN_NON_LEAP_YEAR;
+
+ if (tmp >= sec_in_year) {
+ tmp -= sec_in_year;
+ tmp_year++;
+ } else {
+ break;
+ }
+ }
+ /* Find month of year */
+ while (true) {
+ sec_in_month = get_secs_in_month(tmp_year, tmp_month);
+
+ if (tmp >= sec_in_month) {
+ tmp -= sec_in_month;
+ tmp_month++;
+ } else {
+ break;
+ }
+ }
+ /* Find day of month */
+ while (true) {
+ if (tmp >= SECS_IN_DAY) {
+ tmp -= SECS_IN_DAY;
+ tmp_day++;
+ } else {
+ break;
+ }
+ }
+ /* Find hour of day */
+ while (true) {
+ if (tmp >= SECS_IN_HOUR) {
+ tmp -= SECS_IN_HOUR;
+ tmp_hour++;
+ } else {
+ break;
+ }
+ }
+ /* Find minute in hour */
+ while (true) {
+ if (tmp >= SECS_IN_MINUTE) {
+ tmp -= SECS_IN_MINUTE;
+ tmp_minutes++;
+ } else {
+ break;
+ }
+ }
+
+ dt->date.year = tmp_year;
+ dt->date.month = tmp_month;
+ dt->date.day = tmp_day;
+ dt->time.hour = tmp_hour;
+ dt->time.min = tmp_minutes;
+ dt->time.sec = tmp;
+
+ return ERR_NONE;
+}
+
+/** \brief convert date/time to timestamp
+ * \return timestamp
+ */
+static uint32_t convert_datetime_to_timestamp(struct calendar_descriptor *const calendar, struct calendar_date_time *dt)
+{
+ uint32_t tmp = 0;
+ uint32_t i = 0;
+ uint8_t year, month, day, hour, minutes, seconds;
+
+ year = dt->date.year - calendar->base_year;
+ month = dt->date.month;
+ day = dt->date.day;
+ hour = dt->time.hour;
+ minutes = dt->time.min;
+ seconds = dt->time.sec;
+
+ /* tot up year field */
+ for (i = 0; i < year; ++i) {
+ if (leap_year(calendar->base_year + i)) {
+ tmp += SECS_IN_LEAP_YEAR;
+ } else {
+ tmp += SECS_IN_NON_LEAP_YEAR;
+ }
+ }
+
+ /* tot up month field */
+ for (i = 1; i < month; ++i) {
+ tmp += get_secs_in_month(dt->date.year, i);
+ }
+
+ /* tot up day/hour/minute/second fields */
+ tmp += (day - 1) * SECS_IN_DAY;
+ tmp += hour * SECS_IN_HOUR;
+ tmp += minutes * SECS_IN_MINUTE;
+ tmp += seconds;
+
+ return tmp;
+}
+
+/** \brief calibrate timestamp to make desired timestamp ahead of current timestamp
+ */
+static void calibrate_timestamp(struct calendar_descriptor *const calendar, struct calendar_alarm *alarm,
+ struct calendar_alarm *current_dt)
+{
+ uint32_t alarm_ts;
+ uint32_t current_ts = current_dt->cal_alarm.timestamp;
+
+ alarm_ts = alarm->cal_alarm.timestamp;
+
+ /* calibrate timestamp */
+ switch (alarm->cal_alarm.option) {
+ case CALENDAR_ALARM_MATCH_SEC:
+
+ if (alarm_ts <= current_ts) {
+ alarm_ts += SECS_IN_MINUTE;
+ }
+
+ break;
+ case CALENDAR_ALARM_MATCH_MIN:
+
+ if (alarm_ts <= current_ts) {
+ alarm_ts += SECS_IN_HOUR;
+ }
+
+ break;
+ case CALENDAR_ALARM_MATCH_HOUR:
+
+ if (alarm_ts <= current_ts) {
+ alarm_ts += SECS_IN_DAY;
+ }
+
+ break;
+ case CALENDAR_ALARM_MATCH_DAY:
+
+ if (alarm_ts <= current_ts) {
+ alarm_ts += get_secs_in_month(current_dt->cal_alarm.datetime.date.year,
+ current_dt->cal_alarm.datetime.date.month);
+ }
+
+ break;
+ case CALENDAR_ALARM_MATCH_MONTH:
+
+ if (alarm_ts <= current_ts) {
+ if (leap_year(current_dt->cal_alarm.datetime.date.year)) {
+ alarm_ts += SECS_IN_LEAP_YEAR;
+ } else {
+ alarm_ts += SECS_IN_NON_LEAP_YEAR;
+ }
+ }
+
+ break;
+ /* do nothing for year match */
+ case CALENDAR_ALARM_MATCH_YEAR:
+ default:
+ break;
+ }
+
+ /* desired timestamp after calibration */
+ alarm->cal_alarm.timestamp = alarm_ts;
+}
+
+/** \brief complete alarm to absolute date/time, then fill up the timestamp
+ */
+static void fill_alarm(struct calendar_descriptor *const calendar, struct calendar_alarm *alarm)
+{
+ struct calendar_alarm current_dt;
+ uint32_t tmp, current_ts;
+
+ /* get current date/time */
+ current_ts = _calendar_get_counter(&calendar->device);
+ convert_timestamp_to_datetime(calendar, current_ts, &current_dt.cal_alarm.datetime);
+
+ current_dt.cal_alarm.timestamp = current_ts;
+
+ /* complete alarm */
+ switch (alarm->cal_alarm.option) {
+ case CALENDAR_ALARM_MATCH_SEC:
+ alarm->cal_alarm.datetime.date.year = current_dt.cal_alarm.datetime.date.year;
+ alarm->cal_alarm.datetime.date.month = current_dt.cal_alarm.datetime.date.month;
+ alarm->cal_alarm.datetime.date.day = current_dt.cal_alarm.datetime.date.day;
+ alarm->cal_alarm.datetime.time.hour = current_dt.cal_alarm.datetime.time.hour;
+ alarm->cal_alarm.datetime.time.min = current_dt.cal_alarm.datetime.time.min;
+ break;
+ case CALENDAR_ALARM_MATCH_MIN:
+ alarm->cal_alarm.datetime.date.year = current_dt.cal_alarm.datetime.date.year;
+ alarm->cal_alarm.datetime.date.month = current_dt.cal_alarm.datetime.date.month;
+ alarm->cal_alarm.datetime.date.day = current_dt.cal_alarm.datetime.date.day;
+ alarm->cal_alarm.datetime.time.hour = current_dt.cal_alarm.datetime.time.hour;
+ break;
+ case CALENDAR_ALARM_MATCH_HOUR:
+ alarm->cal_alarm.datetime.date.year = current_dt.cal_alarm.datetime.date.year;
+ alarm->cal_alarm.datetime.date.month = current_dt.cal_alarm.datetime.date.month;
+ alarm->cal_alarm.datetime.date.day = current_dt.cal_alarm.datetime.date.day;
+ break;
+ case CALENDAR_ALARM_MATCH_DAY:
+ alarm->cal_alarm.datetime.date.year = current_dt.cal_alarm.datetime.date.year;
+ alarm->cal_alarm.datetime.date.month = current_dt.cal_alarm.datetime.date.month;
+ break;
+ case CALENDAR_ALARM_MATCH_MONTH:
+ alarm->cal_alarm.datetime.date.year = current_dt.cal_alarm.datetime.date.year;
+ break;
+ case CALENDAR_ALARM_MATCH_YEAR:
+ break;
+ default:
+ break;
+ }
+
+ /* fill up the timestamp */
+ tmp = convert_datetime_to_timestamp(calendar, &alarm->cal_alarm.datetime);
+ alarm->cal_alarm.timestamp = tmp;
+
+ /* calibrate the timestamp */
+ calibrate_timestamp(calendar, alarm, &current_dt);
+ convert_timestamp_to_datetime(calendar, alarm->cal_alarm.timestamp, &alarm->cal_alarm.datetime);
+}
+
+/** \brief add new alarm into the list in ascending order
+ */
+static int32_t calendar_add_new_alarm(struct list_descriptor *list, struct calendar_alarm *alarm)
+{
+ struct calendar_descriptor *calendar = CONTAINER_OF(list, struct calendar_descriptor, alarms);
+ struct calendar_alarm * head, *it, *prev = NULL;
+
+ /*get the head of alarms list*/
+ head = (struct calendar_alarm *)list_get_head(list);
+
+ /*if head is null, insert new alarm as head*/
+ if (!head) {
+ list_insert_as_head(list, alarm);
+ _calendar_set_comp(&calendar->device, alarm->cal_alarm.timestamp);
+ return ERR_NONE;
+ }
+
+ /*insert the new alarm in accending order, the head will be invoked firstly */
+ for (it = head; it; it = (struct calendar_alarm *)list_get_next_element(it)) {
+ if (alarm->cal_alarm.timestamp <= it->cal_alarm.timestamp) {
+ break;
+ }
+
+ prev = it;
+ }
+
+ /*insert new alarm into the list */
+ if (it == head) {
+ list_insert_as_head(list, alarm);
+ /*get the head and set it into register*/
+ _calendar_set_comp(&calendar->device, alarm->cal_alarm.timestamp);
+
+ } else {
+ list_insert_after(prev, alarm);
+ }
+
+ return ERR_NONE;
+}
+
+/** \brief callback for alarm
+ */
+static void calendar_alarm(struct calendar_dev *const dev)
+{
+ struct calendar_descriptor *calendar = CONTAINER_OF(dev, struct calendar_descriptor, device);
+
+ struct calendar_alarm *head, *it, current_dt;
+
+ if ((calendar->flags & SET_ALARM_BUSY) || (calendar->flags & PROCESS_ALARM_BUSY)) {
+ calendar->flags |= PROCESS_ALARM_BUSY;
+ return;
+ }
+
+ /* get current timestamp */
+ current_dt.cal_alarm.timestamp = _calendar_get_counter(dev);
+
+ /* get the head */
+ head = (struct calendar_alarm *)list_get_head(&calendar->alarms);
+ ASSERT(head);
+
+ /* remove all alarms and invoke them*/
+ for (it = head; it; it = (struct calendar_alarm *)list_get_head(&calendar->alarms)) {
+ /* check the timestamp with current timestamp*/
+ if (it->cal_alarm.timestamp <= current_dt.cal_alarm.timestamp) {
+ list_remove_head(&calendar->alarms);
+ it->callback(calendar);
+
+ if (it->cal_alarm.mode == REPEAT) {
+ calibrate_timestamp(calendar, it, &current_dt);
+ convert_timestamp_to_datetime(calendar, it->cal_alarm.timestamp, &it->cal_alarm.datetime);
+ calendar_add_new_alarm(&calendar->alarms, it);
+ }
+ } else {
+ break;
+ }
+ }
+
+ /*if no alarm in the list, register null */
+ if (!it) {
+ _calendar_register_callback(&calendar->device, NULL);
+ return;
+ }
+
+ /*put the new head into register */
+ _calendar_set_comp(&calendar->device, it->cal_alarm.timestamp);
+}
+
+/** \brief Initialize Calendar
+ */
+int32_t calendar_init(struct calendar_descriptor *const calendar, const void *hw)
+{
+ int32_t ret = 0;
+
+ /* Sanity check arguments */
+ ASSERT(calendar);
+
+ if (calendar->device.hw == hw) {
+ /* Already initialized with current configuration */
+ return ERR_NONE;
+ } else if (calendar->device.hw != NULL) {
+ /* Initialized with another configuration */
+ return ERR_ALREADY_INITIALIZED;
+ }
+ calendar->device.hw = (void *)hw;
+ ret = _calendar_init(&calendar->device);
+ calendar->base_year = DEFAULT_BASE_YEAR;
+
+ return ret;
+}
+
+/** \brief Reset the Calendar
+ */
+int32_t calendar_deinit(struct calendar_descriptor *const calendar)
+{
+ /* Sanity check arguments */
+ ASSERT(calendar);
+
+ if (calendar->device.hw == NULL) {
+ return ERR_NOT_INITIALIZED;
+ }
+ _calendar_deinit(&calendar->device);
+ calendar->device.hw = NULL;
+
+ return ERR_NONE;
+}
+
+/** \brief Enable the Calendar
+ */
+int32_t calendar_enable(struct calendar_descriptor *const calendar)
+{
+ /* Sanity check arguments */
+ ASSERT(calendar);
+
+ _calendar_enable(&calendar->device);
+
+ return ERR_NONE;
+}
+
+/** \brief Disable the Calendar
+ */
+int32_t calendar_disable(struct calendar_descriptor *const calendar)
+{
+ /* Sanity check arguments */
+ ASSERT(calendar);
+
+ _calendar_disable(&calendar->device);
+
+ return ERR_NONE;
+}
+
+/** \brief Set base year for calendar
+ */
+int32_t calendar_set_baseyear(struct calendar_descriptor *const calendar, const uint32_t p_base_year)
+{
+ /* Sanity check arguments */
+ ASSERT(calendar);
+
+ calendar->base_year = p_base_year;
+
+ return ERR_NONE;
+}
+
+/** \brief Set time for calendar
+ */
+int32_t calendar_set_time(struct calendar_descriptor *const calendar, struct calendar_time *const p_calendar_time)
+{
+ struct calendar_date_time dt;
+ uint32_t current_ts, new_ts;
+
+ /* Sanity check arguments */
+ ASSERT(calendar);
+
+ /* convert time to timestamp */
+ current_ts = _calendar_get_counter(&calendar->device);
+ convert_timestamp_to_datetime(calendar, current_ts, &dt);
+ dt.time.sec = p_calendar_time->sec;
+ dt.time.min = p_calendar_time->min;
+ dt.time.hour = p_calendar_time->hour;
+
+ new_ts = convert_datetime_to_timestamp(calendar, &dt);
+
+ _calendar_set_counter(&calendar->device, new_ts);
+
+ return ERR_NONE;
+}
+
+/** \brief Set date for calendar
+ */
+int32_t calendar_set_date(struct calendar_descriptor *const calendar, struct calendar_date *const p_calendar_date)
+{
+ struct calendar_date_time dt;
+ uint32_t current_ts, new_ts;
+
+ /* Sanity check arguments */
+ ASSERT(calendar);
+
+ /* convert date to timestamp */
+ current_ts = _calendar_get_counter(&calendar->device);
+ convert_timestamp_to_datetime(calendar, current_ts, &dt);
+ dt.date.day = p_calendar_date->day;
+ dt.date.month = p_calendar_date->month;
+ dt.date.year = p_calendar_date->year;
+
+ new_ts = convert_datetime_to_timestamp(calendar, &dt);
+
+ _calendar_set_counter(&calendar->device, new_ts);
+
+ return ERR_NONE;
+}
+
+/** \brief Get date/time for calendar
+ */
+int32_t calendar_get_date_time(struct calendar_descriptor *const calendar, struct calendar_date_time *const date_time)
+{
+ uint32_t current_ts;
+
+ /* Sanity check arguments */
+ ASSERT(calendar);
+
+ /* convert current timestamp to date/time */
+ current_ts = _calendar_get_counter(&calendar->device);
+ convert_timestamp_to_datetime(calendar, current_ts, date_time);
+
+ return ERR_NONE;
+}
+
+/** \brief Set alarm for calendar
+ */
+int32_t calendar_set_alarm(struct calendar_descriptor *const calendar, struct calendar_alarm *const alarm,
+ calendar_cb_alarm_t callback)
+{
+ struct calendar_alarm *head;
+
+ /* Sanity check arguments */
+ ASSERT(calendar);
+ ASSERT(alarm);
+
+ alarm->callback = callback;
+
+ fill_alarm(calendar, alarm);
+
+ calendar->flags |= SET_ALARM_BUSY;
+
+ head = (struct calendar_alarm *)list_get_head(&calendar->alarms);
+
+ if (head != NULL) {
+ /* already added */
+ if (is_list_element(&calendar->alarms, alarm)) {
+ if (callback == NULL) {
+ /* remove alarm */
+ list_delete_element(&calendar->alarms, alarm);
+
+ if (!list_get_head(&calendar->alarms)) {
+ _calendar_register_callback(&calendar->device, NULL);
+ }
+ } else {
+ /* re-add */
+ list_delete_element(&calendar->alarms, alarm);
+ calendar_add_new_alarm(&calendar->alarms, alarm);
+ }
+ } else if (callback != NULL) {
+ calendar_add_new_alarm(&calendar->alarms, alarm);
+ }
+
+ calendar->flags &= ~SET_ALARM_BUSY;
+
+ if (calendar->flags & PROCESS_ALARM_BUSY) {
+ CRITICAL_SECTION_ENTER()
+ calendar->flags &= ~PROCESS_ALARM_BUSY;
+ _calendar_set_irq(&calendar->device);
+ CRITICAL_SECTION_LEAVE()
+ }
+ } else if (callback != NULL) {
+ /* if head is NULL, Register callback*/
+ _calendar_register_callback(&calendar->device, calendar_alarm);
+ calendar_add_new_alarm(&calendar->alarms, alarm);
+ }
+
+ calendar->flags &= ~SET_ALARM_BUSY;
+
+ return ERR_NONE;
+}
+
+/** \brief Retrieve driver version
+ * \return Current driver version
+ */
+uint32_t calendar_get_version(void)
+{
+ return CALENDAR_VERSION;
+}
diff --git a/watch-library/hal/src/hal_delay.c b/watch-library/hal/src/hal_delay.c
new file mode 100644
index 00000000..6f77cc70
--- /dev/null
+++ b/watch-library/hal/src/hal_delay.c
@@ -0,0 +1,80 @@
+/**
+ * \file
+ *
+ * \brief HAL delay related functionality implementation.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include <hpl_irq.h>
+#include <hpl_reset.h>
+#include <hpl_sleep.h>
+#include "hal_delay.h"
+#include <hpl_delay.h>
+
+/**
+ * \brief Driver version
+ */
+#define DRIVER_VERSION 0x00000001u
+
+/**
+ * \brief The pointer to a hardware instance used by the driver.
+ */
+static void *hardware;
+
+/**
+ * \brief Initialize Delay driver
+ */
+void delay_init(void *const hw)
+{
+ _delay_init(hardware = hw);
+}
+
+/**
+ * \brief Perform delay in us
+ */
+void delay_us(const uint16_t us)
+{
+ _delay_cycles(hardware, _get_cycles_for_us(us));
+}
+
+/**
+ * \brief Perform delay in ms
+ */
+void delay_ms(const uint16_t ms)
+{
+ _delay_cycles(hardware, _get_cycles_for_ms(ms));
+}
+
+/**
+ * \brief Retrieve the current driver version
+ */
+uint32_t delay_get_version(void)
+{
+ return DRIVER_VERSION;
+}
diff --git a/watch-library/hal/src/hal_ext_irq.c b/watch-library/hal/src/hal_ext_irq.c
new file mode 100644
index 00000000..d0b92927
--- /dev/null
+++ b/watch-library/hal/src/hal_ext_irq.c
@@ -0,0 +1,188 @@
+/**
+ * \file
+ *
+ * \brief External interrupt functionality imkplementation.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "hal_ext_irq.h"
+
+#define EXT_IRQ_AMOUNT 3
+
+/**
+ * \brief Driver version
+ */
+#define DRIVER_VERSION 0x00000001u
+
+/**
+ * \brief External IRQ struct
+ */
+struct ext_irq {
+ ext_irq_cb_t cb;
+ uint32_t pin;
+};
+
+/* Remove KEIL compiling error in case no IRQ line selected */
+#if EXT_IRQ_AMOUNT == 0
+#undef EXT_IRQ_AMOUNT
+#define EXT_IRQ_AMOUNT 1
+#endif
+
+/**
+ * \brief Array of external IRQs callbacks
+ */
+static struct ext_irq ext_irqs[EXT_IRQ_AMOUNT];
+
+static void process_ext_irq(const uint32_t pin);
+
+/**
+ * \brief Initialize external irq component if any
+ */
+int32_t ext_irq_init(void)
+{
+ uint16_t i;
+
+ for (i = 0; i < EXT_IRQ_AMOUNT; i++) {
+ ext_irqs[i].pin = 0xFFFFFFFF;
+ ext_irqs[i].cb = NULL;
+ }
+
+ return _ext_irq_init(process_ext_irq);
+}
+
+/**
+ * \brief Deinitialize external irq if any
+ */
+int32_t ext_irq_deinit(void)
+{
+ return _ext_irq_deinit();
+}
+
+/**
+ * \brief Register callback for the given external interrupt
+ */
+int32_t ext_irq_register(const uint32_t pin, ext_irq_cb_t cb)
+{
+ uint8_t i = 0, j = 0;
+ bool found = false;
+
+ for (; i < EXT_IRQ_AMOUNT; i++) {
+ if (ext_irqs[i].pin == pin) {
+ ext_irqs[i].cb = cb;
+ found = true;
+ break;
+ }
+ }
+
+ if (NULL == cb) {
+ if (!found) {
+ return ERR_INVALID_ARG;
+ }
+ return _ext_irq_enable(pin, false);
+ }
+
+ if (!found) {
+ for (i = 0; i < EXT_IRQ_AMOUNT; i++) {
+ if (NULL == ext_irqs[i].cb) {
+ ext_irqs[i].cb = cb;
+ ext_irqs[i].pin = pin;
+ found = true;
+ break;
+ }
+ }
+ for (; (j < EXT_IRQ_AMOUNT) && (i < EXT_IRQ_AMOUNT); j++) {
+ if ((ext_irqs[i].pin < ext_irqs[j].pin) && (ext_irqs[j].pin != 0xFFFFFFFF)) {
+ struct ext_irq tmp = ext_irqs[j];
+
+ ext_irqs[j] = ext_irqs[i];
+ ext_irqs[i] = tmp;
+ }
+ }
+ }
+
+ if (!found) {
+ return ERR_INVALID_ARG;
+ }
+
+ return _ext_irq_enable(pin, true);
+}
+
+/**
+ * \brief Enable external irq
+ */
+int32_t ext_irq_enable(const uint32_t pin)
+{
+ return _ext_irq_enable(pin, true);
+}
+
+/**
+ * \brief Disable external irq
+ */
+int32_t ext_irq_disable(const uint32_t pin)
+{
+ return _ext_irq_enable(pin, false);
+}
+
+/**
+ * \brief Retrieve the current driver version
+ */
+uint32_t ext_irq_get_version(void)
+{
+ return DRIVER_VERSION;
+}
+
+/**
+ * \brief Interrupt processing routine
+ *
+ * \param[in] pin The pin which triggered the interrupt
+ */
+static void process_ext_irq(const uint32_t pin)
+{
+ uint8_t lower = 0, middle, upper = EXT_IRQ_AMOUNT;
+
+ while (upper >= lower) {
+ middle = (upper + lower) >> 1;
+ if (middle >= EXT_IRQ_AMOUNT) {
+ return;
+ }
+
+ if (ext_irqs[middle].pin == pin) {
+ if (ext_irqs[middle].cb) {
+ ext_irqs[middle].cb();
+ }
+ return;
+ }
+
+ if (ext_irqs[middle].pin < pin) {
+ lower = middle + 1;
+ } else {
+ upper = middle - 1;
+ }
+ }
+}
diff --git a/watch-library/hal/src/hal_gpio.c b/watch-library/hal/src/hal_gpio.c
new file mode 100644
index 00000000..00dfea6f
--- /dev/null
+++ b/watch-library/hal/src/hal_gpio.c
@@ -0,0 +1,44 @@
+/**
+ * \file
+ *
+ * \brief Port
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "hal_gpio.h"
+
+/**
+ * \brief Driver version
+ */
+#define DRIVER_VERSION 0x00000001u
+
+uint32_t gpio_get_version(void)
+{
+ return DRIVER_VERSION;
+}
diff --git a/watch-library/hal/src/hal_i2c_m_sync.c b/watch-library/hal/src/hal_i2c_m_sync.c
new file mode 100644
index 00000000..30821a27
--- /dev/null
+++ b/watch-library/hal/src/hal_i2c_m_sync.c
@@ -0,0 +1,258 @@
+/**
+ * \file
+ *
+ * \brief I/O I2C related functionality implementation.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+#include <hal_i2c_m_sync.h>
+#include <utils.h>
+#include <utils_assert.h>
+
+/**
+ * \brief Driver version
+ */
+#define DRIVER_VERSION 0x00000001u
+
+/**
+ * \brief Sync version of I2C I/O read
+ */
+static int32_t i2c_m_sync_read(struct io_descriptor *io, uint8_t *buf, const uint16_t n)
+{
+ struct i2c_m_sync_desc *i2c = CONTAINER_OF(io, struct i2c_m_sync_desc, io);
+ struct _i2c_m_msg msg;
+ int32_t ret;
+
+ msg.addr = i2c->slave_addr;
+ msg.len = n;
+ msg.flags = I2C_M_STOP | I2C_M_RD;
+ msg.buffer = buf;
+
+ ret = _i2c_m_sync_transfer(&i2c->device, &msg);
+
+ if (ret) {
+ return ret;
+ }
+
+ return n;
+}
+
+/**
+ * \brief Sync version of I2C I/O write
+ */
+static int32_t i2c_m_sync_write(struct io_descriptor *io, const uint8_t *buf, const uint16_t n)
+{
+ struct i2c_m_sync_desc *i2c = CONTAINER_OF(io, struct i2c_m_sync_desc, io);
+ struct _i2c_m_msg msg;
+ int32_t ret;
+
+ msg.addr = i2c->slave_addr;
+ msg.len = n;
+ msg.flags = I2C_M_STOP;
+ msg.buffer = (uint8_t *)buf;
+
+ ret = _i2c_m_sync_transfer(&i2c->device, &msg);
+
+ if (ret) {
+ return ret;
+ }
+
+ return n;
+}
+
+/**
+ * \brief Sync version of i2c initialize
+ */
+int32_t i2c_m_sync_init(struct i2c_m_sync_desc *i2c, void *hw)
+{
+ int32_t init_status;
+ ASSERT(i2c);
+
+ init_status = _i2c_m_sync_init(&i2c->device, hw);
+ if (init_status) {
+ return init_status;
+ }
+
+ /* Init I/O */
+ i2c->io.read = i2c_m_sync_read;
+ i2c->io.write = i2c_m_sync_write;
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief deinitialize
+ */
+int32_t i2c_m_sync_deinit(struct i2c_m_sync_desc *i2c)
+{
+ int32_t status;
+ ASSERT(i2c);
+
+ status = _i2c_m_sync_deinit(&i2c->device);
+ if (status) {
+ return status;
+ }
+
+ i2c->io.read = NULL;
+ i2c->io.write = NULL;
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Sync version of i2c enable
+ */
+int32_t i2c_m_sync_enable(struct i2c_m_sync_desc *i2c)
+{
+ return _i2c_m_sync_enable(&i2c->device);
+}
+
+/**
+ * \brief Sync version of i2c disable
+ */
+int32_t i2c_m_sync_disable(struct i2c_m_sync_desc *i2c)
+{
+ return _i2c_m_sync_disable(&i2c->device);
+}
+
+/**
+ * \brief Sync version of i2c set slave address
+ */
+int32_t i2c_m_sync_set_slaveaddr(struct i2c_m_sync_desc *i2c, int16_t addr, int32_t addr_len)
+{
+ return i2c->slave_addr = (addr & 0x3ff) | (addr_len & I2C_M_TEN);
+}
+
+/**
+ * \brief Sync version of i2c set baudrate
+ */
+int32_t i2c_m_sync_set_baudrate(struct i2c_m_sync_desc *i2c, uint32_t clkrate, uint32_t baudrate)
+{
+ return _i2c_m_sync_set_baudrate(&i2c->device, clkrate, baudrate);
+}
+
+/**
+ * \brief Sync version of i2c write command
+ */
+int32_t i2c_m_sync_cmd_write(struct i2c_m_sync_desc *i2c, uint8_t reg, uint8_t *buffer, uint8_t length)
+{
+ struct _i2c_m_msg msg;
+ int32_t ret;
+
+ msg.addr = i2c->slave_addr;
+ msg.len = 1;
+ msg.flags = 0;
+ msg.buffer = &reg;
+
+ ret = _i2c_m_sync_transfer(&i2c->device, &msg);
+
+ if (ret != 0) {
+ /* error occurred */
+ return ret;
+ }
+
+ msg.flags = I2C_M_STOP;
+ msg.buffer = buffer;
+ msg.len = length;
+
+ ret = _i2c_m_sync_transfer(&i2c->device, &msg);
+
+ if (ret != 0) {
+ /* error occurred */
+ return ret;
+ }
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Sync version of i2c read command
+ */
+int32_t i2c_m_sync_cmd_read(struct i2c_m_sync_desc *i2c, uint8_t reg, uint8_t *buffer, uint8_t length)
+{
+ struct _i2c_m_msg msg;
+ int32_t ret;
+
+ msg.addr = i2c->slave_addr;
+ msg.len = 1;
+ msg.flags = 0;
+ msg.buffer = &reg;
+
+ ret = _i2c_m_sync_transfer(&i2c->device, &msg);
+
+ if (ret != 0) {
+ /* error occurred */
+ return ret;
+ }
+
+ msg.flags = I2C_M_STOP | I2C_M_RD;
+ msg.buffer = buffer;
+ msg.len = length;
+
+ ret = _i2c_m_sync_transfer(&i2c->device, &msg);
+
+ if (ret != 0) {
+ /* error occurred */
+ return ret;
+ }
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Sync version of i2c transfer command
+ */
+int32_t i2c_m_sync_transfer(struct i2c_m_sync_desc *const i2c, struct _i2c_m_msg *msg)
+{
+ return _i2c_m_sync_transfer(&i2c->device, msg);
+}
+
+/**
+ * \brief Sync version of i2c send stop condition command
+ */
+int32_t i2c_m_sync_send_stop(struct i2c_m_sync_desc *const i2c)
+{
+ return _i2c_m_sync_send_stop(&i2c->device);
+}
+
+/**
+ * \brief Retrieve I/O descriptor
+ */
+int32_t i2c_m_sync_get_io_descriptor(struct i2c_m_sync_desc *const i2c, struct io_descriptor **io)
+{
+ *io = &i2c->io;
+ return ERR_NONE;
+}
+
+/**
+ * \brief Retrieve the current driver version
+ */
+uint32_t i2c_m_sync_get_version(void)
+{
+ return DRIVER_VERSION;
+}
diff --git a/watch-library/hal/src/hal_init.c b/watch-library/hal/src/hal_init.c
new file mode 100644
index 00000000..fb65341f
--- /dev/null
+++ b/watch-library/hal/src/hal_init.c
@@ -0,0 +1,47 @@
+/**
+ * \file
+ *
+ * \brief HAL initialization related functionality implementation.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "hal_init.h"
+
+/**
+ * \brief Driver version
+ */
+#define HAL_INIT_VERSION 0x00000001u
+
+/**
+ * \brief Retrieve the current driver version
+ */
+uint32_t init_get_version(void)
+{
+ return HAL_INIT_VERSION;
+}
diff --git a/watch-library/hal/src/hal_io.c b/watch-library/hal/src/hal_io.c
new file mode 100644
index 00000000..7e8feb04
--- /dev/null
+++ b/watch-library/hal/src/hal_io.c
@@ -0,0 +1,63 @@
+/**
+ * \file
+ *
+ * \brief I/O functionality implementation.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include <hal_io.h>
+#include <utils_assert.h>
+
+/**
+ * \brief Driver version
+ */
+#define DRIVER_VERSION 0x00000001u
+
+uint32_t io_get_version(void)
+{
+ return DRIVER_VERSION;
+}
+
+/**
+ * \brief I/O write interface
+ */
+int32_t io_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length)
+{
+ ASSERT(io_descr && buf);
+ return io_descr->write(io_descr, buf, length);
+}
+
+/**
+ * \brief I/O read interface
+ */
+int32_t io_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length)
+{
+ ASSERT(io_descr && buf);
+ return io_descr->read(io_descr, buf, length);
+}
diff --git a/watch-library/hal/src/hal_pwm.c b/watch-library/hal/src/hal_pwm.c
new file mode 100644
index 00000000..bc0629fd
--- /dev/null
+++ b/watch-library/hal/src/hal_pwm.c
@@ -0,0 +1,160 @@
+/**
+ * \file
+ *
+ * \brief PWM functionality implementation.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "hal_pwm.h"
+#include <utils_assert.h>
+#include <utils.h>
+
+/**
+ * \brief Driver version
+ */
+#define DRIVER_VERSION 0x00000001u
+
+static void pwm_period_expired(struct _pwm_device *device);
+static void pwm_detect_fault(struct _pwm_device *device);
+
+/**
+ * \brief Initialize pwm
+ */
+int32_t pwm_init(struct pwm_descriptor *const descr, void *const hw, struct _pwm_hpl_interface *const func)
+{
+ ASSERT(descr && hw && func);
+ descr->func = func;
+ descr->func->init(&descr->device, hw);
+ descr->device.callback.pwm_period_cb = pwm_period_expired;
+ descr->device.callback.pwm_error_cb = pwm_detect_fault;
+ return ERR_NONE;
+}
+
+/**
+ * \brief Deinitialize pwm
+ */
+int32_t pwm_deinit(struct pwm_descriptor *const descr)
+{
+ ASSERT(descr && descr->func);
+ descr->func->deinit(&descr->device);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Start pwm
+ */
+int32_t pwm_enable(struct pwm_descriptor *const descr)
+{
+ ASSERT(descr && descr->func);
+ if (descr->func->is_pwm_enabled(&descr->device)) {
+ return ERR_DENIED;
+ }
+ descr->func->start_pwm(&descr->device);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Stop pwm
+ */
+int32_t pwm_disable(struct pwm_descriptor *const descr)
+{
+ ASSERT(descr && descr->func);
+ if (!descr->func->is_pwm_enabled(&descr->device)) {
+ return ERR_DENIED;
+ }
+ descr->func->stop_pwm(&descr->device);
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Register PWM callback
+ */
+int32_t pwm_register_callback(struct pwm_descriptor *const descr, enum pwm_callback_type type, pwm_cb_t cb)
+{
+ switch (type) {
+ case PWM_PERIOD_CB:
+ descr->pwm_cb.period = cb;
+ break;
+
+ case PWM_ERROR_CB:
+ descr->pwm_cb.error = cb;
+ break;
+
+ default:
+ return ERR_INVALID_ARG;
+ }
+ ASSERT(descr && descr->func);
+ descr->func->set_irq_state(&descr->device, (enum _pwm_callback_type)type, NULL != cb);
+ return ERR_NONE;
+}
+
+/**
+ * \brief Change PWM parameter
+ */
+int32_t pwm_set_parameters(struct pwm_descriptor *const descr, const pwm_period_t period, const pwm_period_t duty_cycle)
+{
+ ASSERT(descr && descr->func);
+ descr->func->set_pwm_param(&descr->device, period, duty_cycle);
+ return ERR_NONE;
+}
+
+/**
+ * \brief Retrieve the current driver version
+ */
+uint32_t pwm_get_version(void)
+{
+ return DRIVER_VERSION;
+}
+
+/**
+ * \internal Process interrupts caused by period experied
+ */
+static void pwm_period_expired(struct _pwm_device *device)
+{
+ struct pwm_descriptor *const descr = CONTAINER_OF(device, struct pwm_descriptor, device);
+
+ if (descr->pwm_cb.period) {
+ descr->pwm_cb.period(descr);
+ }
+}
+
+/**
+ * \internal Process interrupts caused by pwm fault
+ */
+static void pwm_detect_fault(struct _pwm_device *device)
+{
+ struct pwm_descriptor *const descr = CONTAINER_OF(device, struct pwm_descriptor, device);
+
+ if (descr->pwm_cb.error) {
+ descr->pwm_cb.error(descr);
+ }
+}
diff --git a/watch-library/hal/src/hal_slcd_sync.c b/watch-library/hal/src/hal_slcd_sync.c
new file mode 100644
index 00000000..573eb0e2
--- /dev/null
+++ b/watch-library/hal/src/hal_slcd_sync.c
@@ -0,0 +1,150 @@
+/**
+ * \file
+ *
+ * \brief SLCD Segment Liquid Crystal Display Controller(Sync) functionality
+ * declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include <hal_slcd_sync.h>
+#include <utils_assert.h>
+
+/**
+ * \brief Initialize SLCD Descriptor
+ */
+int32_t slcd_sync_init(struct slcd_sync_descriptor *const descr, void *const hw)
+{
+ ASSERT(descr && hw);
+ return _slcd_sync_init(&descr->dev, hw);
+}
+
+/**
+ * \brief Deinitialize SLCD Descriptor
+ */
+int32_t slcd_sync_deinit(struct slcd_sync_descriptor *const descr)
+{
+ ASSERT(descr);
+ return _slcd_sync_deinit(&descr->dev);
+}
+
+/**
+ * \brief Enable SLCD driver
+ *
+ */
+int32_t slcd_sync_enable(struct slcd_sync_descriptor *const descr)
+{
+ ASSERT(descr);
+ return _slcd_sync_enable(&descr->dev);
+}
+/**
+ * \brief Disable SLCD driver
+ *
+ */
+int32_t slcd_sync_disable(struct slcd_sync_descriptor *const descr)
+{
+ ASSERT(descr);
+ return _slcd_sync_disable(&descr->dev);
+}
+/**
+ * \brief Turn on a Segment
+ */
+int32_t slcd_sync_seg_on(struct slcd_sync_descriptor *const descr, uint32_t seg)
+{
+ ASSERT(descr);
+ return _slcd_sync_seg_on(&descr->dev, seg);
+}
+/**
+ * \brief Turn off a Segment
+ */
+int32_t slcd_sync_seg_off(struct slcd_sync_descriptor *const descr, uint32_t seg)
+{
+ ASSERT(descr);
+ return _slcd_sync_seg_off(&descr->dev, seg);
+}
+/**
+ * \brief Blink a Segment
+ */
+int32_t slcd_sync_seg_blink(struct slcd_sync_descriptor *const descr, uint32_t seg, const uint32_t period)
+{
+ ASSERT(descr && period);
+ return _slcd_sync_seg_blink(&descr->dev, seg, period);
+}
+
+/**
+ * \brief Displays a character
+ */
+int32_t slcd_sync_write_char(struct slcd_sync_descriptor *const descr, const uint8_t character, uint32_t index)
+{
+ ASSERT(descr);
+ return _slcd_sync_write_char(&descr->dev, character, index);
+}
+
+/**
+ * \brief Displays character string string
+ */
+int32_t slcd_sync_write_string(struct slcd_sync_descriptor *const descr, uint8_t *const str, uint32_t len,
+ uint32_t index)
+{
+ uint32_t i;
+ ASSERT(descr && len);
+
+ for (i = 0; i < len; i++) {
+ if (_slcd_sync_write_char(&descr->dev, *(str + i), index + i) != ERR_NONE) {
+ return ERR_INVALID_ARG;
+ }
+ }
+ return ERR_NONE;
+}
+/**
+ * \brief Start animation play by a segment array
+ */
+int32_t slcd_sync_start_animation(struct slcd_sync_descriptor *const descr, const uint32_t segs[], uint32_t len,
+ const uint32_t period)
+{
+ ASSERT(descr && segs && len && period);
+ return _slcd_sync_start_animation(&descr->dev, segs, len, period);
+}
+
+/**
+ * \brief Stop animation play by a segment array
+ */
+int32_t slcd_sync_stop_animation(struct slcd_sync_descriptor *const descr, const uint32_t segs[], uint32_t len)
+{
+ ASSERT(descr && segs && len);
+ return _slcd_sync_stop_animation(&descr->dev, segs, len);
+}
+
+/**
+ * \brief Set animation Frequency
+ */
+int32_t slcd_sync_set_animation_period(struct slcd_sync_descriptor *const descr, const uint32_t period)
+{
+ ASSERT(descr && period);
+ return _slcd_sync_set_animation_period(&descr->dev, period);
+}
diff --git a/watch-library/hal/src/hal_sleep.c b/watch-library/hal/src/hal_sleep.c
new file mode 100644
index 00000000..89472f15
--- /dev/null
+++ b/watch-library/hal/src/hal_sleep.c
@@ -0,0 +1,73 @@
+/**
+ * \file
+ *
+ * \brief Sleep related functionality implementation.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "hal_sleep.h"
+#include <hpl_sleep.h>
+
+/**
+ * \brief Driver version
+ */
+#define DRIVER_VERSION 0x00000001u
+
+/**
+ * \brief Set the sleep mode of the device and put the MCU to sleep
+ *
+ * For an overview of which systems are disabled in sleep for the different
+ * sleep modes, see the data sheet.
+ *
+ * \param[in] mode Sleep mode to use
+ *
+ * \return The status of a sleep request
+ * \retval -1 The requested sleep mode was invalid or not available
+ * \retval 0 The operation completed successfully, returned after leaving the
+ * sleep
+ */
+int sleep(const uint8_t mode)
+{
+ if (ERR_NONE != _set_sleep_mode(mode))
+ return ERR_INVALID_ARG;
+
+ _go_to_sleep();
+
+ return ERR_NONE;
+}
+
+/**
+ * \brief Retrieve the current driver version
+ *
+ * \return Current driver version
+ */
+uint32_t sleep_get_version(void)
+{
+ return DRIVER_VERSION;
+}
diff --git a/watch-library/hal/utils/include/compiler.h b/watch-library/hal/utils/include/compiler.h
new file mode 100644
index 00000000..f35db3df
--- /dev/null
+++ b/watch-library/hal/utils/include/compiler.h
@@ -0,0 +1,64 @@
+/**
+ * \file
+ *
+ * \brief Header
+ *
+ * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
+ */
+
+/******************************************************************************
+ * compiler.h
+ *
+ * Created: 05.05.2014
+ * Author: N. Fomin
+ ******************************************************************************/
+
+#ifndef _COMPILER_H
+#define _COMPILER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifndef _UNIT_TEST_
+#include "parts.h"
+#endif
+#include "err_codes.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _COMPILER_H */
diff --git a/watch-library/hal/utils/include/err_codes.h b/watch-library/hal/utils/include/err_codes.h
new file mode 100644
index 00000000..a7aff018
--- /dev/null
+++ b/watch-library/hal/utils/include/err_codes.h
@@ -0,0 +1,73 @@
+/**
+ * \file
+ *
+ * \brief Error code definitions.
+ *
+ * This file defines various status codes returned by functions,
+ * indicating success or failure as well as what kind of failure.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef ERROR_CODES_H_INCLUDED
+#define ERROR_CODES_H_INCLUDED
+
+#define ERR_NONE 0
+#define ERR_INVALID_DATA -1
+#define ERR_NO_CHANGE -2
+#define ERR_ABORTED -3
+#define ERR_BUSY -4
+#define ERR_SUSPEND -5
+#define ERR_IO -6
+#define ERR_REQ_FLUSHED -7
+#define ERR_TIMEOUT -8
+#define ERR_BAD_DATA -9
+#define ERR_NOT_FOUND -10
+#define ERR_UNSUPPORTED_DEV -11
+#define ERR_NO_MEMORY -12
+#define ERR_INVALID_ARG -13
+#define ERR_BAD_ADDRESS -14
+#define ERR_BAD_FORMAT -15
+#define ERR_BAD_FRQ -16
+#define ERR_DENIED -17
+#define ERR_ALREADY_INITIALIZED -18
+#define ERR_OVERFLOW -19
+#define ERR_NOT_INITIALIZED -20
+#define ERR_SAMPLERATE_UNAVAILABLE -21
+#define ERR_RESOLUTION_UNAVAILABLE -22
+#define ERR_BAUDRATE_UNAVAILABLE -23
+#define ERR_PACKET_COLLISION -24
+#define ERR_PROTOCOL -25
+#define ERR_PIN_MUX_INVALID -26
+#define ERR_UNSUPPORTED_OP -27
+#define ERR_NO_RESOURCE -28
+#define ERR_NOT_READY -29
+#define ERR_FAILURE -30
+#define ERR_WRONG_LENGTH -31
+
+#endif
diff --git a/watch-library/hal/utils/include/events.h b/watch-library/hal/utils/include/events.h
new file mode 100644
index 00000000..3ee891a7
--- /dev/null
+++ b/watch-library/hal/utils/include/events.h
@@ -0,0 +1,54 @@
+/**
+ * \file
+ *
+ * \brief Events declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _EVENTS_H_INCLUDED
+#define _EVENTS_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <compiler.h>
+
+/**
+ * \brief List of events. Must start with 0, be unique and follow numerical order.
+ */
+#define EVENT_IS_READY_TO_SLEEP_ID 0
+#define EVENT_PREPARE_TO_SLEEP_ID 1
+#define EVENT_WOKEN_UP_ID 2
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _EVENTS_H_INCLUDED */
diff --git a/watch-library/hal/utils/include/parts.h b/watch-library/hal/utils/include/parts.h
new file mode 100644
index 00000000..df30040f
--- /dev/null
+++ b/watch-library/hal/utils/include/parts.h
@@ -0,0 +1,41 @@
+/**
+ * \file
+ *
+ * \brief Atmel part identification macros
+ *
+ * Copyright (c) 2015-2019 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef ATMEL_PARTS_H
+#define ATMEL_PARTS_H
+
+#include "saml22.h"
+
+#include "hri_l22.h"
+
+#endif /* ATMEL_PARTS_H */
diff --git a/watch-library/hal/utils/include/utils.h b/watch-library/hal/utils/include/utils.h
new file mode 100644
index 00000000..1cf26996
--- /dev/null
+++ b/watch-library/hal/utils/include/utils.h
@@ -0,0 +1,368 @@
+/**
+ * \file
+ *
+ * \brief Different macros.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef UTILS_H_INCLUDED
+#define UTILS_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_utils_macro
+ *
+ * @{
+ */
+
+/**
+ * \brief Retrieve pointer to parent structure
+ */
+#define CONTAINER_OF(ptr, type, field_name) ((type *)(((uint8_t *)ptr) - offsetof(type, field_name)))
+
+/**
+ * \brief Retrieve array size
+ */
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
+
+/**
+ * \brief Emit the compiler pragma \a arg.
+ *
+ * \param[in] arg The pragma directive as it would appear after \e \#pragma
+ * (i.e. not stringified).
+ */
+#define COMPILER_PRAGMA(arg) _Pragma(#arg)
+
+/**
+ * \def COMPILER_PACK_SET(alignment)
+ * \brief Set maximum alignment for subsequent struct and union definitions to \a alignment.
+ */
+#define COMPILER_PACK_SET(alignment) COMPILER_PRAGMA(pack(alignment))
+
+/**
+ * \def COMPILER_PACK_RESET()
+ * \brief Set default alignment for subsequent struct and union definitions.
+ */
+#define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack())
+
+/**
+ * \brief Set aligned boundary.
+ */
+#if defined __GNUC__
+#define COMPILER_ALIGNED(a) __attribute__((__aligned__(a)))
+#elif defined __ICCARM__
+#define COMPILER_ALIGNED(a) COMPILER_PRAGMA(data_alignment = a)
+#elif defined __CC_ARM
+#define COMPILER_ALIGNED(a) __attribute__((__aligned__(a)))
+#endif
+
+/**
+ * \brief Flash located data macros
+ */
+#if defined __GNUC__
+#define PROGMEM_DECLARE(type, name) const type name
+#define PROGMEM_T const
+#define PROGMEM_READ_BYTE(x) *((uint8_t *)(x))
+#define PROGMEM_PTR_T const *
+#define PROGMEM_STRING_T const uint8_t *
+#elif defined __ICCARM__
+#define PROGMEM_DECLARE(type, name) const type name
+#define PROGMEM_T const
+#define PROGMEM_READ_BYTE(x) *((uint8_t *)(x))
+#define PROGMEM_PTR_T const *
+#define PROGMEM_STRING_T const uint8_t *
+#elif defined __CC_ARM
+#define PROGMEM_DECLARE(type, name) const type name
+#define PROGMEM_T const
+#define PROGMEM_READ_BYTE(x) *((uint8_t *)(x))
+#define PROGMEM_PTR_T const *
+#define PROGMEM_STRING_T const uint8_t *
+#endif
+
+/**
+ * \brief Optimization
+ */
+#if defined __GNUC__
+#define OPTIMIZE_HIGH __attribute__((optimize(s)))
+#elif defined __CC_ARM
+#define OPTIMIZE_HIGH _Pragma("O3")
+#elif defined __ICCARM__
+#define OPTIMIZE_HIGH _Pragma("optimize=high")
+#endif
+
+/**
+ * \brief RAM located function attribute
+ */
+#if defined(__CC_ARM) /* Keil ?Vision 4 */
+#define RAMFUNC __attribute__((section(".ramfunc")))
+#elif defined(__ICCARM__) /* IAR Ewarm 5.41+ */
+#define RAMFUNC __ramfunc
+#elif defined(__GNUC__) /* GCC CS3 2009q3-68 */
+#define RAMFUNC __attribute__((section(".ramfunc")))
+#endif
+
+/**
+ * \brief No-init section.
+ * Place a data object or a function in a no-init section.
+ */
+#if defined(__CC_ARM)
+#define NO_INIT(a) __attribute__((zero_init))
+#elif defined(__ICCARM__)
+#define NO_INIT(a) __no_init
+#elif defined(__GNUC__)
+#define NO_INIT(a) __attribute__((section(".no_init")))
+#endif
+
+/**
+ * \brief Set user-defined section.
+ * Place a data object or a function in a user-defined section.
+ */
+#if defined(__CC_ARM)
+#define COMPILER_SECTION(a) __attribute__((__section__(a)))
+#elif defined(__ICCARM__)
+#define COMPILER_SECTION(a) COMPILER_PRAGMA(location = a)
+#elif defined(__GNUC__)
+#define COMPILER_SECTION(a) __attribute__((__section__(a)))
+#endif
+
+/**
+ * \brief Define WEAK attribute.
+ */
+#if defined(__CC_ARM) /* Keil ?Vision 4 */
+#define WEAK __attribute__((weak))
+#elif defined(__ICCARM__) /* IAR Ewarm 5.41+ */
+#define WEAK __weak
+#elif defined(__GNUC__) /* GCC CS3 2009q3-68 */
+#define WEAK __attribute__((weak))
+#endif
+
+/**
+ * \brief Pointer to function
+ */
+typedef void (*FUNC_PTR)(void);
+
+#define LE_BYTE0(a) ((uint8_t)(a))
+#define LE_BYTE1(a) ((uint8_t)((a) >> 8))
+#define LE_BYTE2(a) ((uint8_t)((a) >> 16))
+#define LE_BYTE3(a) ((uint8_t)((a) >> 24))
+
+#define LE_2_U16(p) ((p)[0] + ((p)[1] << 8))
+#define LE_2_U32(p) ((p)[0] + ((p)[1] << 8) + ((p)[2] << 16) + ((p)[3] << 24))
+
+/** \name Zero-Bit Counting
+ *
+ * Under GCC, __builtin_clz and __builtin_ctz behave like macros when
+ * applied to constant expressions (values known at compile time), so they are
+ * more optimized than the use of the corresponding assembly instructions and
+ * they can be used as constant expressions e.g. to initialize objects having
+ * static storage duration, and like the corresponding assembly instructions
+ * when applied to non-constant expressions (values unknown at compile time), so
+ * they are more optimized than an assembly periphrasis. Hence, clz and ctz
+ * ensure a possible and optimized behavior for both constant and non-constant
+ * expressions.
+ *
+ * @{ */
+
+/** \brief Counts the leading zero bits of the given value considered as a 32-bit integer.
+ *
+ * \param[in] u Value of which to count the leading zero bits.
+ *
+ * \return The count of leading zero bits in \a u.
+ */
+#if (defined __GNUC__) || (defined __CC_ARM)
+#define clz(u) __builtin_clz(u)
+#else
+#define clz(u) \
+ ( \
+ ((u) == 0) \
+ ? 32 \
+ : ((u) & (1ul << 31)) \
+ ? 0 \
+ : ((u) & (1ul << 30)) \
+ ? 1 \
+ : ((u) & (1ul << 29)) \
+ ? 2 \
+ : ((u) & (1ul << 28)) \
+ ? 3 \
+ : ((u) & (1ul << 27)) \
+ ? 4 \
+ : ((u) & (1ul << 26)) \
+ ? 5 \
+ : ((u) & (1ul << 25)) \
+ ? 6 \
+ : ((u) & (1ul << 24)) \
+ ? 7 \
+ : ((u) & (1ul << 23)) \
+ ? 8 \
+ : ((u) & (1ul << 22)) \
+ ? 9 \
+ : ((u) & (1ul << 21)) \
+ ? 10 \
+ : ((u) & (1ul << 20)) \
+ ? 11 \
+ : ((u) & (1ul << 19)) \
+ ? 12 \
+ : ((u) & (1ul << 18)) \
+ ? 13 \
+ : ((u) & (1ul << 17)) ? 14 \
+ : ((u) & (1ul << 16)) ? 15 \
+ : ((u) & (1ul << 15)) ? 16 \
+ : ((u) & (1ul << 14)) ? 17 \
+ : ((u) & (1ul << 13)) ? 18 \
+ : ((u) & (1ul << 12)) ? 19 \
+ : ((u) \
+ & (1ul \
+ << 11)) \
+ ? 20 \
+ : ((u) \
+ & (1ul \
+ << 10)) \
+ ? 21 \
+ : ((u) \
+ & (1ul \
+ << 9)) \
+ ? 22 \
+ : ((u) \
+ & (1ul \
+ << 8)) \
+ ? 23 \
+ : ((u) & (1ul << 7)) ? 24 \
+ : ((u) & (1ul << 6)) ? 25 \
+ : ((u) \
+ & (1ul \
+ << 5)) \
+ ? 26 \
+ : ((u) & (1ul << 4)) ? 27 \
+ : ((u) & (1ul << 3)) ? 28 \
+ : ((u) & (1ul << 2)) ? 29 \
+ : ( \
+ (u) & (1ul << 1)) \
+ ? 30 \
+ : 31)
+#endif
+
+/** \brief Counts the trailing zero bits of the given value considered as a 32-bit integer.
+ *
+ * \param[in] u Value of which to count the trailing zero bits.
+ *
+ * \return The count of trailing zero bits in \a u.
+ */
+#if (defined __GNUC__) || (defined __CC_ARM)
+#define ctz(u) __builtin_ctz(u)
+#else
+#define ctz(u) \
+ ( \
+ (u) & (1ul << 0) \
+ ? 0 \
+ : (u) & (1ul << 1) \
+ ? 1 \
+ : (u) & (1ul << 2) \
+ ? 2 \
+ : (u) & (1ul << 3) \
+ ? 3 \
+ : (u) & (1ul << 4) \
+ ? 4 \
+ : (u) & (1ul << 5) \
+ ? 5 \
+ : (u) & (1ul << 6) \
+ ? 6 \
+ : (u) & (1ul << 7) \
+ ? 7 \
+ : (u) & (1ul << 8) \
+ ? 8 \
+ : (u) & (1ul << 9) \
+ ? 9 \
+ : (u) & (1ul << 10) \
+ ? 10 \
+ : (u) & (1ul << 11) \
+ ? 11 \
+ : (u) & (1ul << 12) \
+ ? 12 \
+ : (u) & (1ul << 13) \
+ ? 13 \
+ : (u) & (1ul << 14) \
+ ? 14 \
+ : (u) & (1ul << 15) \
+ ? 15 \
+ : (u) & (1ul << 16) \
+ ? 16 \
+ : (u) & (1ul << 17) \
+ ? 17 \
+ : (u) & (1ul << 18) \
+ ? 18 \
+ : (u) & (1ul << 19) ? 19 \
+ : (u) & (1ul << 20) ? 20 \
+ : (u) & (1ul << 21) ? 21 \
+ : (u) & (1ul << 22) ? 22 \
+ : (u) & (1ul << 23) ? 23 \
+ : (u) & (1ul << 24) ? 24 \
+ : (u) & (1ul << 25) ? 25 \
+ : (u) & (1ul << 26) ? 26 \
+ : (u) & (1ul << 27) ? 27 \
+ : (u) & (1ul << 28) ? 28 : (u) & (1ul << 29) ? 29 : (u) & (1ul << 30) ? 30 : (u) & (1ul << 31) ? 31 : 32)
+#endif
+/** @} */
+
+/**
+ * \brief Counts the number of bits in a mask (no more than 32 bits)
+ * \param[in] mask Mask of which to count the bits.
+ */
+#define size_of_mask(mask) (32 - clz(mask) - ctz(mask))
+
+/**
+ * \brief Retrieve the start position of bits mask (no more than 32 bits)
+ * \param[in] mask Mask of which to retrieve the start position.
+ */
+#define pos_of_mask(mask) ctz(mask)
+
+/**
+ * \brief Return division result of a/b and round up the result to the closest
+ * number divisible by "b"
+ */
+#define round_up(a, b) (((a)-1) / (b) + 1)
+
+/**
+ * \brief Get the minimum of x and y
+ */
+#define min(x, y) ((x) > (y) ? (y) : (x))
+
+/**
+ * \brief Get the maximum of x and y
+ */
+#define max(x, y) ((x) > (y) ? (x) : (y))
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* UTILS_H_INCLUDED */
diff --git a/watch-library/hal/utils/include/utils_assert.h b/watch-library/hal/utils/include/utils_assert.h
new file mode 100644
index 00000000..c2328d6c
--- /dev/null
+++ b/watch-library/hal/utils/include/utils_assert.h
@@ -0,0 +1,93 @@
+/**
+ * \file
+ *
+ * \brief Asserts related functionality.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _ASSERT_H_INCLUDED
+#define _ASSERT_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <compiler.h>
+
+#ifndef USE_SIMPLE_ASSERT
+//# define USE_SIMPLE_ASSERT
+#endif
+
+/**
+ * \brief Assert macro
+ *
+ * This macro is used to throw asserts. It can be mapped to different function
+ * based on debug level.
+ *
+ * \param[in] condition A condition to be checked;
+ * assert is thrown if the given condition is false
+ */
+#define ASSERT(condition) ASSERT_IMPL((condition), __FILE__, __LINE__)
+
+#ifdef DEBUG
+
+#ifdef USE_SIMPLE_ASSERT
+#define ASSERT_IMPL(condition, file, line) \
+ if (!(condition)) \
+ __asm("BKPT #0");
+#else
+#define ASSERT_IMPL(condition, file, line) assert((condition), file, line)
+#endif
+
+#else /* DEBUG */
+
+#ifdef USE_SIMPLE_ASSERT
+#define ASSERT_IMPL(condition, file, line) ((void)0)
+#else
+#define ASSERT_IMPL(condition, file, line) ((void)0)
+#endif
+
+#endif /* DEBUG */
+
+/**
+ * \brief Assert function
+ *
+ * This function is used to throw asserts.
+ *
+ * \param[in] condition A condition to be checked; assert is thrown if the given
+ * condition is false
+ * \param[in] file File name
+ * \param[in] line Line number
+ */
+void assert(const bool condition, const char *const file, const int line);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _ASSERT_H_INCLUDED */
diff --git a/watch-library/hal/utils/include/utils_decrement_macro.h b/watch-library/hal/utils/include/utils_decrement_macro.h
new file mode 100644
index 00000000..2b524699
--- /dev/null
+++ b/watch-library/hal/utils/include/utils_decrement_macro.h
@@ -0,0 +1,309 @@
+/**
+ * \file
+ *
+ * \brief Decrement macro.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _UTILS_DECREMENT_MACRO_H
+#define _UTILS_DECREMENT_MACRO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Compile time decrement, result value is entire integer literal
+ *
+ * \param[in] val - value to be decremented
+ */
+#define DEC_VALUE(val) DEC_##val
+
+// Preprocessor increment implementation
+#define DEC_256 255
+#define DEC_255 254
+#define DEC_254 253
+#define DEC_253 252
+#define DEC_252 251
+#define DEC_251 250
+#define DEC_250 249
+#define DEC_249 248
+#define DEC_248 247
+#define DEC_247 246
+#define DEC_246 245
+#define DEC_245 244
+#define DEC_244 243
+#define DEC_243 242
+#define DEC_242 241
+#define DEC_241 240
+#define DEC_240 239
+#define DEC_239 238
+#define DEC_238 237
+#define DEC_237 236
+#define DEC_236 235
+#define DEC_235 234
+#define DEC_234 233
+#define DEC_233 232
+#define DEC_232 231
+#define DEC_231 230
+#define DEC_230 229
+#define DEC_229 228
+#define DEC_228 227
+#define DEC_227 226
+#define DEC_226 225
+#define DEC_225 224
+#define DEC_224 223
+#define DEC_223 222
+#define DEC_222 221
+#define DEC_221 220
+#define DEC_220 219
+#define DEC_219 218
+#define DEC_218 217
+#define DEC_217 216
+#define DEC_216 215
+#define DEC_215 214
+#define DEC_214 213
+#define DEC_213 212
+#define DEC_212 211
+#define DEC_211 210
+#define DEC_210 209
+#define DEC_209 208
+#define DEC_208 207
+#define DEC_207 206
+#define DEC_206 205
+#define DEC_205 204
+#define DEC_204 203
+#define DEC_203 202
+#define DEC_202 201
+#define DEC_201 200
+#define DEC_200 199
+#define DEC_199 198
+#define DEC_198 197
+#define DEC_197 196
+#define DEC_196 195
+#define DEC_195 194
+#define DEC_194 193
+#define DEC_193 192
+#define DEC_192 191
+#define DEC_191 190
+#define DEC_190 189
+#define DEC_189 188
+#define DEC_188 187
+#define DEC_187 186
+#define DEC_186 185
+#define DEC_185 184
+#define DEC_184 183
+#define DEC_183 182
+#define DEC_182 181
+#define DEC_181 180
+#define DEC_180 179
+#define DEC_179 178
+#define DEC_178 177
+#define DEC_177 176
+#define DEC_176 175
+#define DEC_175 174
+#define DEC_174 173
+#define DEC_173 172
+#define DEC_172 171
+#define DEC_171 170
+#define DEC_170 169
+#define DEC_169 168
+#define DEC_168 167
+#define DEC_167 166
+#define DEC_166 165
+#define DEC_165 164
+#define DEC_164 163
+#define DEC_163 162
+#define DEC_162 161
+#define DEC_161 160
+#define DEC_160 159
+#define DEC_159 158
+#define DEC_158 157
+#define DEC_157 156
+#define DEC_156 155
+#define DEC_155 154
+#define DEC_154 153
+#define DEC_153 152
+#define DEC_152 151
+#define DEC_151 150
+#define DEC_150 149
+#define DEC_149 148
+#define DEC_148 147
+#define DEC_147 146
+#define DEC_146 145
+#define DEC_145 144
+#define DEC_144 143
+#define DEC_143 142
+#define DEC_142 141
+#define DEC_141 140
+#define DEC_140 139
+#define DEC_139 138
+#define DEC_138 137
+#define DEC_137 136
+#define DEC_136 135
+#define DEC_135 134
+#define DEC_134 133
+#define DEC_133 132
+#define DEC_132 131
+#define DEC_131 130
+#define DEC_130 129
+#define DEC_129 128
+#define DEC_128 127
+#define DEC_127 126
+#define DEC_126 125
+#define DEC_125 124
+#define DEC_124 123
+#define DEC_123 122
+#define DEC_122 121
+#define DEC_121 120
+#define DEC_120 119
+#define DEC_119 118
+#define DEC_118 117
+#define DEC_117 116
+#define DEC_116 115
+#define DEC_115 114
+#define DEC_114 113
+#define DEC_113 112
+#define DEC_112 111
+#define DEC_111 110
+#define DEC_110 109
+#define DEC_109 108
+#define DEC_108 107
+#define DEC_107 106
+#define DEC_106 105
+#define DEC_105 104
+#define DEC_104 103
+#define DEC_103 102
+#define DEC_102 101
+#define DEC_101 100
+#define DEC_100 99
+#define DEC_99 98
+#define DEC_98 97
+#define DEC_97 96
+#define DEC_96 95
+#define DEC_95 94
+#define DEC_94 93
+#define DEC_93 92
+#define DEC_92 91
+#define DEC_91 90
+#define DEC_90 89
+#define DEC_89 88
+#define DEC_88 87
+#define DEC_87 86
+#define DEC_86 85
+#define DEC_85 84
+#define DEC_84 83
+#define DEC_83 82
+#define DEC_82 81
+#define DEC_81 80
+#define DEC_80 79
+#define DEC_79 78
+#define DEC_78 77
+#define DEC_77 76
+#define DEC_76 75
+#define DEC_75 74
+#define DEC_74 73
+#define DEC_73 72
+#define DEC_72 71
+#define DEC_71 70
+#define DEC_70 69
+#define DEC_69 68
+#define DEC_68 67
+#define DEC_67 66
+#define DEC_66 65
+#define DEC_65 64
+#define DEC_64 63
+#define DEC_63 62
+#define DEC_62 61
+#define DEC_61 60
+#define DEC_60 59
+#define DEC_59 58
+#define DEC_58 57
+#define DEC_57 56
+#define DEC_56 55
+#define DEC_55 54
+#define DEC_54 53
+#define DEC_53 52
+#define DEC_52 51
+#define DEC_51 50
+#define DEC_50 49
+#define DEC_49 48
+#define DEC_48 47
+#define DEC_47 46
+#define DEC_46 45
+#define DEC_45 44
+#define DEC_44 43
+#define DEC_43 42
+#define DEC_42 41
+#define DEC_41 40
+#define DEC_40 39
+#define DEC_39 38
+#define DEC_38 37
+#define DEC_37 36
+#define DEC_36 35
+#define DEC_35 34
+#define DEC_34 33
+#define DEC_33 32
+#define DEC_32 31
+#define DEC_31 30
+#define DEC_30 29
+#define DEC_29 28
+#define DEC_28 27
+#define DEC_27 26
+#define DEC_26 25
+#define DEC_25 24
+#define DEC_24 23
+#define DEC_23 22
+#define DEC_22 21
+#define DEC_21 20
+#define DEC_20 19
+#define DEC_19 18
+#define DEC_18 17
+#define DEC_17 16
+#define DEC_16 15
+#define DEC_15 14
+#define DEC_14 13
+#define DEC_13 12
+#define DEC_12 11
+#define DEC_11 10
+#define DEC_10 9
+#define DEC_9 8
+#define DEC_8 7
+#define DEC_7 6
+#define DEC_6 5
+#define DEC_5 4
+#define DEC_4 3
+#define DEC_3 2
+#define DEC_2 1
+#define DEC_1 0
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _UTILS_DECREMENT_MACRO_H */
diff --git a/watch-library/hal/utils/include/utils_event.h b/watch-library/hal/utils/include/utils_event.h
new file mode 100644
index 00000000..13067c4f
--- /dev/null
+++ b/watch-library/hal/utils/include/utils_event.h
@@ -0,0 +1,115 @@
+/**
+ * \file
+ *
+ * \brief Events declaration.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _UTILS_EVENT_H_INCLUDED
+#define _UTILS_EVENT_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <utils.h>
+#include <utils_list.h>
+#include <events.h>
+
+/**
+ * \brief The maximum amount of events
+ */
+#define EVENT_MAX_AMOUNT 8
+
+/**
+ * \brief The size of event mask used, it is EVENT_MAX_AMOUNT rounded up to the
+ * closest number divisible by 8.
+ */
+#define EVENT_MASK_SIZE (round_up(EVENT_MAX_AMOUNT, 8))
+
+/**
+ * \brief The type of event ID. IDs should start with 0 and be in numerical order.
+ */
+typedef uint8_t event_id_t;
+
+/**
+ * \brief The type of returned parameter. This type is big enough to contain
+ * pointer to data on any platform.
+ */
+typedef uintptr_t event_data_t;
+
+/**
+ * \brief The type of returned parameter. This type is big enough to contain
+ * pointer to data on any platform.
+ */
+typedef void (*event_cb_t)(event_id_t id, event_data_t data);
+
+/**
+ * \brief Event structure
+ */
+struct event {
+ struct list_element elem; /*! The pointer to next event */
+ uint8_t mask[EVENT_MASK_SIZE]; /*! Mask of event IDs callback is called for */
+ event_cb_t cb; /*! Callback to be called when an event occurs */
+};
+
+/**
+ * \brief Subscribe to event
+ *
+ * \param[in] event The pointer to event structure
+ * \param[in] id The event ID to subscribe to
+ * \param[in] cb The callback function to call when the given event occurs
+ *
+ * \return The status of subscription
+ */
+int32_t event_subscribe(struct event *const event, const event_id_t id, event_cb_t cb);
+
+/**
+ * \brief Remove event from subscription
+ *
+ * \param[in] event The pointer to event structure
+ * \param[in] id The event ID to remove subscription from
+ *
+ * \return The status of subscription removing
+ */
+int32_t event_unsubscribe(struct event *const event, const event_id_t id);
+
+/**
+ * \brief Post event
+ *
+ * \param[in] id The event ID to post
+ * \param[in] data The event data to be passed to event subscribers
+ */
+void event_post(const event_id_t id, const event_data_t data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _UTILS_EVENT_H_INCLUDED */
diff --git a/watch-library/hal/utils/include/utils_increment_macro.h b/watch-library/hal/utils/include/utils_increment_macro.h
new file mode 100644
index 00000000..464c6cbb
--- /dev/null
+++ b/watch-library/hal/utils/include/utils_increment_macro.h
@@ -0,0 +1,308 @@
+/**
+ * \file
+ *
+ * \brief Increment macro.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _UTILS_INCREMENT_MACRO_H
+#define _UTILS_INCREMENT_MACRO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Compile time increment, result value is entire integer literal
+ *
+ * \param[in] val - value to be incremented (254 max)
+ */
+#define INC_VALUE(val) SP_INC_##val
+
+// Preprocessor increment implementation
+#define SP_INC_0 1
+#define SP_INC_1 2
+#define SP_INC_2 3
+#define SP_INC_3 4
+#define SP_INC_4 5
+#define SP_INC_5 6
+#define SP_INC_6 7
+#define SP_INC_7 8
+#define SP_INC_8 9
+#define SP_INC_9 10
+#define SP_INC_10 11
+#define SP_INC_11 12
+#define SP_INC_12 13
+#define SP_INC_13 14
+#define SP_INC_14 15
+#define SP_INC_15 16
+#define SP_INC_16 17
+#define SP_INC_17 18
+#define SP_INC_18 19
+#define SP_INC_19 20
+#define SP_INC_20 21
+#define SP_INC_21 22
+#define SP_INC_22 23
+#define SP_INC_23 24
+#define SP_INC_24 25
+#define SP_INC_25 26
+#define SP_INC_26 27
+#define SP_INC_27 28
+#define SP_INC_28 29
+#define SP_INC_29 30
+#define SP_INC_30 31
+#define SP_INC_31 32
+#define SP_INC_32 33
+#define SP_INC_33 34
+#define SP_INC_34 35
+#define SP_INC_35 36
+#define SP_INC_36 37
+#define SP_INC_37 38
+#define SP_INC_38 39
+#define SP_INC_39 40
+#define SP_INC_40 41
+#define SP_INC_41 42
+#define SP_INC_42 43
+#define SP_INC_43 44
+#define SP_INC_44 45
+#define SP_INC_45 46
+#define SP_INC_46 47
+#define SP_INC_47 48
+#define SP_INC_48 49
+#define SP_INC_49 50
+#define SP_INC_50 51
+#define SP_INC_51 52
+#define SP_INC_52 53
+#define SP_INC_53 54
+#define SP_INC_54 55
+#define SP_INC_55 56
+#define SP_INC_56 57
+#define SP_INC_57 58
+#define SP_INC_58 59
+#define SP_INC_59 60
+#define SP_INC_60 61
+#define SP_INC_61 62
+#define SP_INC_62 63
+#define SP_INC_63 64
+#define SP_INC_64 65
+#define SP_INC_65 66
+#define SP_INC_66 67
+#define SP_INC_67 68
+#define SP_INC_68 69
+#define SP_INC_69 70
+#define SP_INC_70 71
+#define SP_INC_71 72
+#define SP_INC_72 73
+#define SP_INC_73 74
+#define SP_INC_74 75
+#define SP_INC_75 76
+#define SP_INC_76 77
+#define SP_INC_77 78
+#define SP_INC_78 79
+#define SP_INC_79 80
+#define SP_INC_80 81
+#define SP_INC_81 82
+#define SP_INC_82 83
+#define SP_INC_83 84
+#define SP_INC_84 85
+#define SP_INC_85 86
+#define SP_INC_86 87
+#define SP_INC_87 88
+#define SP_INC_88 89
+#define SP_INC_89 90
+#define SP_INC_90 91
+#define SP_INC_91 92
+#define SP_INC_92 93
+#define SP_INC_93 94
+#define SP_INC_94 95
+#define SP_INC_95 96
+#define SP_INC_96 97
+#define SP_INC_97 98
+#define SP_INC_98 99
+#define SP_INC_99 100
+#define SP_INC_100 101
+#define SP_INC_101 102
+#define SP_INC_102 103
+#define SP_INC_103 104
+#define SP_INC_104 105
+#define SP_INC_105 106
+#define SP_INC_106 107
+#define SP_INC_107 108
+#define SP_INC_108 109
+#define SP_INC_109 110
+#define SP_INC_110 111
+#define SP_INC_111 112
+#define SP_INC_112 113
+#define SP_INC_113 114
+#define SP_INC_114 115
+#define SP_INC_115 116
+#define SP_INC_116 117
+#define SP_INC_117 118
+#define SP_INC_118 119
+#define SP_INC_119 120
+#define SP_INC_120 121
+#define SP_INC_121 122
+#define SP_INC_122 123
+#define SP_INC_123 124
+#define SP_INC_124 125
+#define SP_INC_125 126
+#define SP_INC_126 127
+#define SP_INC_127 128
+#define SP_INC_128 129
+#define SP_INC_129 130
+#define SP_INC_130 131
+#define SP_INC_131 132
+#define SP_INC_132 133
+#define SP_INC_133 134
+#define SP_INC_134 135
+#define SP_INC_135 136
+#define SP_INC_136 137
+#define SP_INC_137 138
+#define SP_INC_138 139
+#define SP_INC_139 140
+#define SP_INC_140 141
+#define SP_INC_141 142
+#define SP_INC_142 143
+#define SP_INC_143 144
+#define SP_INC_144 145
+#define SP_INC_145 146
+#define SP_INC_146 147
+#define SP_INC_147 148
+#define SP_INC_148 149
+#define SP_INC_149 150
+#define SP_INC_150 151
+#define SP_INC_151 152
+#define SP_INC_152 153
+#define SP_INC_153 154
+#define SP_INC_154 155
+#define SP_INC_155 156
+#define SP_INC_156 157
+#define SP_INC_157 158
+#define SP_INC_158 159
+#define SP_INC_159 160
+#define SP_INC_160 161
+#define SP_INC_161 162
+#define SP_INC_162 163
+#define SP_INC_163 164
+#define SP_INC_164 165
+#define SP_INC_165 166
+#define SP_INC_166 167
+#define SP_INC_167 168
+#define SP_INC_168 169
+#define SP_INC_169 170
+#define SP_INC_170 171
+#define SP_INC_171 172
+#define SP_INC_172 173
+#define SP_INC_173 174
+#define SP_INC_174 175
+#define SP_INC_175 176
+#define SP_INC_176 177
+#define SP_INC_177 178
+#define SP_INC_178 179
+#define SP_INC_179 180
+#define SP_INC_180 181
+#define SP_INC_181 182
+#define SP_INC_182 183
+#define SP_INC_183 184
+#define SP_INC_184 185
+#define SP_INC_185 186
+#define SP_INC_186 187
+#define SP_INC_187 188
+#define SP_INC_188 189
+#define SP_INC_189 190
+#define SP_INC_190 191
+#define SP_INC_191 192
+#define SP_INC_192 193
+#define SP_INC_193 194
+#define SP_INC_194 195
+#define SP_INC_195 196
+#define SP_INC_196 197
+#define SP_INC_197 198
+#define SP_INC_198 199
+#define SP_INC_199 200
+#define SP_INC_200 201
+#define SP_INC_201 202
+#define SP_INC_202 203
+#define SP_INC_203 204
+#define SP_INC_204 205
+#define SP_INC_205 206
+#define SP_INC_206 207
+#define SP_INC_207 208
+#define SP_INC_208 209
+#define SP_INC_209 210
+#define SP_INC_210 211
+#define SP_INC_211 212
+#define SP_INC_212 213
+#define SP_INC_213 214
+#define SP_INC_214 215
+#define SP_INC_215 216
+#define SP_INC_216 217
+#define SP_INC_217 218
+#define SP_INC_218 219
+#define SP_INC_219 220
+#define SP_INC_220 221
+#define SP_INC_221 222
+#define SP_INC_222 223
+#define SP_INC_223 224
+#define SP_INC_224 225
+#define SP_INC_225 226
+#define SP_INC_226 227
+#define SP_INC_227 228
+#define SP_INC_228 229
+#define SP_INC_229 230
+#define SP_INC_230 231
+#define SP_INC_231 232
+#define SP_INC_232 233
+#define SP_INC_233 234
+#define SP_INC_234 235
+#define SP_INC_235 236
+#define SP_INC_236 237
+#define SP_INC_237 238
+#define SP_INC_238 239
+#define SP_INC_239 240
+#define SP_INC_240 241
+#define SP_INC_241 242
+#define SP_INC_242 243
+#define SP_INC_243 244
+#define SP_INC_244 245
+#define SP_INC_245 246
+#define SP_INC_246 247
+#define SP_INC_247 248
+#define SP_INC_248 249
+#define SP_INC_249 250
+#define SP_INC_250 251
+#define SP_INC_251 252
+#define SP_INC_252 253
+#define SP_INC_253 254
+#define SP_INC_254 255
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _UTILS_INCREMENT_MACRO_H */
diff --git a/watch-library/hal/utils/include/utils_list.h b/watch-library/hal/utils/include/utils_list.h
new file mode 100644
index 00000000..977e8cca
--- /dev/null
+++ b/watch-library/hal/utils/include/utils_list.h
@@ -0,0 +1,164 @@
+/**
+ * \file
+ *
+ * \brief List declaration.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _UTILS_LIST_H_INCLUDED
+#define _UTILS_LIST_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup doc_driver_hal_utils_list
+ *
+ * @{
+ */
+
+#include <compiler.h>
+
+/**
+ * \brief List element type
+ */
+struct list_element {
+ struct list_element *next;
+};
+
+/**
+ * \brief List head type
+ */
+struct list_descriptor {
+ struct list_element *head;
+};
+
+/**
+ * \brief Reset list
+ *
+ * \param[in] list The pointer to a list descriptor
+ */
+static inline void list_reset(struct list_descriptor *const list)
+{
+ list->head = NULL;
+}
+
+/**
+ * \brief Retrieve list head
+ *
+ * \param[in] list The pointer to a list descriptor
+ *
+ * \return A pointer to the head of the given list or NULL if the list is
+ * empty
+ */
+static inline void *list_get_head(const struct list_descriptor *const list)
+{
+ return (void *)list->head;
+}
+
+/**
+ * \brief Retrieve next list head
+ *
+ * \param[in] list The pointer to a list element
+ *
+ * \return A pointer to the next list element or NULL if there is not next
+ * element
+ */
+static inline void *list_get_next_element(const void *const element)
+{
+ return element ? ((struct list_element *)element)->next : NULL;
+}
+
+/**
+ * \brief Insert an element as list head
+ *
+ * \param[in] list The pointer to a list element
+ * \param[in] element An element to insert to the given list
+ */
+void list_insert_as_head(struct list_descriptor *const list, void *const element);
+
+/**
+ * \brief Insert an element after the given list element
+ *
+ * \param[in] after An element to insert after
+ * \param[in] element Element to insert to the given list
+ */
+void list_insert_after(void *const after, void *const element);
+
+/**
+ * \brief Insert an element at list end
+ *
+ * \param[in] after An element to insert after
+ * \param[in] element Element to insert to the given list
+ */
+void list_insert_at_end(struct list_descriptor *const list, void *const element);
+
+/**
+ * \brief Check whether an element belongs to a list
+ *
+ * \param[in] list The pointer to a list
+ * \param[in] element An element to check
+ *
+ * \return The result of checking
+ * \retval true If the given element is an element of the given list
+ * \retval false Otherwise
+ */
+bool is_list_element(const struct list_descriptor *const list, const void *const element);
+
+/**
+ * \brief Removes list head
+ *
+ * This function removes the list head and sets the next element after the list
+ * head as a new list head.
+ *
+ * \param[in] list The pointer to a list
+ *
+ * \return The pointer to the new list head of NULL if the list head is NULL
+ */
+void *list_remove_head(struct list_descriptor *const list);
+
+/**
+ * \brief Removes the list element
+ *
+ * \param[in] list The pointer to a list
+ * \param[in] element An element to remove
+ *
+ * \return The result of element removing
+ * \retval true The given element is removed from the given list
+ * \retval false The given element is not an element of the given list
+ */
+bool list_delete_element(struct list_descriptor *const list, const void *const element);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _UTILS_LIST_H_INCLUDED */
diff --git a/watch-library/hal/utils/include/utils_recursion_macro.h b/watch-library/hal/utils/include/utils_recursion_macro.h
new file mode 100644
index 00000000..294314c4
--- /dev/null
+++ b/watch-library/hal/utils/include/utils_recursion_macro.h
@@ -0,0 +1,69 @@
+/**
+ * \file
+ *
+ * \brief Recursion macro.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _UTILS_RECURSION_MACRO_H
+#define _UTILS_RECURSION_MACRO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * \brief Macro recursion
+ *
+ * \param[in] macro Macro to be repeated recursively
+ * \param[in] arg A recursive threshold, building on this to decline by times
+ * defined with parameter n
+ * \param[in] n The number of repetitious calls to macro
+ */
+#define RECURSION_MACRO(macro, arg, n) RECURSION_MACRO_I(macro, arg, n)
+
+/*
+ * \brief Second level is needed to get integer literal from "n" if it is
+ * defined as macro
+ */
+#define RECURSION_MACRO_I(macro, arg, n) RECURSION##n(macro, arg)
+
+#define RECURSION0(macro, arg)
+#define RECURSION1(macro, arg) RECURSION0(macro, DEC_VALUE(arg)) macro(arg, 0)
+#define RECURSION2(macro, arg) RECURSION1(macro, DEC_VALUE(arg)) macro(arg, 1)
+#define RECURSION3(macro, arg) RECURSION2(macro, DEC_VALUE(arg)) macro(arg, 2)
+#define RECURSION4(macro, arg) RECURSION3(macro, DEC_VALUE(arg)) macro(arg, 3)
+#define RECURSION5(macro, arg) RECURSION4(macro, DEC_VALUE(arg)) macro(arg, 4)
+
+#ifdef __cplusplus
+}
+#endif
+
+#include <utils_decrement_macro.h>
+#endif /* _UTILS_RECURSION_MACRO_H */
diff --git a/watch-library/hal/utils/include/utils_repeat_macro.h b/watch-library/hal/utils/include/utils_repeat_macro.h
new file mode 100644
index 00000000..89e6f52d
--- /dev/null
+++ b/watch-library/hal/utils/include/utils_repeat_macro.h
@@ -0,0 +1,322 @@
+/**
+ * \file
+ *
+ * \brief Repeat macro.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _UTILS_REPEAT_MACRO_H
+#define _UTILS_REPEAT_MACRO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * \brief Sequently repeates specified macro for n times (255 max).
+ *
+ * Specified macro shall have two arguments: macro(arg, i)
+ * arg - user defined argument, which have the same value for all iterations.
+ * i - iteration number; numbering begins from zero and increments on each
+ * iteration.
+ *
+ * \param[in] macro - macro to be repeated
+ * \param[in] arg - user defined argument for repeated macro
+ * \param[in] n - total number of iterations (255 max)
+ */
+#define REPEAT_MACRO(macro, arg, n) REPEAT_MACRO_I(macro, arg, n)
+
+/*
+ * \brief Second level is needed to get integer literal from "n" if it is
+ * defined as macro
+ */
+#define REPEAT_MACRO_I(macro, arg, n) REPEAT##n(macro, arg, 0)
+
+#define REPEAT1(macro, arg, n) macro(arg, n)
+#define REPEAT2(macro, arg, n) macro(arg, n) REPEAT1(macro, arg, INC_VALUE(n))
+#define REPEAT3(macro, arg, n) macro(arg, n) REPEAT2(macro, arg, INC_VALUE(n))
+#define REPEAT4(macro, arg, n) macro(arg, n) REPEAT3(macro, arg, INC_VALUE(n))
+#define REPEAT5(macro, arg, n) macro(arg, n) REPEAT4(macro, arg, INC_VALUE(n))
+#define REPEAT6(macro, arg, n) macro(arg, n) REPEAT5(macro, arg, INC_VALUE(n))
+#define REPEAT7(macro, arg, n) macro(arg, n) REPEAT6(macro, arg, INC_VALUE(n))
+#define REPEAT8(macro, arg, n) macro(arg, n) REPEAT7(macro, arg, INC_VALUE(n))
+#define REPEAT9(macro, arg, n) macro(arg, n) REPEAT8(macro, arg, INC_VALUE(n))
+#define REPEAT10(macro, arg, n) macro(arg, n) REPEAT9(macro, arg, INC_VALUE(n))
+#define REPEAT11(macro, arg, n) macro(arg, n) REPEAT10(macro, arg, INC_VALUE(n))
+#define REPEAT12(macro, arg, n) macro(arg, n) REPEAT11(macro, arg, INC_VALUE(n))
+#define REPEAT13(macro, arg, n) macro(arg, n) REPEAT12(macro, arg, INC_VALUE(n))
+#define REPEAT14(macro, arg, n) macro(arg, n) REPEAT13(macro, arg, INC_VALUE(n))
+#define REPEAT15(macro, arg, n) macro(arg, n) REPEAT14(macro, arg, INC_VALUE(n))
+#define REPEAT16(macro, arg, n) macro(arg, n) REPEAT15(macro, arg, INC_VALUE(n))
+#define REPEAT17(macro, arg, n) macro(arg, n) REPEAT16(macro, arg, INC_VALUE(n))
+#define REPEAT18(macro, arg, n) macro(arg, n) REPEAT17(macro, arg, INC_VALUE(n))
+#define REPEAT19(macro, arg, n) macro(arg, n) REPEAT18(macro, arg, INC_VALUE(n))
+#define REPEAT20(macro, arg, n) macro(arg, n) REPEAT19(macro, arg, INC_VALUE(n))
+#define REPEAT21(macro, arg, n) macro(arg, n) REPEAT20(macro, arg, INC_VALUE(n))
+#define REPEAT22(macro, arg, n) macro(arg, n) REPEAT21(macro, arg, INC_VALUE(n))
+#define REPEAT23(macro, arg, n) macro(arg, n) REPEAT22(macro, arg, INC_VALUE(n))
+#define REPEAT24(macro, arg, n) macro(arg, n) REPEAT23(macro, arg, INC_VALUE(n))
+#define REPEAT25(macro, arg, n) macro(arg, n) REPEAT24(macro, arg, INC_VALUE(n))
+#define REPEAT26(macro, arg, n) macro(arg, n) REPEAT25(macro, arg, INC_VALUE(n))
+#define REPEAT27(macro, arg, n) macro(arg, n) REPEAT26(macro, arg, INC_VALUE(n))
+#define REPEAT28(macro, arg, n) macro(arg, n) REPEAT27(macro, arg, INC_VALUE(n))
+#define REPEAT29(macro, arg, n) macro(arg, n) REPEAT28(macro, arg, INC_VALUE(n))
+#define REPEAT30(macro, arg, n) macro(arg, n) REPEAT29(macro, arg, INC_VALUE(n))
+#define REPEAT31(macro, arg, n) macro(arg, n) REPEAT30(macro, arg, INC_VALUE(n))
+#define REPEAT32(macro, arg, n) macro(arg, n) REPEAT31(macro, arg, INC_VALUE(n))
+#define REPEAT33(macro, arg, n) macro(arg, n) REPEAT32(macro, arg, INC_VALUE(n))
+#define REPEAT34(macro, arg, n) macro(arg, n) REPEAT33(macro, arg, INC_VALUE(n))
+#define REPEAT35(macro, arg, n) macro(arg, n) REPEAT34(macro, arg, INC_VALUE(n))
+#define REPEAT36(macro, arg, n) macro(arg, n) REPEAT35(macro, arg, INC_VALUE(n))
+#define REPEAT37(macro, arg, n) macro(arg, n) REPEAT36(macro, arg, INC_VALUE(n))
+#define REPEAT38(macro, arg, n) macro(arg, n) REPEAT37(macro, arg, INC_VALUE(n))
+#define REPEAT39(macro, arg, n) macro(arg, n) REPEAT38(macro, arg, INC_VALUE(n))
+#define REPEAT40(macro, arg, n) macro(arg, n) REPEAT39(macro, arg, INC_VALUE(n))
+#define REPEAT41(macro, arg, n) macro(arg, n) REPEAT40(macro, arg, INC_VALUE(n))
+#define REPEAT42(macro, arg, n) macro(arg, n) REPEAT41(macro, arg, INC_VALUE(n))
+#define REPEAT43(macro, arg, n) macro(arg, n) REPEAT42(macro, arg, INC_VALUE(n))
+#define REPEAT44(macro, arg, n) macro(arg, n) REPEAT43(macro, arg, INC_VALUE(n))
+#define REPEAT45(macro, arg, n) macro(arg, n) REPEAT44(macro, arg, INC_VALUE(n))
+#define REPEAT46(macro, arg, n) macro(arg, n) REPEAT45(macro, arg, INC_VALUE(n))
+#define REPEAT47(macro, arg, n) macro(arg, n) REPEAT46(macro, arg, INC_VALUE(n))
+#define REPEAT48(macro, arg, n) macro(arg, n) REPEAT47(macro, arg, INC_VALUE(n))
+#define REPEAT49(macro, arg, n) macro(arg, n) REPEAT48(macro, arg, INC_VALUE(n))
+#define REPEAT50(macro, arg, n) macro(arg, n) REPEAT49(macro, arg, INC_VALUE(n))
+#define REPEAT51(macro, arg, n) macro(arg, n) REPEAT50(macro, arg, INC_VALUE(n))
+#define REPEAT52(macro, arg, n) macro(arg, n) REPEAT51(macro, arg, INC_VALUE(n))
+#define REPEAT53(macro, arg, n) macro(arg, n) REPEAT52(macro, arg, INC_VALUE(n))
+#define REPEAT54(macro, arg, n) macro(arg, n) REPEAT53(macro, arg, INC_VALUE(n))
+#define REPEAT55(macro, arg, n) macro(arg, n) REPEAT54(macro, arg, INC_VALUE(n))
+#define REPEAT56(macro, arg, n) macro(arg, n) REPEAT55(macro, arg, INC_VALUE(n))
+#define REPEAT57(macro, arg, n) macro(arg, n) REPEAT56(macro, arg, INC_VALUE(n))
+#define REPEAT58(macro, arg, n) macro(arg, n) REPEAT57(macro, arg, INC_VALUE(n))
+#define REPEAT59(macro, arg, n) macro(arg, n) REPEAT58(macro, arg, INC_VALUE(n))
+#define REPEAT60(macro, arg, n) macro(arg, n) REPEAT59(macro, arg, INC_VALUE(n))
+#define REPEAT61(macro, arg, n) macro(arg, n) REPEAT60(macro, arg, INC_VALUE(n))
+#define REPEAT62(macro, arg, n) macro(arg, n) REPEAT61(macro, arg, INC_VALUE(n))
+#define REPEAT63(macro, arg, n) macro(arg, n) REPEAT62(macro, arg, INC_VALUE(n))
+#define REPEAT64(macro, arg, n) macro(arg, n) REPEAT63(macro, arg, INC_VALUE(n))
+#define REPEAT65(macro, arg, n) macro(arg, n) REPEAT64(macro, arg, INC_VALUE(n))
+#define REPEAT66(macro, arg, n) macro(arg, n) REPEAT65(macro, arg, INC_VALUE(n))
+#define REPEAT67(macro, arg, n) macro(arg, n) REPEAT66(macro, arg, INC_VALUE(n))
+#define REPEAT68(macro, arg, n) macro(arg, n) REPEAT67(macro, arg, INC_VALUE(n))
+#define REPEAT69(macro, arg, n) macro(arg, n) REPEAT68(macro, arg, INC_VALUE(n))
+#define REPEAT70(macro, arg, n) macro(arg, n) REPEAT69(macro, arg, INC_VALUE(n))
+#define REPEAT71(macro, arg, n) macro(arg, n) REPEAT70(macro, arg, INC_VALUE(n))
+#define REPEAT72(macro, arg, n) macro(arg, n) REPEAT71(macro, arg, INC_VALUE(n))
+#define REPEAT73(macro, arg, n) macro(arg, n) REPEAT72(macro, arg, INC_VALUE(n))
+#define REPEAT74(macro, arg, n) macro(arg, n) REPEAT73(macro, arg, INC_VALUE(n))
+#define REPEAT75(macro, arg, n) macro(arg, n) REPEAT74(macro, arg, INC_VALUE(n))
+#define REPEAT76(macro, arg, n) macro(arg, n) REPEAT75(macro, arg, INC_VALUE(n))
+#define REPEAT77(macro, arg, n) macro(arg, n) REPEAT76(macro, arg, INC_VALUE(n))
+#define REPEAT78(macro, arg, n) macro(arg, n) REPEAT77(macro, arg, INC_VALUE(n))
+#define REPEAT79(macro, arg, n) macro(arg, n) REPEAT78(macro, arg, INC_VALUE(n))
+#define REPEAT80(macro, arg, n) macro(arg, n) REPEAT79(macro, arg, INC_VALUE(n))
+#define REPEAT81(macro, arg, n) macro(arg, n) REPEAT80(macro, arg, INC_VALUE(n))
+#define REPEAT82(macro, arg, n) macro(arg, n) REPEAT81(macro, arg, INC_VALUE(n))
+#define REPEAT83(macro, arg, n) macro(arg, n) REPEAT82(macro, arg, INC_VALUE(n))
+#define REPEAT84(macro, arg, n) macro(arg, n) REPEAT83(macro, arg, INC_VALUE(n))
+#define REPEAT85(macro, arg, n) macro(arg, n) REPEAT84(macro, arg, INC_VALUE(n))
+#define REPEAT86(macro, arg, n) macro(arg, n) REPEAT85(macro, arg, INC_VALUE(n))
+#define REPEAT87(macro, arg, n) macro(arg, n) REPEAT86(macro, arg, INC_VALUE(n))
+#define REPEAT88(macro, arg, n) macro(arg, n) REPEAT87(macro, arg, INC_VALUE(n))
+#define REPEAT89(macro, arg, n) macro(arg, n) REPEAT88(macro, arg, INC_VALUE(n))
+#define REPEAT90(macro, arg, n) macro(arg, n) REPEAT89(macro, arg, INC_VALUE(n))
+#define REPEAT91(macro, arg, n) macro(arg, n) REPEAT90(macro, arg, INC_VALUE(n))
+#define REPEAT92(macro, arg, n) macro(arg, n) REPEAT91(macro, arg, INC_VALUE(n))
+#define REPEAT93(macro, arg, n) macro(arg, n) REPEAT92(macro, arg, INC_VALUE(n))
+#define REPEAT94(macro, arg, n) macro(arg, n) REPEAT93(macro, arg, INC_VALUE(n))
+#define REPEAT95(macro, arg, n) macro(arg, n) REPEAT94(macro, arg, INC_VALUE(n))
+#define REPEAT96(macro, arg, n) macro(arg, n) REPEAT95(macro, arg, INC_VALUE(n))
+#define REPEAT97(macro, arg, n) macro(arg, n) REPEAT96(macro, arg, INC_VALUE(n))
+#define REPEAT98(macro, arg, n) macro(arg, n) REPEAT97(macro, arg, INC_VALUE(n))
+#define REPEAT99(macro, arg, n) macro(arg, n) REPEAT98(macro, arg, INC_VALUE(n))
+#define REPEAT100(macro, arg, n) macro(arg, n) REPEAT99(macro, arg, INC_VALUE(n))
+#define REPEAT101(macro, arg, n) macro(arg, n) REPEAT100(macro, arg, INC_VALUE(n))
+#define REPEAT102(macro, arg, n) macro(arg, n) REPEAT101(macro, arg, INC_VALUE(n))
+#define REPEAT103(macro, arg, n) macro(arg, n) REPEAT102(macro, arg, INC_VALUE(n))
+#define REPEAT104(macro, arg, n) macro(arg, n) REPEAT103(macro, arg, INC_VALUE(n))
+#define REPEAT105(macro, arg, n) macro(arg, n) REPEAT104(macro, arg, INC_VALUE(n))
+#define REPEAT106(macro, arg, n) macro(arg, n) REPEAT105(macro, arg, INC_VALUE(n))
+#define REPEAT107(macro, arg, n) macro(arg, n) REPEAT106(macro, arg, INC_VALUE(n))
+#define REPEAT108(macro, arg, n) macro(arg, n) REPEAT107(macro, arg, INC_VALUE(n))
+#define REPEAT109(macro, arg, n) macro(arg, n) REPEAT108(macro, arg, INC_VALUE(n))
+#define REPEAT110(macro, arg, n) macro(arg, n) REPEAT109(macro, arg, INC_VALUE(n))
+#define REPEAT111(macro, arg, n) macro(arg, n) REPEAT110(macro, arg, INC_VALUE(n))
+#define REPEAT112(macro, arg, n) macro(arg, n) REPEAT111(macro, arg, INC_VALUE(n))
+#define REPEAT113(macro, arg, n) macro(arg, n) REPEAT112(macro, arg, INC_VALUE(n))
+#define REPEAT114(macro, arg, n) macro(arg, n) REPEAT113(macro, arg, INC_VALUE(n))
+#define REPEAT115(macro, arg, n) macro(arg, n) REPEAT114(macro, arg, INC_VALUE(n))
+#define REPEAT116(macro, arg, n) macro(arg, n) REPEAT115(macro, arg, INC_VALUE(n))
+#define REPEAT117(macro, arg, n) macro(arg, n) REPEAT116(macro, arg, INC_VALUE(n))
+#define REPEAT118(macro, arg, n) macro(arg, n) REPEAT117(macro, arg, INC_VALUE(n))
+#define REPEAT119(macro, arg, n) macro(arg, n) REPEAT118(macro, arg, INC_VALUE(n))
+#define REPEAT120(macro, arg, n) macro(arg, n) REPEAT119(macro, arg, INC_VALUE(n))
+#define REPEAT121(macro, arg, n) macro(arg, n) REPEAT120(macro, arg, INC_VALUE(n))
+#define REPEAT122(macro, arg, n) macro(arg, n) REPEAT121(macro, arg, INC_VALUE(n))
+#define REPEAT123(macro, arg, n) macro(arg, n) REPEAT122(macro, arg, INC_VALUE(n))
+#define REPEAT124(macro, arg, n) macro(arg, n) REPEAT123(macro, arg, INC_VALUE(n))
+#define REPEAT125(macro, arg, n) macro(arg, n) REPEAT124(macro, arg, INC_VALUE(n))
+#define REPEAT126(macro, arg, n) macro(arg, n) REPEAT125(macro, arg, INC_VALUE(n))
+#define REPEAT127(macro, arg, n) macro(arg, n) REPEAT126(macro, arg, INC_VALUE(n))
+#define REPEAT128(macro, arg, n) macro(arg, n) REPEAT127(macro, arg, INC_VALUE(n))
+#define REPEAT129(macro, arg, n) macro(arg, n) REPEAT128(macro, arg, INC_VALUE(n))
+#define REPEAT130(macro, arg, n) macro(arg, n) REPEAT129(macro, arg, INC_VALUE(n))
+#define REPEAT131(macro, arg, n) macro(arg, n) REPEAT130(macro, arg, INC_VALUE(n))
+#define REPEAT132(macro, arg, n) macro(arg, n) REPEAT131(macro, arg, INC_VALUE(n))
+#define REPEAT133(macro, arg, n) macro(arg, n) REPEAT132(macro, arg, INC_VALUE(n))
+#define REPEAT134(macro, arg, n) macro(arg, n) REPEAT133(macro, arg, INC_VALUE(n))
+#define REPEAT135(macro, arg, n) macro(arg, n) REPEAT134(macro, arg, INC_VALUE(n))
+#define REPEAT136(macro, arg, n) macro(arg, n) REPEAT135(macro, arg, INC_VALUE(n))
+#define REPEAT137(macro, arg, n) macro(arg, n) REPEAT136(macro, arg, INC_VALUE(n))
+#define REPEAT138(macro, arg, n) macro(arg, n) REPEAT137(macro, arg, INC_VALUE(n))
+#define REPEAT139(macro, arg, n) macro(arg, n) REPEAT138(macro, arg, INC_VALUE(n))
+#define REPEAT140(macro, arg, n) macro(arg, n) REPEAT139(macro, arg, INC_VALUE(n))
+#define REPEAT141(macro, arg, n) macro(arg, n) REPEAT140(macro, arg, INC_VALUE(n))
+#define REPEAT142(macro, arg, n) macro(arg, n) REPEAT141(macro, arg, INC_VALUE(n))
+#define REPEAT143(macro, arg, n) macro(arg, n) REPEAT142(macro, arg, INC_VALUE(n))
+#define REPEAT144(macro, arg, n) macro(arg, n) REPEAT143(macro, arg, INC_VALUE(n))
+#define REPEAT145(macro, arg, n) macro(arg, n) REPEAT144(macro, arg, INC_VALUE(n))
+#define REPEAT146(macro, arg, n) macro(arg, n) REPEAT145(macro, arg, INC_VALUE(n))
+#define REPEAT147(macro, arg, n) macro(arg, n) REPEAT146(macro, arg, INC_VALUE(n))
+#define REPEAT148(macro, arg, n) macro(arg, n) REPEAT147(macro, arg, INC_VALUE(n))
+#define REPEAT149(macro, arg, n) macro(arg, n) REPEAT148(macro, arg, INC_VALUE(n))
+#define REPEAT150(macro, arg, n) macro(arg, n) REPEAT149(macro, arg, INC_VALUE(n))
+#define REPEAT151(macro, arg, n) macro(arg, n) REPEAT150(macro, arg, INC_VALUE(n))
+#define REPEAT152(macro, arg, n) macro(arg, n) REPEAT151(macro, arg, INC_VALUE(n))
+#define REPEAT153(macro, arg, n) macro(arg, n) REPEAT152(macro, arg, INC_VALUE(n))
+#define REPEAT154(macro, arg, n) macro(arg, n) REPEAT153(macro, arg, INC_VALUE(n))
+#define REPEAT155(macro, arg, n) macro(arg, n) REPEAT154(macro, arg, INC_VALUE(n))
+#define REPEAT156(macro, arg, n) macro(arg, n) REPEAT155(macro, arg, INC_VALUE(n))
+#define REPEAT157(macro, arg, n) macro(arg, n) REPEAT156(macro, arg, INC_VALUE(n))
+#define REPEAT158(macro, arg, n) macro(arg, n) REPEAT157(macro, arg, INC_VALUE(n))
+#define REPEAT159(macro, arg, n) macro(arg, n) REPEAT158(macro, arg, INC_VALUE(n))
+#define REPEAT160(macro, arg, n) macro(arg, n) REPEAT159(macro, arg, INC_VALUE(n))
+#define REPEAT161(macro, arg, n) macro(arg, n) REPEAT160(macro, arg, INC_VALUE(n))
+#define REPEAT162(macro, arg, n) macro(arg, n) REPEAT161(macro, arg, INC_VALUE(n))
+#define REPEAT163(macro, arg, n) macro(arg, n) REPEAT162(macro, arg, INC_VALUE(n))
+#define REPEAT164(macro, arg, n) macro(arg, n) REPEAT163(macro, arg, INC_VALUE(n))
+#define REPEAT165(macro, arg, n) macro(arg, n) REPEAT164(macro, arg, INC_VALUE(n))
+#define REPEAT166(macro, arg, n) macro(arg, n) REPEAT165(macro, arg, INC_VALUE(n))
+#define REPEAT167(macro, arg, n) macro(arg, n) REPEAT166(macro, arg, INC_VALUE(n))
+#define REPEAT168(macro, arg, n) macro(arg, n) REPEAT167(macro, arg, INC_VALUE(n))
+#define REPEAT169(macro, arg, n) macro(arg, n) REPEAT168(macro, arg, INC_VALUE(n))
+#define REPEAT170(macro, arg, n) macro(arg, n) REPEAT169(macro, arg, INC_VALUE(n))
+#define REPEAT171(macro, arg, n) macro(arg, n) REPEAT170(macro, arg, INC_VALUE(n))
+#define REPEAT172(macro, arg, n) macro(arg, n) REPEAT171(macro, arg, INC_VALUE(n))
+#define REPEAT173(macro, arg, n) macro(arg, n) REPEAT172(macro, arg, INC_VALUE(n))
+#define REPEAT174(macro, arg, n) macro(arg, n) REPEAT173(macro, arg, INC_VALUE(n))
+#define REPEAT175(macro, arg, n) macro(arg, n) REPEAT174(macro, arg, INC_VALUE(n))
+#define REPEAT176(macro, arg, n) macro(arg, n) REPEAT175(macro, arg, INC_VALUE(n))
+#define REPEAT177(macro, arg, n) macro(arg, n) REPEAT176(macro, arg, INC_VALUE(n))
+#define REPEAT178(macro, arg, n) macro(arg, n) REPEAT177(macro, arg, INC_VALUE(n))
+#define REPEAT179(macro, arg, n) macro(arg, n) REPEAT178(macro, arg, INC_VALUE(n))
+#define REPEAT180(macro, arg, n) macro(arg, n) REPEAT179(macro, arg, INC_VALUE(n))
+#define REPEAT181(macro, arg, n) macro(arg, n) REPEAT180(macro, arg, INC_VALUE(n))
+#define REPEAT182(macro, arg, n) macro(arg, n) REPEAT181(macro, arg, INC_VALUE(n))
+#define REPEAT183(macro, arg, n) macro(arg, n) REPEAT182(macro, arg, INC_VALUE(n))
+#define REPEAT184(macro, arg, n) macro(arg, n) REPEAT183(macro, arg, INC_VALUE(n))
+#define REPEAT185(macro, arg, n) macro(arg, n) REPEAT184(macro, arg, INC_VALUE(n))
+#define REPEAT186(macro, arg, n) macro(arg, n) REPEAT185(macro, arg, INC_VALUE(n))
+#define REPEAT187(macro, arg, n) macro(arg, n) REPEAT186(macro, arg, INC_VALUE(n))
+#define REPEAT188(macro, arg, n) macro(arg, n) REPEAT187(macro, arg, INC_VALUE(n))
+#define REPEAT189(macro, arg, n) macro(arg, n) REPEAT188(macro, arg, INC_VALUE(n))
+#define REPEAT190(macro, arg, n) macro(arg, n) REPEAT189(macro, arg, INC_VALUE(n))
+#define REPEAT191(macro, arg, n) macro(arg, n) REPEAT190(macro, arg, INC_VALUE(n))
+#define REPEAT192(macro, arg, n) macro(arg, n) REPEAT191(macro, arg, INC_VALUE(n))
+#define REPEAT193(macro, arg, n) macro(arg, n) REPEAT192(macro, arg, INC_VALUE(n))
+#define REPEAT194(macro, arg, n) macro(arg, n) REPEAT193(macro, arg, INC_VALUE(n))
+#define REPEAT195(macro, arg, n) macro(arg, n) REPEAT194(macro, arg, INC_VALUE(n))
+#define REPEAT196(macro, arg, n) macro(arg, n) REPEAT195(macro, arg, INC_VALUE(n))
+#define REPEAT197(macro, arg, n) macro(arg, n) REPEAT196(macro, arg, INC_VALUE(n))
+#define REPEAT198(macro, arg, n) macro(arg, n) REPEAT197(macro, arg, INC_VALUE(n))
+#define REPEAT199(macro, arg, n) macro(arg, n) REPEAT198(macro, arg, INC_VALUE(n))
+#define REPEAT200(macro, arg, n) macro(arg, n) REPEAT199(macro, arg, INC_VALUE(n))
+#define REPEAT201(macro, arg, n) macro(arg, n) REPEAT200(macro, arg, INC_VALUE(n))
+#define REPEAT202(macro, arg, n) macro(arg, n) REPEAT201(macro, arg, INC_VALUE(n))
+#define REPEAT203(macro, arg, n) macro(arg, n) REPEAT202(macro, arg, INC_VALUE(n))
+#define REPEAT204(macro, arg, n) macro(arg, n) REPEAT203(macro, arg, INC_VALUE(n))
+#define REPEAT205(macro, arg, n) macro(arg, n) REPEAT204(macro, arg, INC_VALUE(n))
+#define REPEAT206(macro, arg, n) macro(arg, n) REPEAT205(macro, arg, INC_VALUE(n))
+#define REPEAT207(macro, arg, n) macro(arg, n) REPEAT206(macro, arg, INC_VALUE(n))
+#define REPEAT208(macro, arg, n) macro(arg, n) REPEAT207(macro, arg, INC_VALUE(n))
+#define REPEAT209(macro, arg, n) macro(arg, n) REPEAT208(macro, arg, INC_VALUE(n))
+#define REPEAT210(macro, arg, n) macro(arg, n) REPEAT209(macro, arg, INC_VALUE(n))
+#define REPEAT211(macro, arg, n) macro(arg, n) REPEAT210(macro, arg, INC_VALUE(n))
+#define REPEAT212(macro, arg, n) macro(arg, n) REPEAT211(macro, arg, INC_VALUE(n))
+#define REPEAT213(macro, arg, n) macro(arg, n) REPEAT212(macro, arg, INC_VALUE(n))
+#define REPEAT214(macro, arg, n) macro(arg, n) REPEAT213(macro, arg, INC_VALUE(n))
+#define REPEAT215(macro, arg, n) macro(arg, n) REPEAT214(macro, arg, INC_VALUE(n))
+#define REPEAT216(macro, arg, n) macro(arg, n) REPEAT215(macro, arg, INC_VALUE(n))
+#define REPEAT217(macro, arg, n) macro(arg, n) REPEAT216(macro, arg, INC_VALUE(n))
+#define REPEAT218(macro, arg, n) macro(arg, n) REPEAT217(macro, arg, INC_VALUE(n))
+#define REPEAT219(macro, arg, n) macro(arg, n) REPEAT218(macro, arg, INC_VALUE(n))
+#define REPEAT220(macro, arg, n) macro(arg, n) REPEAT219(macro, arg, INC_VALUE(n))
+#define REPEAT221(macro, arg, n) macro(arg, n) REPEAT220(macro, arg, INC_VALUE(n))
+#define REPEAT222(macro, arg, n) macro(arg, n) REPEAT221(macro, arg, INC_VALUE(n))
+#define REPEAT223(macro, arg, n) macro(arg, n) REPEAT222(macro, arg, INC_VALUE(n))
+#define REPEAT224(macro, arg, n) macro(arg, n) REPEAT223(macro, arg, INC_VALUE(n))
+#define REPEAT225(macro, arg, n) macro(arg, n) REPEAT224(macro, arg, INC_VALUE(n))
+#define REPEAT226(macro, arg, n) macro(arg, n) REPEAT225(macro, arg, INC_VALUE(n))
+#define REPEAT227(macro, arg, n) macro(arg, n) REPEAT226(macro, arg, INC_VALUE(n))
+#define REPEAT228(macro, arg, n) macro(arg, n) REPEAT227(macro, arg, INC_VALUE(n))
+#define REPEAT229(macro, arg, n) macro(arg, n) REPEAT228(macro, arg, INC_VALUE(n))
+#define REPEAT230(macro, arg, n) macro(arg, n) REPEAT229(macro, arg, INC_VALUE(n))
+#define REPEAT231(macro, arg, n) macro(arg, n) REPEAT230(macro, arg, INC_VALUE(n))
+#define REPEAT232(macro, arg, n) macro(arg, n) REPEAT231(macro, arg, INC_VALUE(n))
+#define REPEAT233(macro, arg, n) macro(arg, n) REPEAT232(macro, arg, INC_VALUE(n))
+#define REPEAT234(macro, arg, n) macro(arg, n) REPEAT233(macro, arg, INC_VALUE(n))
+#define REPEAT235(macro, arg, n) macro(arg, n) REPEAT234(macro, arg, INC_VALUE(n))
+#define REPEAT236(macro, arg, n) macro(arg, n) REPEAT235(macro, arg, INC_VALUE(n))
+#define REPEAT237(macro, arg, n) macro(arg, n) REPEAT236(macro, arg, INC_VALUE(n))
+#define REPEAT238(macro, arg, n) macro(arg, n) REPEAT237(macro, arg, INC_VALUE(n))
+#define REPEAT239(macro, arg, n) macro(arg, n) REPEAT238(macro, arg, INC_VALUE(n))
+#define REPEAT240(macro, arg, n) macro(arg, n) REPEAT239(macro, arg, INC_VALUE(n))
+#define REPEAT241(macro, arg, n) macro(arg, n) REPEAT240(macro, arg, INC_VALUE(n))
+#define REPEAT242(macro, arg, n) macro(arg, n) REPEAT241(macro, arg, INC_VALUE(n))
+#define REPEAT243(macro, arg, n) macro(arg, n) REPEAT242(macro, arg, INC_VALUE(n))
+#define REPEAT244(macro, arg, n) macro(arg, n) REPEAT243(macro, arg, INC_VALUE(n))
+#define REPEAT245(macro, arg, n) macro(arg, n) REPEAT244(macro, arg, INC_VALUE(n))
+#define REPEAT246(macro, arg, n) macro(arg, n) REPEAT245(macro, arg, INC_VALUE(n))
+#define REPEAT247(macro, arg, n) macro(arg, n) REPEAT246(macro, arg, INC_VALUE(n))
+#define REPEAT248(macro, arg, n) macro(arg, n) REPEAT247(macro, arg, INC_VALUE(n))
+#define REPEAT249(macro, arg, n) macro(arg, n) REPEAT248(macro, arg, INC_VALUE(n))
+#define REPEAT250(macro, arg, n) macro(arg, n) REPEAT249(macro, arg, INC_VALUE(n))
+#define REPEAT251(macro, arg, n) macro(arg, n) REPEAT250(macro, arg, INC_VALUE(n))
+#define REPEAT252(macro, arg, n) macro(arg, n) REPEAT251(macro, arg, INC_VALUE(n))
+#define REPEAT253(macro, arg, n) macro(arg, n) REPEAT252(macro, arg, INC_VALUE(n))
+#define REPEAT254(macro, arg, n) macro(arg, n) REPEAT253(macro, arg, INC_VALUE(n))
+#define REPEAT255(macro, arg, n) macro(arg, n) REPEAT254(macro, arg, INC_VALUE(n))
+
+#ifdef __cplusplus
+}
+#endif
+
+#include <utils_increment_macro.h>
+#endif /* _UTILS_REPEAT_MACRO_H */
diff --git a/watch-library/hal/utils/src/utils_assert.c b/watch-library/hal/utils/src/utils_assert.c
new file mode 100644
index 00000000..b376c970
--- /dev/null
+++ b/watch-library/hal/utils/src/utils_assert.c
@@ -0,0 +1,46 @@
+/**
+ * \file
+ *
+ * \brief Asserts related functionality.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include <utils_assert.h>
+
+/**
+ * \brief Assert function
+ */
+void assert(const bool condition, const char *const file, const int line)
+{
+ if (!(condition)) {
+ __asm("BKPT #0");
+ }
+ (void)file;
+ (void)line;
+}
diff --git a/watch-library/hal/utils/src/utils_event.c b/watch-library/hal/utils/src/utils_event.c
new file mode 100644
index 00000000..d1af9d0c
--- /dev/null
+++ b/watch-library/hal/utils/src/utils_event.c
@@ -0,0 +1,125 @@
+/**
+ * \file
+ *
+ * \brief Events implementation.
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include <utils_event.h>
+#include <utils_assert.h>
+#include <string.h>
+
+#define EVENT_WORD_BITS (sizeof(event_word_t) * 8)
+
+static struct list_descriptor events;
+static uint8_t subscribed[EVENT_MASK_SIZE];
+
+int32_t event_subscribe(struct event *const event, const event_id_t id, event_cb_t cb)
+{
+ /* get byte and bit number of the given event in the event mask */
+ const uint8_t position = id >> 3;
+ const uint8_t mask = 1 << (id & 0x7);
+
+ ASSERT(event && cb && (id < EVENT_MAX_AMOUNT));
+
+ if (event->mask[position] & mask) {
+ return ERR_NO_CHANGE; /* Already subscribed */
+ }
+
+ if (!is_list_element(&events, event)) {
+ memset(event->mask, 0, EVENT_MASK_SIZE);
+ list_insert_as_head(&events, event);
+ }
+ event->cb = cb;
+ event->mask[position] |= mask;
+
+ subscribed[position] |= mask;
+
+ return ERR_NONE;
+}
+
+int32_t event_unsubscribe(struct event *const event, const event_id_t id)
+{
+ /* get byte and bit number of the given event in the event mask */
+ const uint8_t position = id >> 3;
+ const uint8_t mask = 1 << (id & 0x7);
+ const struct event *current;
+ uint8_t i;
+
+ ASSERT(event && (id < EVENT_MAX_AMOUNT));
+
+ if (!(event->mask[position] & mask)) {
+ return ERR_NO_CHANGE; /* Already unsubscribed */
+ }
+
+ event->mask[position] &= ~mask;
+
+ /* Check if there are more subscribers */
+ for ((current = (const struct event *)list_get_head(&events)); current;
+ current = (const struct event *)list_get_next_element(current)) {
+ if (current->mask[position] & mask) {
+ break;
+ }
+ }
+ if (!current) {
+ subscribed[position] &= ~mask;
+ }
+
+ /* Remove event from the list. Can be unsave, document it! */
+ for (i = 0; i < ARRAY_SIZE(event->mask); i++) {
+ if (event->mask[i]) {
+ return ERR_NONE;
+ }
+ }
+ list_delete_element(&events, event);
+
+ return ERR_NONE;
+}
+
+void event_post(const event_id_t id, const event_data_t data)
+{
+ /* get byte and bit number of the given event in the event mask */
+ const uint8_t position = id >> 3;
+ const uint8_t mask = 1 << (id & 0x7);
+ const struct event *current;
+
+ ASSERT((id < EVENT_MAX_AMOUNT));
+
+ if (!(subscribed[position] & mask)) {
+ return; /* No subscribers */
+ }
+
+ /* Find all subscribers */
+ for ((current = (const struct event *)list_get_head(&events)); current;
+ current = (const struct event *)list_get_next_element(current)) {
+ if (current->mask[position] & mask) {
+ current->cb(id, data);
+ }
+ }
+}
diff --git a/watch-library/hal/utils/src/utils_list.c b/watch-library/hal/utils/src/utils_list.c
new file mode 100644
index 00000000..4006a019
--- /dev/null
+++ b/watch-library/hal/utils/src/utils_list.c
@@ -0,0 +1,136 @@
+/**
+ * \file
+ *
+ * \brief List functionality implementation.
+ *
+ * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include <utils_list.h>
+#include <utils_assert.h>
+
+/**
+ * \brief Check whether element belongs to list
+ */
+bool is_list_element(const struct list_descriptor *const list, const void *const element)
+{
+ struct list_element *it;
+ for (it = list->head; it; it = it->next) {
+ if (it == element) {
+ return true;
+ }
+ }
+
+ return false;
+}
+
+/**
+ * \brief Insert an element as list head
+ */
+void list_insert_as_head(struct list_descriptor *const list, void *const element)
+{
+ ASSERT(!is_list_element(list, element));
+
+ ((struct list_element *)element)->next = list->head;
+ list->head = (struct list_element *)element;
+}
+
+/**
+ * \brief Insert an element after the given list element
+ */
+void list_insert_after(void *const after, void *const element)
+{
+ ((struct list_element *)element)->next = ((struct list_element *)after)->next;
+ ((struct list_element *)after)->next = (struct list_element *)element;
+}
+
+/**
+ * \brief Insert an element at list end
+ */
+void list_insert_at_end(struct list_descriptor *const list, void *const element)
+{
+ struct list_element *it = list->head;
+
+ ASSERT(!is_list_element(list, element));
+
+ if (!list->head) {
+ list->head = (struct list_element *)element;
+ ((struct list_element *)element)->next = NULL;
+ return;
+ }
+
+ while (it->next) {
+ it = it->next;
+ }
+ it->next = (struct list_element *)element;
+ ((struct list_element *)element)->next = NULL;
+}
+
+/**
+ * \brief Removes list head
+ */
+void *list_remove_head(struct list_descriptor *const list)
+{
+ if (list->head) {
+ struct list_element *tmp = list->head;
+
+ list->head = list->head->next;
+ return (void *)tmp;
+ }
+
+ return NULL;
+}
+
+/**
+ * \brief Removes list element
+ */
+bool list_delete_element(struct list_descriptor *const list, const void *const element)
+{
+ if (!element) {
+ return false;
+ }
+
+ if (list->head == element) {
+ list->head = list->head->next;
+ return true;
+ } else {
+ struct list_element *it = list->head;
+
+ while (it && it->next != element) {
+ it = it->next;
+ }
+ if (it) {
+ it->next = ((struct list_element *)element)->next;
+ return true;
+ }
+ }
+
+ return false;
+}
+
+//@}
diff --git a/watch-library/hal/utils/src/utils_syscalls.c b/watch-library/hal/utils/src/utils_syscalls.c
new file mode 100644
index 00000000..79e2f1fe
--- /dev/null
+++ b/watch-library/hal/utils/src/utils_syscalls.c
@@ -0,0 +1,152 @@
+/**
+ * \file
+ *
+ * \brief Syscalls for SAM0 (GCC).
+ *
+ * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include <stdio.h>
+#include <stdarg.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#undef errno
+extern int errno;
+extern int _end;
+
+extern caddr_t _sbrk(int incr);
+extern int link(char *old, char *_new);
+extern int _close(int file);
+extern int _fstat(int file, struct stat *st);
+extern int _isatty(int file);
+extern int _lseek(int file, int ptr, int dir);
+extern void _exit(int status);
+extern void _kill(int pid, int sig);
+extern int _getpid(void);
+
+/**
+ * \brief Replacement of C library of _sbrk
+ */
+extern caddr_t _sbrk(int incr)
+{
+ static unsigned char *heap = NULL;
+ unsigned char * prev_heap;
+
+ if (heap == NULL) {
+ heap = (unsigned char *)&_end;
+ }
+ prev_heap = heap;
+
+ heap += incr;
+
+ return (caddr_t)prev_heap;
+}
+
+/**
+ * \brief Replacement of C library of link
+ */
+extern int link(char *old, char *_new)
+{
+ (void)old, (void)_new;
+ return -1;
+}
+
+/**
+ * \brief Replacement of C library of _close
+ */
+extern int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+/**
+ * \brief Replacement of C library of _fstat
+ */
+extern int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+
+ return 0;
+}
+
+/**
+ * \brief Replacement of C library of _isatty
+ */
+extern int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+/**
+ * \brief Replacement of C library of _lseek
+ */
+extern int _lseek(int file, int ptr, int dir)
+{
+ (void)file, (void)ptr, (void)dir;
+ return 0;
+}
+
+/**
+ * \brief Replacement of C library of _exit
+ */
+extern void _exit(int status)
+{
+ printf("Exiting with status %d.\n", status);
+
+ for (;;)
+ ;
+}
+
+/**
+ * \brief Replacement of C library of _kill
+ */
+extern void _kill(int pid, int sig)
+{
+ (void)pid, (void)sig;
+ return;
+}
+
+/**
+ * \brief Replacement of C library of _getpid
+ */
+extern int _getpid(void)
+{
+ return -1;
+}
+
+#ifdef __cplusplus
+}
+#endif