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author | Joey Castillo <jose.castillo@gmail.com> | 2021-09-20 17:37:55 -0400 |
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committer | Joey Castillo <jose.castillo@gmail.com> | 2021-09-20 17:37:55 -0400 |
commit | 24e160611e12df8d31edc02af21ce07ad0929e1b (patch) | |
tree | b49190496ee47d657ab2d1c7bfc5abacf6e36687 /watch-library/hal/src | |
parent | 63322a3b7f7f5d5534fbd933576c7fcf69103afb (diff) | |
download | Sensor-Watch-24e160611e12df8d31edc02af21ce07ad0929e1b.tar.gz Sensor-Watch-24e160611e12df8d31edc02af21ce07ad0929e1b.tar.bz2 Sensor-Watch-24e160611e12df8d31edc02af21ce07ad0929e1b.zip |
add more atmel studio framework code
Diffstat (limited to 'watch-library/hal/src')
-rwxr-xr-x | watch-library/hal/src/hal_flash.c | 314 | ||||
-rwxr-xr-x | watch-library/hal/src/hal_rand_sync.c | 122 | ||||
-rwxr-xr-x | watch-library/hal/src/hal_spi_m_sync.c | 201 | ||||
-rwxr-xr-x | watch-library/hal/src/hal_usart_sync.c | 276 |
4 files changed, 913 insertions, 0 deletions
diff --git a/watch-library/hal/src/hal_flash.c b/watch-library/hal/src/hal_flash.c new file mode 100755 index 00000000..b1a58b71 --- /dev/null +++ b/watch-library/hal/src/hal_flash.c @@ -0,0 +1,314 @@ +/** + * \file + * + * \brief Flash functionality implementation. + * + * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries. + * + * \asf_license_start + * + * \page License + * + * Subject to your compliance with these terms, you may use Microchip + * software and any derivatives exclusively with Microchip products. + * It is your responsibility to comply with third party license terms applicable + * to your use of third party software (including open source software) that + * may accompany Microchip software. + * + * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, + * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, + * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, + * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE + * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL + * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE + * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE + * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT + * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY + * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, + * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. + * + * \asf_license_stop + * + */ + +#include "hal_flash.h" +#include <utils_assert.h> +#include <utils.h> +#include <hal_atomic.h> + +/** + * \brief Driver version + */ +#define DRIVER_VERSION 0x00000001u + +static void flash_ready(struct _flash_device *device); +static void flash_error(struct _flash_device *device); + +static int32_t flash_is_address_aligned(struct flash_descriptor *flash, const uint32_t flash_addr); + +/** + * \brief Initialize the FLASH HAL instance and hardware for callback mode. + */ +int32_t flash_init(struct flash_descriptor *flash, void *const hw) +{ + int32_t rc; + + ASSERT(flash && hw); + + rc = _flash_init(&flash->dev, hw); + if (rc) { + return rc; + } + + flash->dev.flash_cb.ready_cb = flash_ready; + flash->dev.flash_cb.error_cb = flash_error; + + return ERR_NONE; +} + +/** + * \brief Deinitialize the FLASH HAL instance. + */ +int32_t flash_deinit(struct flash_descriptor *flash) +{ + ASSERT(flash); + + _flash_deinit(&flash->dev); + + return ERR_NONE; +} + +/** + * \brief Reads a number of bytes to a page in the internal Flash + */ +int32_t flash_read(struct flash_descriptor *flash, uint32_t src_addr, uint8_t *buffer, uint32_t length) +{ + ASSERT(flash && buffer && length); + + uint32_t page_size = _flash_get_page_size(&flash->dev); + uint32_t total_pages = _flash_get_total_pages(&flash->dev); + + /* Check if the address is valid */ + if ((src_addr > page_size * total_pages) || (src_addr + length > page_size * total_pages)) { + return ERR_BAD_ADDRESS; + } + + _flash_read(&flash->dev, src_addr, buffer, length); + + return ERR_NONE; +} + +/** + * \brief Updates several bytes to the internal Flash + */ +int32_t flash_write(struct flash_descriptor *flash, uint32_t dst_addr, uint8_t *buffer, uint32_t length) +{ + ASSERT(flash && buffer && length); + + uint32_t page_size = _flash_get_page_size(&flash->dev); + uint32_t total_pages = _flash_get_total_pages(&flash->dev); + + /* Check if the address is valid */ + if ((dst_addr > page_size * total_pages) || (dst_addr + length > page_size * total_pages)) { + return ERR_BAD_ADDRESS; + } + + if (_flash_is_locked(&flash->dev, dst_addr)) { + return ERR_DENIED; + } + + _flash_write(&flash->dev, dst_addr, buffer, length); + + return ERR_NONE; +} + +/** + * \brief Appends a number of bytes to a page in the internal Flash + */ +int32_t flash_append(struct flash_descriptor *flash, uint32_t dst_addr, uint8_t *buffer, uint32_t length) +{ + ASSERT(flash && buffer && length); + + uint32_t page_size = _flash_get_page_size(&flash->dev); + uint32_t total_pages = _flash_get_total_pages(&flash->dev); + + /* Check if the address is valid */ + if ((dst_addr > page_size * total_pages) || (dst_addr + length > page_size * total_pages)) { + return ERR_BAD_ADDRESS; + } + + if (_flash_is_locked(&flash->dev, dst_addr)) { + return ERR_DENIED; + } + + _flash_append(&flash->dev, dst_addr, buffer, length); + + return ERR_NONE; +} + +/** + * \brief Execute erase in the internal flash + */ +int32_t flash_erase(struct flash_descriptor *flash, const uint32_t dst_addr, const uint32_t page_nums) +{ + ASSERT(flash && page_nums); + uint32_t page_size = _flash_get_page_size(&flash->dev); + uint32_t total_pages = _flash_get_total_pages(&flash->dev); + int32_t rc; + + rc = flash_is_address_aligned(flash, dst_addr); + if (rc) { + return rc; + } + + if ((page_nums > total_pages) || (dst_addr / page_size + page_nums > total_pages)) { + return ERR_INVALID_ARG; + } + + _flash_erase(&flash->dev, dst_addr, page_nums); + + return ERR_NONE; +} + +/** + * \brief Register a function as FLASH transfer completion callback + */ +int32_t flash_register_callback(struct flash_descriptor *flash, const enum flash_cb_type type, flash_cb_t func) +{ + ASSERT(flash); + + switch (type) { + case FLASH_CB_READY: + flash->callbacks.cb_ready = func; + break; + + case FLASH_CB_ERROR: + flash->callbacks.cb_error = func; + break; + + default: + return ERR_INVALID_ARG; + } + + _flash_set_irq_state(&flash->dev, (enum _flash_cb_type)type, NULL != func); + + return ERR_NONE; +} + +/** + * \brief Execute lock in the internal flash + */ +int32_t flash_lock(struct flash_descriptor *flash, const uint32_t dst_addr, const uint32_t page_nums) +{ + ASSERT(flash && page_nums); + uint32_t page_size = _flash_get_page_size(&flash->dev); + uint32_t total_pages = _flash_get_total_pages(&flash->dev); + int32_t rc; + + rc = flash_is_address_aligned(flash, dst_addr); + if (rc) { + return rc; + } + + if ((page_nums > total_pages) || (dst_addr / page_size + page_nums > total_pages)) { + return ERR_INVALID_ARG; + } + + return _flash_lock(&flash->dev, dst_addr, page_nums); +} + +/** + * \brief Execute unlock in the internal flash + */ +int32_t flash_unlock(struct flash_descriptor *flash, const uint32_t dst_addr, const uint32_t page_nums) +{ + ASSERT(flash && page_nums); + uint32_t page_size = _flash_get_page_size(&flash->dev); + uint32_t total_pages = _flash_get_total_pages(&flash->dev); + int32_t rc; + + rc = flash_is_address_aligned(flash, dst_addr); + if (rc) { + return rc; + } + + if ((page_nums > total_pages) || (dst_addr / page_size + page_nums > total_pages)) { + return ERR_INVALID_ARG; + } + + return _flash_unlock(&flash->dev, dst_addr, page_nums); +} + +/** + * \brief Get the flash page size. + */ +uint32_t flash_get_page_size(struct flash_descriptor *flash) +{ + ASSERT(flash); + return _flash_get_page_size(&flash->dev); +} + +/** + * \brief Get the numbers of flash page. + */ +uint32_t flash_get_total_pages(struct flash_descriptor *flash) +{ + ASSERT(flash); + return _flash_get_total_pages(&flash->dev); +} + +/** + * \brief Retrieve the current driver version + */ +uint32_t flash_get_version(void) +{ + return DRIVER_VERSION; +} + +/** + * \internal check the address whether it is aligned + * \param[in, out] flash Pointer to the HAL FLASH instance. + * \param[in] flash_addr address to be check in flash + * + * \return whether it is valid + * \retval 0 Valid. + * \retval -1 Error, invalid. + */ +static int32_t flash_is_address_aligned(struct flash_descriptor *flash, const uint32_t flash_addr) +{ + ASSERT(flash); + + uint32_t page_size = _flash_get_page_size(&flash->dev); + + /* Check if the read address not aligned to the start of a page */ + if (flash_addr & (page_size - 1)) { + return ERR_BAD_ADDRESS; + } + return ERR_NONE; +} + +/** + * \internal Ready for a new flash command + * + * \param[in] device The pointer to flash device structure + */ +static void flash_ready(struct _flash_device *device) +{ + struct flash_descriptor *const descr = CONTAINER_OF(device, struct flash_descriptor, dev); + if (descr->callbacks.cb_ready) { + descr->callbacks.cb_ready(descr); + } +} + +/** + * \internal Error occurs in flash command + * + * \param[in] device The pointer to flash device structure + */ +static void flash_error(struct _flash_device *device) +{ + struct flash_descriptor *const descr = CONTAINER_OF(device, struct flash_descriptor, dev); + if (descr->callbacks.cb_error) { + descr->callbacks.cb_error(descr); + } +} diff --git a/watch-library/hal/src/hal_rand_sync.c b/watch-library/hal/src/hal_rand_sync.c new file mode 100755 index 00000000..8b29ed1b --- /dev/null +++ b/watch-library/hal/src/hal_rand_sync.c @@ -0,0 +1,122 @@ +/** + * \file + * + * \brief Generic Random Number Generator (RNG) functionality declaration. + * + * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries. + * + * \asf_license_start + * + * \page License + * + * Subject to your compliance with these terms, you may use Microchip + * software and any derivatives exclusively with Microchip products. + * It is your responsibility to comply with third party license terms applicable + * to your use of third party software (including open source software) that + * may accompany Microchip software. + * + * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, + * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, + * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, + * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE + * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL + * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE + * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE + * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT + * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY + * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, + * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. + * + * \asf_license_stop + * + */ + +#include <utils.h> +#include "hal_rand_sync.h" + +#define HAL_RNG_SYNC_VERSION 0x00000001u + +int32_t rand_sync_init(struct rand_sync_desc *const desc, void *const hw) +{ + ASSERT(desc); + + return _rand_sync_init(&desc->dev, hw); +} + +void rand_sync_deinit(struct rand_sync_desc *const desc) +{ + ASSERT(desc); + _rand_sync_deinit(&desc->dev); +} + +int32_t rand_sync_enable(struct rand_sync_desc *const desc) +{ + ASSERT(desc); + return _rand_sync_enable(&desc->dev); +} + +void rand_sync_disable(struct rand_sync_desc *const desc) +{ + ASSERT(desc); + _rand_sync_disable(&desc->dev); +} + +int32_t rand_sync_set_seed(struct rand_sync_desc *const desc, const uint32_t seed) +{ + ASSERT(desc); + return _rand_sync_set_seed(&desc->dev, seed); +} + +/** + * \brief Read data bits + */ +static uint32_t _rand_sync_read_data(const struct _rand_sync_dev *dev, const uint8_t n_bits) +{ + uint8_t r_bits = (dev->n_bits < 1) ? 32 : dev->n_bits; + if (r_bits < n_bits) { + uint8_t i; + uint32_t d = 0; + /* Join read bits */ + for (i = 0; i < n_bits; i += r_bits) { + d |= (uint32_t)(_rand_sync_read_one(dev) << i); + } + return d; + } else { + return _rand_sync_read_one(dev); + } +} + +uint8_t rand_sync_read8(const struct rand_sync_desc *const desc) +{ + ASSERT(desc); + return (uint8_t)_rand_sync_read_data(&desc->dev, 8); +} + +uint32_t rand_sync_read32(const struct rand_sync_desc *const desc) +{ + ASSERT(desc); + return (uint32_t)_rand_sync_read_data(&desc->dev, 32); +} + +void rand_sync_read_buf8(const struct rand_sync_desc *const desc, uint8_t *buf, uint32_t len) +{ + uint32_t i; + ASSERT(desc && (buf && len)); + for (i = 0; i < len; i++) { + buf[i] = (uint8_t)_rand_sync_read_data(&desc->dev, 8); + } +} + +void rand_sync_read_buf32(const struct rand_sync_desc *const desc, uint32_t *buf, uint32_t len) +{ + uint32_t i; + ASSERT(desc && (buf && len)); + for (i = 0; i < len; i++) { + buf[i] = (uint32_t)_rand_sync_read_data(&desc->dev, 32); + } +} + +uint32_t rand_sync_get_version(void) +{ + return HAL_RNG_SYNC_VERSION; +} diff --git a/watch-library/hal/src/hal_spi_m_sync.c b/watch-library/hal/src/hal_spi_m_sync.c new file mode 100755 index 00000000..1a64296a --- /dev/null +++ b/watch-library/hal/src/hal_spi_m_sync.c @@ -0,0 +1,201 @@ +/** + * \file + * + * \brief I/O SPI related functionality implementation. + * + * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. + * + * \asf_license_start + * + * \page License + * + * Subject to your compliance with these terms, you may use Microchip + * software and any derivatives exclusively with Microchip products. + * It is your responsibility to comply with third party license terms applicable + * to your use of third party software (including open source software) that + * may accompany Microchip software. + * + * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, + * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, + * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, + * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE + * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL + * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE + * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE + * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT + * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY + * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, + * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. + * + * \asf_license_stop + * + */ + +#include "hal_spi_m_sync.h" +#include <utils_assert.h> +#include <utils.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Driver version + */ +#define SPI_M_SYNC_DRIVER_VERSION 0x00000001u + +#define SPI_DEACTIVATE_NEXT 0x8000 + +static int32_t _spi_m_sync_io_write(struct io_descriptor *const io, const uint8_t *const buf, const uint16_t length); +static int32_t _spi_m_sync_io_read(struct io_descriptor *const io, uint8_t *const buf, const uint16_t length); + +/** + * \brief Initialize the SPI HAL instance function pointer for HPL APIs. + */ +void spi_m_sync_set_func_ptr(struct spi_m_sync_descriptor *spi, void *const func) +{ + ASSERT(spi); + spi->func = (struct _spi_m_sync_hpl_interface *)func; +} + +int32_t spi_m_sync_init(struct spi_m_sync_descriptor *spi, void *const hw) +{ + int32_t rc = 0; + ASSERT(spi && hw); + spi->dev.prvt = (void *)hw; + rc = _spi_m_sync_init(&spi->dev, hw); + + if (rc < 0) { + return rc; + } + + spi->flags = SPI_DEACTIVATE_NEXT; + spi->io.read = _spi_m_sync_io_read; + spi->io.write = _spi_m_sync_io_write; + + return ERR_NONE; +} + +void spi_m_sync_deinit(struct spi_m_sync_descriptor *spi) +{ + ASSERT(spi); + _spi_m_sync_deinit(&spi->dev); +} + +void spi_m_sync_enable(struct spi_m_sync_descriptor *spi) +{ + ASSERT(spi); + _spi_m_sync_enable(&spi->dev); +} + +void spi_m_sync_disable(struct spi_m_sync_descriptor *spi) +{ + ASSERT(spi); + _spi_m_sync_disable(&spi->dev); +} + +int32_t spi_m_sync_set_baudrate(struct spi_m_sync_descriptor *spi, const uint32_t baud_val) +{ + ASSERT(spi); + return _spi_m_sync_set_baudrate(&spi->dev, baud_val); +} + +int32_t spi_m_sync_set_mode(struct spi_m_sync_descriptor *spi, const enum spi_transfer_mode mode) +{ + ASSERT(spi); + return _spi_m_sync_set_mode(&spi->dev, mode); +} + +int32_t spi_m_sync_set_char_size(struct spi_m_sync_descriptor *spi, const enum spi_char_size char_size) +{ + ASSERT(spi); + return _spi_m_sync_set_char_size(&spi->dev, char_size); +} + +int32_t spi_m_sync_set_data_order(struct spi_m_sync_descriptor *spi, const enum spi_data_order dord) +{ + ASSERT(spi); + return _spi_m_sync_set_data_order(&spi->dev, dord); +} + +/** \brief Do SPI read in polling way + * For SPI master, activate CS, do send 0xFFs and read data, deactivate CS. + * + * It blocks until all data read or error. + * + * \param[in, out] spi Pointer to the HAL SPI instance. + * \param[out] buf Pointer to the buffer to store read data. + * \param[in] size Size of the data in number of characters. + * \return Operation status. + * \retval size Success. + * \retval >=0 Time out, with number of characters read. + */ +static int32_t _spi_m_sync_io_read(struct io_descriptor *io, uint8_t *buf, const uint16_t length) +{ + ASSERT(io); + + struct spi_m_sync_descriptor *spi = CONTAINER_OF(io, struct spi_m_sync_descriptor, io); + struct spi_xfer xfer; + + xfer.rxbuf = buf; + xfer.txbuf = 0; + xfer.size = length; + + return spi_m_sync_transfer(spi, &xfer); +} + +/** \brief Do SPI data write in polling way + * For SPI master, activate CS, do buffer send and deactivate CS. The data back + * is discarded. + * + * The data read back is discarded. + * + * It blocks until all data sent or error. + * + * \param[in, out] spi Pointer to the HAL SPI instance. + * \param[in] p_xfer Pointer to the transfer information (\ref spi_transfer). + * \return Operation status. + * \retval size Success. + * \retval >=0 Timeout, with number of characters transferred. + */ +static int32_t _spi_m_sync_io_write(struct io_descriptor *const io, const uint8_t *const buf, const uint16_t length) +{ + ASSERT(io); + + struct spi_m_sync_descriptor *spi = CONTAINER_OF(io, struct spi_m_sync_descriptor, io); + struct spi_xfer xfer; + + xfer.rxbuf = 0; + xfer.txbuf = (uint8_t *)buf; + xfer.size = length; + + return spi_m_sync_transfer(spi, &xfer); +} + +int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer) +{ + struct spi_msg msg; + + ASSERT(spi && p_xfer); + + msg.txbuf = p_xfer->txbuf; + msg.rxbuf = p_xfer->rxbuf; + msg.size = p_xfer->size; + return _spi_m_sync_trans(&spi->dev, &msg); +} + +int32_t spi_m_sync_get_io_descriptor(struct spi_m_sync_descriptor *const spi, struct io_descriptor **io) +{ + ASSERT(spi && io); + *io = &spi->io; + return 0; +} + +uint32_t spi_m_sync_get_version(void) +{ + return SPI_M_SYNC_DRIVER_VERSION; +} + +#ifdef __cplusplus +} +#endif diff --git a/watch-library/hal/src/hal_usart_sync.c b/watch-library/hal/src/hal_usart_sync.c new file mode 100755 index 00000000..ab99c1d1 --- /dev/null +++ b/watch-library/hal/src/hal_usart_sync.c @@ -0,0 +1,276 @@ +/** + * \file + * + * \brief I/O USART related functionality implementation. + * + * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. + * + * \asf_license_start + * + * \page License + * + * Subject to your compliance with these terms, you may use Microchip + * software and any derivatives exclusively with Microchip products. + * It is your responsibility to comply with third party license terms applicable + * to your use of third party software (including open source software) that + * may accompany Microchip software. + * + * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, + * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, + * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, + * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE + * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL + * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE + * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE + * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT + * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY + * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, + * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. + * + * \asf_license_stop + * + */ + +#include "hal_usart_sync.h" +#include <utils_assert.h> +#include <utils.h> + +/** + * \brief Driver version + */ +#define DRIVER_VERSION 0x00000001u + +static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length); +static int32_t usart_sync_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length); + +/** + * \brief Initialize usart interface + */ +int32_t usart_sync_init(struct usart_sync_descriptor *const descr, void *const hw, void *const func) +{ + int32_t init_status; + ASSERT(descr && hw); + init_status = _usart_sync_init(&descr->device, hw); + if (init_status) { + return init_status; + } + + descr->io.read = usart_sync_read; + descr->io.write = usart_sync_write; + + return ERR_NONE; +} + +/** + * \brief Uninitialize usart interface + */ +int32_t usart_sync_deinit(struct usart_sync_descriptor *const descr) +{ + ASSERT(descr); + _usart_sync_deinit(&descr->device); + + descr->io.read = NULL; + descr->io.write = NULL; + + return ERR_NONE; +} + +/** + * \brief Enable usart interface + */ +int32_t usart_sync_enable(struct usart_sync_descriptor *const descr) +{ + ASSERT(descr); + _usart_sync_enable(&descr->device); + + return ERR_NONE; +} + +/** + * \brief Disable usart interface + */ +int32_t usart_sync_disable(struct usart_sync_descriptor *const descr) +{ + ASSERT(descr); + _usart_sync_disable(&descr->device); + + return ERR_NONE; +} + +/** + * \brief Retrieve I/O descriptor + */ +int32_t usart_sync_get_io_descriptor(struct usart_sync_descriptor *const descr, struct io_descriptor **io) +{ + ASSERT(descr && io); + + *io = &descr->io; + return ERR_NONE; +} + +/** + * \brief Specify action for flow control pins + */ +int32_t usart_sync_set_flow_control(struct usart_sync_descriptor *const descr, + const union usart_flow_control_state state) +{ + ASSERT(descr); + _usart_sync_set_flow_control_state(&descr->device, state); + + return ERR_NONE; +} + +/** + * \brief Set usart baud rate + */ +int32_t usart_sync_set_baud_rate(struct usart_sync_descriptor *const descr, const uint32_t baud_rate) +{ + ASSERT(descr); + _usart_sync_set_baud_rate(&descr->device, baud_rate); + + return ERR_NONE; +} + +/** + * \brief Set usart data order + */ +int32_t usart_sync_set_data_order(struct usart_sync_descriptor *const descr, const enum usart_data_order data_order) +{ + ASSERT(descr); + _usart_sync_set_data_order(&descr->device, data_order); + + return ERR_NONE; +} + +/** + * \brief Set usart mode + */ +int32_t usart_sync_set_mode(struct usart_sync_descriptor *const descr, const enum usart_mode mode) +{ + ASSERT(descr); + _usart_sync_set_mode(&descr->device, mode); + + return ERR_NONE; +} + +/** + * \brief Set usart parity + */ +int32_t usart_sync_set_parity(struct usart_sync_descriptor *const descr, const enum usart_parity parity) +{ + ASSERT(descr); + _usart_sync_set_parity(&descr->device, parity); + + return ERR_NONE; +} + +/** + * \brief Set usart stop bits + */ +int32_t usart_sync_set_stopbits(struct usart_sync_descriptor *const descr, const enum usart_stop_bits stop_bits) +{ + ASSERT(descr); + _usart_sync_set_stop_bits(&descr->device, stop_bits); + + return ERR_NONE; +} + +/** + * \brief Set usart character size + */ +int32_t usart_sync_set_character_size(struct usart_sync_descriptor *const descr, const enum usart_character_size size) +{ + ASSERT(descr); + _usart_sync_set_character_size(&descr->device, size); + + return ERR_NONE; +} + +/** + * \brief Retrieve the state of flow control pins + */ +int32_t usart_sync_flow_control_status(const struct usart_sync_descriptor *const descr, + union usart_flow_control_state *const state) +{ + ASSERT(descr && state); + *state = _usart_sync_get_flow_control_state(&descr->device); + + return ERR_NONE; +} + +/** + * \brief Check if the usart transmitter is empty + */ +int32_t usart_sync_is_tx_empty(const struct usart_sync_descriptor *const descr) +{ + ASSERT(descr); + return _usart_sync_is_ready_to_send(&descr->device); +} + +/** + * \brief Check if the usart receiver is not empty + */ +int32_t usart_sync_is_rx_not_empty(const struct usart_sync_descriptor *const descr) +{ + ASSERT(descr); + return _usart_sync_is_byte_received(&descr->device); +} + +/** + * \brief Retrieve the current driver version + */ +uint32_t usart_sync_get_version(void) +{ + return DRIVER_VERSION; +} + +/* + * \internal Write the given data to usart interface + * + * \param[in] descr The pointer to an io descriptor + * \param[in] buf Data to write to usart + * \param[in] length The number of bytes to write + * + * \return The number of bytes written. + */ +static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length) +{ + uint32_t offset = 0; + struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io); + + ASSERT(io_descr && buf && length); + while (!_usart_sync_is_ready_to_send(&descr->device)) + ; + do { + _usart_sync_write_byte(&descr->device, buf[offset]); + while (!_usart_sync_is_ready_to_send(&descr->device)) + ; + } while (++offset < length); + while (!_usart_sync_is_transmit_done(&descr->device)) + ; + return (int32_t)offset; +} + +/* + * \internal Read data from usart interface + * + * \param[in] descr The pointer to an io descriptor + * \param[in] buf A buffer to read data to + * \param[in] length The size of a buffer + * + * \return The number of bytes read. + */ +static int32_t usart_sync_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length) +{ + uint32_t offset = 0; + struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io); + + ASSERT(io_descr && buf && length); + do { + while (!_usart_sync_is_byte_received(&descr->device)) + ; + buf[offset] = _usart_sync_read_byte(&descr->device); + } while (++offset < length); + + return (int32_t)offset; +} |